CN114689964B - Crystal oscillator starting stability testing circuit, testing and adjusting method - Google Patents
Crystal oscillator starting stability testing circuit, testing and adjusting method Download PDFInfo
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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- H—ELECTRICITY
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- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The invention belongs to the technical field of crystal oscillator stability test, and particularly relates to a circuit design, test and adjustment method for crystal oscillator starting stability, which comprises the following steps: s1, constructing a test circuit; s2, selecting circuit components and equipment parameters; s3, grabbing a starting waveform according to the operation steps of the test circuit; s4, judging whether the waveform amplitude is recognized or not; if the identification is not carried out, ending; s5, if the waveform amplitude is identified, judging whether the waveform frequency is the working frequency; if the working frequency is the working frequency, ending; s6, if the frequency is not the working frequency, selecting a proper circuit design scheme, and ending. The method provided by the invention has the advantages that the requirements on instruments and equipment are low, the test precision is stable and reliable, various effective schemes are provided, and when the crystal oscillator is started unstably, the design scheme can be adjusted according to the actual product requirement, so that the effective test scheme is obtained, and the purpose of improving the product quality is achieved.
Description
Technical Field
The invention belongs to the technical field of crystal oscillator stability test, and particularly relates to a test circuit, a test and an adjustment method for crystal oscillator starting stability.
Background
The crystal oscillator is a heart of circuit operation and is also a core device in circuit design, and crystal oscillator index parameters comprise frequency, frequency offset, load, working voltage, duty ratio and the like, so that the problem of waveform stability in a starting process stage is often ignored in the prior art, and the product often has occasional and random abnormal faults such as dead halt and program instruction execution errors. Chinese patent CN2019100752203, a crystal oscillating circuit is provided, which includes an oscillating crystal, an adjustable capacitor, a starting resistor, a switch group and a logic control module; the oscillation crystal is used for forming a resonant cavity of the oscillation circuit; one end of the adjustable capacitor is connected with one end of the oscillating crystal, and the other end of the adjustable capacitor is connected with the other end of the oscillating crystal; one end of the starting resistor is connected with one end of the oscillating crystal, and the other end of the starting resistor is connected with the other end of the oscillating crystal through the feedback resistor group; the feedback resistor group comprises a plurality of feedback resistors which are sequentially connected in series, one end of the feedback resistor group is connected with the other end of the starting resistor, and the other end of the feedback resistor group is connected with the other end of the oscillating crystal; the switch group comprises a plurality of feedback resistor control switches for controlling feedback resistors, and each feedback resistor control switch controls at least one feedback resistor to be connected into the crystal oscillation circuit; the logic control module is respectively connected with the switch group and the oscillating crystal.
However, at present, a relatively complete method for testing and judging the starting stability is not available, so that a reasonable circuit design scheme cannot be selected according to requirements, and further risks caused by unstable starting of the crystal oscillator cannot be avoided or improved.
Disclosure of Invention
In view of the above, the present invention provides a circuit design, test and adjustment method for crystal oscillator start-up stability.
The technical scheme of the invention is as follows:
in the test circuit, the direct current power supply P1 and the micro switch SW1 are connected in series, the energy storage capacitor C1 and the filter capacitor C2 are connected in parallel, and the energy storage capacitor C1 and the filter capacitor C2 which are connected in parallel are connected in series with the micro switch SW 1; the first crystal oscillator to be measured X1 and the second crystal oscillator to be measured X2 are arranged in parallel, and the first crystal oscillator to be measured X1 and the second crystal oscillator to be measured X2 which are connected in parallel are connected in series with the energy storage capacitor C1 and the filter capacitor C2 which are connected in parallel.
Further, the crystal oscillator further comprises a first adjustable resistor VR1 and a second adjustable resistor VR2, wherein the first adjustable resistor VR1 and the first crystal oscillator to be detected X1 are arranged in series, and the second adjustable resistor VR2 and the second crystal oscillator to be detected X2 are arranged in series.
Further, the oscilloscope comprises a fourth positive electrode channel TS1, a first positive electrode channel TS2, a second positive electrode channel TS3 and a negative electrode channel TS4. The fourth positive electrode channel TS1 is respectively connected with VCC ends of the first crystal oscillator X1 to be tested and the second crystal oscillator X2 to be tested; the first positive electrode channel TS2 is connected with an OUT end of the first crystal oscillator X1 to be tested; the second positive electrode channel TS3 is connected with an OUT end of the second crystal oscillator X2 to be detected; the negative electrode channel TS4 is respectively connected with GND ends of the first crystal oscillator X1 to be tested and the second crystal oscillator X2 to be tested. With this arrangement, the power-on state and the output frequency of the crystal oscillator can be measured, respectively. In order to eliminate individual differences, the consistency of the measuring environment is ensured, and two crystal oscillators are measured at the same time. In the invention, the VCC terminal is a Voltage To Current Converter terminal in the prior art, i.e., a circuit supply voltage terminal, the OUT terminal is an Output terminal in the prior art, i.e., an Output terminal, and the GND terminal is a Ground terminal in the prior art.
The test method of the crystal oscillator starting stability comprises the following steps:
s1, constructing a test circuit;
s2, selecting circuit components and equipment parameters;
s3, grabbing a starting waveform according to the operation steps of the test circuit;
s4, judging whether the waveform amplitude is recognized or not; if the identification is not possible, the waveform chip in the starting stage is regarded as low level, the actual work of the chip is not influenced, and the judgment is finished;
s5, if the waveform amplitude is identified, judging whether the waveform frequency is the working frequency; if the working frequency is the frequency required by the actual working of the chip, the chip is not abnormal, no additional design improvement is needed, and the judgment is finished.
Further, in step S2, requirements of circuit components and instrument parameters are as follows:
direct current power supply P1: voltage output of 1-10V, current output of > 1A, ripple wave and noise (20 Hz to 20 MHz) of 5mVpp, and load regulation rate of <0.05%;
a micro switch SW1, a micro switch with small contact spacing of the selection switch; the device can prevent the switching jitter from occurring at the moment of powering on the crystal oscillator, so that the power supply fluctuation occurs, the measurement effect is influenced, and the time for stabilizing the electric waveform on the power supply (rising to 90%) is ensured to be less than 20 mu s.
The capacitance value of the energy storage capacitor C1 is 22-47 mu F, the ESR is less than 30mΩ, the filter capacitor is 100nF, and the resonance frequency is more than 100 MHz; the micro switch SW1 is ensured to be turned on, voltage jitter and high-frequency noise are not generated, and measurement errors are reduced. In the invention, ESR is an abbreviation of Equivalent Series Resistance, and Chinese name is equivalent series resistance.
The first crystal oscillator to be tested X1 and the second crystal oscillator to be tested X2 adopt active patch crystal oscillators;
the resistance values of the first adjustable resistor VR1 and the second adjustable resistor VR2 are 0.5-2 KΩ; and proper load is selected according to the load capacity of different crystal oscillators during experiments.
The oscilloscope selects a four-channel oscilloscope, the sampling frequency is more than or equal to 1GHz, the bandwidth is more than or equal to 200MHz, the storage depth is more than or equal to 5 MHz/channel, and the four-channel oscilloscope has a trigger capturing function.
Further, in step S3, the test circuit operation includes the steps of:
s31, starting a direct current power supply, setting output voltage equal to crystal oscillator working voltage, setting output current according to crystal oscillator power consumption, and starting voltage output;
s32, starting an oscilloscope, setting parameters, time and storage depth of the oscilloscope according to the crystal oscillator frequency characteristic, selecting rising edge triggering by a fourth positive electrode channel TS1, setting a triggering level according to the crystal oscillator working voltage, and starting a triggering function;
s33, rapidly pressing down the micro switch SW1, triggering and grabbing a primary waveform by the oscilloscope, and completing measurement of a primary starting waveform.
Further, in steps S4 and S5, the crystal oscillator has a transition period in the time from starting to stable output, and the amplitude and frequency of the transition period have uncertainty, so that the judgment of the starting stability of the crystal oscillator is realized by analyzing the amplitude and frequency of the waveform of the transition period.
Further, in step S4, the amplitude analysis of the transient waveform is included: the amplitude of the crystal determines whether the IC recognizes the current crystal oscillator waveform, and when the waveform peak value of the transition period of the crystal oscillator does not exceed the IC schmitt trigger Gao Menxian, the waveform peak value is recognized as a continuous low level, and no influence is generated on the IC.
Further, in step S5, it is determined whether the operating frequency of the crystal oscillator in the actual circuit meets the standard or not by combining the operating frequency of the crystal oscillator and the highest operating frequency of the IC, and whether the highest operating frequency of the IC reaches the operating frequency of the crystal oscillator or not.
The method for adjusting the starting stability of the crystal oscillator comprises the steps of confirming that the crystal oscillator is not the working frequency after test, selecting a proper circuit design scheme, and adjusting; the circuit design scheme comprises the following steps:
A. and (5) prolonging reset time: the power-on reset time is prolonged by more than 1ms, and the transition period of the crystal oscillator is skipped;
in many circuit designs, in order to ensure the correct reset time sequence of the circuit, an external reset chip is connected to a reset pin on the IC, and the power-on reset time can be prolonged by more than 1ms by utilizing the delay function of the reset chip, so that the transition period of the crystal oscillator is skipped.
B. Adjusting the switching time of the external crystal oscillator: by prolonging the clock switching time, the avoidance transition period is realized;
in the prior art, most control ICs are provided with clock control circuits and an internal RC oscillator, internal key initialization and reset actions are directly completed by time sequences provided by an internal crystal oscillator at the moment of power-on, then a specific time sequence is waited for switching to an external crystal oscillator for work, and the purpose of avoiding transition period can be achieved by prolonging clock switching time.
C. Changing the power-on time sequence of the crystal oscillator and the master control IC: and electrifying the crystal oscillator in advance, and switching on the power supply of the main control IC when the frequency is stable and output after the transition period of the crystal oscillator is finished.
In the circuit design, the power-on time sequence of the crystal oscillator and the main control IC can be changed through the logic circuit, so that the crystal oscillator is powered on in advance, and the power supply of the main control IC is switched on when the frequency is stable and output after the transition period of the crystal oscillator is finished, thus ensuring the normal work of the IC.
The method provided by the invention has the advantages that the requirements on instruments and equipment are low, the test precision is stable and reliable, various effective schemes are provided, and when the crystal oscillator is started unstably, the design scheme can be adjusted according to the actual product requirement, so that the effective test scheme is obtained, and the purpose of improving the product quality is achieved.
The invention has the beneficial effects that:
1. the measurement data is accurate and reliable; the time from the power-on of the general crystal oscillator to the stable oscillation starting is 1ms, and the test time precision can reach 20us, the waveform noise and the ripple wave are less than 5mVpp through the cooperation of the test circuit and the test method, so that effective original data can be obtained;
2. the judging method is simple and effective; through analysis and comparison of the clock circuits of the IC specification, the amplitude influence of the crystal oscillator output is judged according to the appointed sequence, and then the influence of the frequency is judged, so that the problem can be found out rapidly;
3. the solution is rich and feasible; in practical circuit application, a proper crystal oscillator can be selected according to the application scene, comprehensive performance, quality, cost and other dimensions of a product.
Drawings
FIG. 1 is a test circuit diagram of the present invention;
FIG. 2 is a test flow chart of the method of the present invention;
fig. 3 is a schematic diagram of a prior art structure in which an input pin of an IC power supply crystal oscillator passes through a schmitt trigger.
Detailed Description
The present invention will be described in further detail with reference to the following embodiments, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the detailed description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the invention.
Example 1
In the test circuit, the direct current power supply P1 and the micro switch SW1 are connected in series, the energy storage capacitor C1 and the filter capacitor C2 are connected in parallel, and the first crystal oscillator X1 to be tested and the second crystal oscillator X2 to be tested are connected in parallel.
Further, the crystal oscillator further comprises a first adjustable resistor VR1 and a second adjustable resistor VR2, wherein the first adjustable resistor VR1 and the first crystal oscillator to be detected X1 are arranged in series, and the second adjustable resistor VR2 and the second crystal oscillator to be detected X2 are arranged in series.
Further, the oscilloscope comprises a fourth positive electrode channel TS1, a first positive electrode channel TS2, a second positive electrode channel TS3 and a negative electrode channel TS4. The fourth positive electrode channel TS1 is respectively connected with VCC (Voltage To Current Converter) ends of the first crystal oscillator to be tested X1 and the second crystal oscillator to be tested X2; the first positive electrode channel TS2 is connected with an OUT (Output) end of the first crystal oscillator X1 to be tested; the second positive electrode channel TS3 is connected with an OUT (Output) end of the second crystal oscillator X2 to be detected; the negative electrode channel TS4 is respectively connected with GND (Ground) ends of the first crystal oscillator X1 to be tested and the second crystal oscillator X2 to be tested. With this arrangement, the power-on state and the output frequency of the crystal oscillator can be measured, respectively. In order to eliminate individual differences, the consistency of the measuring environment is ensured, and two crystal oscillators are measured at the same time.
Example 2
A crystal oscillator starting stability testing method comprises the following steps of:
s1, constructing a test circuit;
s2, selecting circuit components and equipment parameters;
s3, grabbing a starting waveform according to the operation steps of the test circuit;
s4, judging whether the waveform amplitude is recognized or not; if the identification is not carried out, ending; the method comprises the following steps: when the waveform amplitude is not recognized, ending the determination: the fact that the amplitude is not in the range means that the crystal oscillator has no problem and continuous judgment is not needed.
S5, if the waveform amplitude is identified, judging whether the waveform frequency is the working frequency; if the working frequency is the working frequency, ending; the method comprises the following steps: when the crystal oscillator is started, the amplitude can be identified, and the frequency is the working frequency, so that a design circuit does not need to be improved.
And S6, if the frequency is not the working frequency, selecting a proper circuit design scheme, and ending.
Further, in step S2, requirements of circuit components and instrument parameters are as follows:
direct current power supply P1: voltage output of 1-10V, current output of > 1A, ripple wave and noise (20 Hz to 20 MHz) of 5mVpp, and load regulation rate of <0.05%;
a micro switch SW1, a micro switch with small contact spacing of the selection switch; the device can prevent the switching jitter from occurring at the moment of powering on the crystal oscillator, so that the power supply fluctuation occurs, the measurement effect is influenced, and the time for stabilizing the electric waveform on the power supply (rising to 90%) is ensured to be less than 20 mu s.
The capacitance value of the energy storage capacitor C1 is 22-47 mu F, ESR (Equivalent Series Resistance) is less than 30mΩ, the filter capacitor is 100nF, and the resonance frequency is more than 100 MHz; the micro switch SW1 is ensured to be turned on, voltage jitter and high-frequency noise are not generated, and measurement errors are reduced.
The first crystal oscillator to be tested X1 and the second crystal oscillator to be tested X2 adopt active patch crystal oscillators;
the resistance values of the first adjustable resistor VR1 and the second adjustable resistor VR2 are 0.5-2 KΩ; and proper load is selected according to the load capacity of different crystal oscillators during experiments.
The oscilloscope selects a four-channel oscilloscope, the sampling frequency is more than or equal to 1GHz, the bandwidth is more than or equal to 200MHz, the storage depth is more than or equal to 5 MHz/channel, and the four-channel oscilloscope has a trigger capturing function.
Further, in step S3, the test circuit operation includes the steps of:
s31, starting a direct current power supply, setting output voltage equal to crystal oscillator working voltage, setting output current according to crystal oscillator power consumption, and starting voltage output;
s32, starting an oscilloscope, setting parameters, time and storage depth of the oscilloscope according to the crystal oscillator frequency characteristic, selecting rising edge triggering by a fourth positive electrode channel TS1, setting a triggering level according to the crystal oscillator working voltage, and starting a triggering function;
s33, rapidly pressing down the micro switch SW1, triggering and grabbing a primary waveform by the oscilloscope, and completing measurement of a primary starting waveform.
Further, in steps S4 and S5, the crystal oscillator has a transition period in the time from starting to stable output, and the amplitude and frequency of the transition period have uncertainty, so that the judgment of the starting stability of the crystal oscillator is realized by analyzing the amplitude and frequency of the waveform of the transition period.
Further, in step S4, the amplitude analysis of the transient waveform is included: the amplitude of the crystal determines whether the IC recognizes the current crystal oscillator waveform, and when the waveform peak value of the transition period of the crystal oscillator does not exceed the IC schmitt trigger Gao Menxian, the waveform peak value is recognized as a continuous low level, and no influence is generated on the IC.
In the actual circuit, as shown in fig. 3, the active crystal oscillator input pin of the IC enters the clock control circuit after passing through the schmitt trigger 1, and the high threshold and the low threshold of the schmitt trigger can be known through the specification of the IC, so that the crystal amplitude determines whether the IC recognizes the current crystal oscillator waveform. For example: the current IC supply voltage is 3V, the high threshold is 0.7VDD (2.1V), and the low threshold is 0.2VDD (0.6V). The peak value of the waveform in the transition period of the crystal oscillator is 1.64V, and the waveform does not exceed the IC Style trigger Gao Menxian, and for an IC clock control circuit, the waveform with the peak value of 1.64V and the frequency of 33.8MHz (1 s/29.6 ns) is identified as a continuous low level, so that the IC is not influenced.
Further, in step S5, it is determined whether the operating frequency of the crystal oscillator in the actual circuit meets the standard or not by combining the operating frequency of the crystal oscillator and the highest operating frequency of the IC, and whether the highest operating frequency of the IC reaches the operating frequency of the crystal oscillator or not.
For example: when the amplitude determination exceeds a high threshold (threshold 2.1V), the measured value is 2.68V, which indicates that the crystal oscillator waveform will affect the IC, the determination is needed, the oscillograph measures a waveform with a waveform period of 22ns and a frequency of 45MHz (1 s/22 ns).
The operating frequency of the crystal oscillator and the highest operating frequency of the IC in the actual circuit are known, so the following determination can be made:
when the working frequency of the crystal oscillator is not 45MHz, time reference deviation can be caused, and program instructions are executed incorrectly;
when the highest frequency is less than 45MHz, IC operation may enter metastable state, making IC operation incorrect or inoperative.
Example 3
The method for adjusting the starting stability of the crystal oscillator comprises the steps of confirming that the crystal oscillator is not the working frequency after the test of the method in the embodiment 2, and selecting a proper circuit design scheme for adjustment; the circuit design scheme comprises the following steps:
A. and (5) prolonging reset time: the power-on reset time is prolonged by more than 1ms, and the transition period of the crystal oscillator is skipped;
in many circuit designs, in order to ensure the correct reset time sequence of the circuit, an external reset chip is connected to a reset pin on the IC, and the power-on reset time can be prolonged by more than 1ms by utilizing the delay function of the reset chip, so that the transition period of the crystal oscillator is skipped.
B. Adjusting the switching time of the external crystal oscillator: by prolonging the clock switching time, the avoidance transition period is realized;
in the prior art, most control ICs are provided with clock control circuits and an internal RC oscillator, internal key initialization and reset actions are directly completed by time sequences provided by an internal crystal oscillator at the moment of power-on, then a specific time sequence is waited for switching to an external crystal oscillator for work, and the purpose of avoiding transition period can be achieved by prolonging clock switching time.
C. Changing the power-on time sequence of the crystal oscillator and the master control IC: and electrifying the crystal oscillator in advance, and switching on the power supply of the main control IC when the frequency is stable and output after the transition period of the crystal oscillator is finished.
In the circuit design, the power-on time sequence of the crystal oscillator and the main control IC can be changed through the logic circuit, so that the crystal oscillator is powered on in advance, and the power supply of the main control IC is switched on when the frequency is stable and output after the transition period of the crystal oscillator is finished, thus ensuring the normal work of the IC.
The method provided by the invention tests, provides various effective schemes, and can adjust the design scheme according to the actual product requirement when the crystal oscillator is started unstably, so as to obtain an effective test scheme, thereby achieving the purpose of improving the product quality.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
Furthermore, it should be understood that although the present disclosure describes embodiments, not every embodiment is provided with a separate embodiment, and that this description is provided for clarity only, and that the disclosure is not limited to the embodiments described in detail below, and that the embodiments described in the examples may be combined as appropriate to form other embodiments that will be apparent to those skilled in the art. It should be noted that technical features not described in detail in the present invention may be implemented by any prior art in the field.
Claims (9)
1. The test circuit is characterized by comprising a direct-current power supply P1, a micro switch SW1, an energy storage capacitor C1, a filter capacitor C2, a first crystal oscillator X1 to be tested and a second crystal oscillator X2 to be tested, wherein in the test circuit, the direct-current power supply P1 and the micro switch SW1 are arranged in series, the energy storage capacitor C1 and the filter capacitor C2 are arranged in parallel, and the energy storage capacitor C1 and the filter capacitor C2 which are connected in parallel are connected in series with the micro switch SW 1; the first crystal oscillator to be measured X1 and the second crystal oscillator to be measured X2 are arranged in parallel, and the first crystal oscillator to be measured X1 and the second crystal oscillator to be measured X2 which are connected in parallel are connected in series with the energy storage capacitor C1 and the filter capacitor C2 which are connected in parallel.
2. The circuit for testing the starting stability of a crystal oscillator according to claim 1, further comprising a first adjustable resistor VR1 and a second adjustable resistor VR2, wherein the first adjustable resistor VR1 is connected in series with the first crystal oscillator to be tested X1, and the second adjustable resistor VR2 is connected in series with the second crystal oscillator to be tested X2.
3. The circuit for testing the starting stability of a crystal oscillator according to claim 2, further comprising an oscilloscope, wherein the oscilloscope comprises a fourth positive electrode channel TS1, a first positive electrode channel TS2, a second positive electrode channel TS3 and a negative electrode channel TS4.
4. A method for testing the start-up stability of a crystal oscillator, comprising the circuit of any one of claims 1-3, comprising the steps of:
s1, constructing a test circuit;
s2, selecting circuit components and equipment parameters;
s3, grabbing a starting waveform according to the operation steps of the test circuit; the method specifically comprises the following steps: s31, starting a direct current power supply, setting output voltage equal to crystal oscillator working voltage, setting output current according to crystal oscillator power consumption, and starting voltage output; s32, starting an oscilloscope, setting parameters, time and storage depth of the oscilloscope according to the crystal oscillator frequency characteristic, selecting rising edge triggering by a fourth positive electrode channel TS1, setting a triggering level according to the crystal oscillator working voltage, and starting a triggering function; s33, rapidly pressing down a micro switch SW1, triggering and grabbing a primary waveform by an oscilloscope, and completing measurement of a primary starting waveform;
s4, judging whether the waveform amplitude is recognized or not; if the identification is not carried out, ending;
s5, if the waveform amplitude is identified, judging whether the waveform frequency is the working frequency; and if the frequency is the working frequency, ending.
5. The method for testing the starting stability of a crystal oscillator according to claim 4, wherein in the step S2, requirements of circuit components and instrument parameters are as follows:
direct current power supply P1: voltage output is 1-10V, current output is more than 1A, ripple wave and noise are 5mVpp, and load regulation rate is less than 0.05%;
the micro switch SW1 is used for selecting the micro switch with the time for the electric waveform on the power supply to reach stability being less than 20 mu s;
the capacitance value of the energy storage capacitor C1 is 22-47 mu F, the ESR is less than 30mΩ, the filter capacitor is 100nF, and the resonance frequency is more than 100 MHz;
the first crystal oscillator to be tested X1 and the second crystal oscillator to be tested X2 adopt active patch crystal oscillators;
the resistance values of the first adjustable resistor VR1 and the second adjustable resistor VR2 are 0.5-2 KΩ;
the oscilloscope selects a four-channel oscilloscope, the sampling frequency is more than or equal to 1GHz, the bandwidth is more than or equal to 200MHz, the storage depth is more than or equal to 5 MHz/channel, and the four-channel oscilloscope has a trigger capturing function.
6. The method for testing the starting stability of a crystal oscillator according to claim 4, wherein in the steps S4 and S5, the crystal oscillator has a transition period in a period from starting to stable output, and uncertainty exists in amplitude and frequency of the transition period, and the starting stability of the crystal oscillator is judged by analyzing the amplitude and frequency of a waveform of the transition period.
7. The method for testing crystal oscillator starting stability according to claim 6, wherein in step S4, the amplitude analysis of the transient waveform is included: the amplitude of the crystal determines whether the IC recognizes the current crystal oscillator waveform, and when the waveform peak value of the transition period of the crystal oscillator does not exceed the IC schmitt trigger Gao Menxian, the waveform peak value is recognized as a continuous low level, and no influence is generated on the IC.
8. The method for testing the start-up stability of a crystal oscillator according to claim 7, wherein in step S5, the working frequency of the crystal oscillator in the actual circuit is determined to be up to standard by combining the working frequency of the crystal oscillator with the highest working frequency of the IC, and the highest working frequency of the IC is determined to be up to the working frequency of the crystal oscillator.
9. A method for adjusting the starting stability of a crystal oscillator, which adopts the testing method for the starting stability of the crystal oscillator according to any one of claims 4-8 to test the crystal oscillator, and is characterized in that when the working frequency is confirmed after the test, a circuit design scheme is selected for adjustment; the circuit design scheme comprises the following steps:
A. and (5) prolonging reset time: the power-on reset time is prolonged by more than 1ms, and the transition period of the crystal oscillator is skipped;
B. adjusting the switching time of the external crystal oscillator: by prolonging the clock switching time, the avoidance transition period is realized;
C. changing the power-on time sequence of the crystal oscillator and the master control IC: and electrifying the crystal oscillator in advance, and switching on the power supply of the main control IC when the frequency is stable and output after the transition period of the crystal oscillator is finished.
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| CN202210185926.7A CN114689964B (en) | 2022-02-28 | 2022-02-28 | Crystal oscillator starting stability testing circuit, testing and adjusting method |
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| CN202210185926.7A Active CN114689964B (en) | 2022-02-28 | 2022-02-28 | Crystal oscillator starting stability testing circuit, testing and adjusting method |
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