CN114665774B - Current sampling method, device and storage medium - Google Patents
Current sampling method, device and storage medium Download PDFInfo
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- CN114665774B CN114665774B CN202210371217.8A CN202210371217A CN114665774B CN 114665774 B CN114665774 B CN 114665774B CN 202210371217 A CN202210371217 A CN 202210371217A CN 114665774 B CN114665774 B CN 114665774B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P21/00—Arrangements or methods for the control of electric machines by vector control, e.g. by control of field orientation
- H02P21/14—Estimation or adaptation of machine parameters, e.g. flux, current or voltage
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0092—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring current only
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P21/00—Arrangements or methods for the control of electric machines by vector control, e.g. by control of field orientation
- H02P21/22—Current control, e.g. using a current control loop
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
- H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
- H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters
- H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters with pulse width modulation
- H02P27/12—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters with pulse width modulation pulsing by guiding the flux vector, current vector or voltage vector on a circle or a closed curve, e.g. for direct torque control
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- General Physics & Mathematics (AREA)
- Control Of Electric Motors In General (AREA)
Abstract
The application discloses a current sampling method, a current sampling device and a storage medium. The current sampling method comprises the following steps: respectively obtaining a first sampling interval and a second sampling interval according to a three-phase driving debugging signal of a current sector motor; if the first sampling interval and/or the second sampling interval is smaller than the minimum sampling time interval, performing pulse width modulation on at least one driving debugging signal in the three-phase driving debugging signals; setting sampling point time of a current sector according to a current three-phase driving debugging signal, and carrying out three-phase current sampling and reconstruction reduction on the motor after the sampling point time of all sectors is set, so as to obtain three-phase current of the motor. The application can solve the sampling problem of the sampling dead zone in the single-resistance sampling mode, so that the sector switching is smooth, and the power consumption and noise of the motor are further reduced.
Description
Technical Field
The application belongs to the technical field of motors, and particularly relates to a current sampling method, a current sampling device and a storage medium.
Background
During operation of the motor, phase currents of three-phase coils of the motor are generally required to be sampled to realize control of the motor, and sampling the three-phase currents of the motor in what manner affects the cost of controlling the operation of the motor. At present, the three-phase current of the motor is generally sampled in a single-resistance sampling mode, a double-resistance sampling mode and a three-resistance sampling mode, and compared with other two sampling modes, the single-resistance sampling mode is more widely applied due to simpler hardware structure and lower implementation cost. However, in the practical application process, we find that the single-resistance sampling mode has some sampling dead areas, which is mainly reflected in the situation that when the motor runs at a low speed or is idle, namely in a transition area with a sector being changed and a low-speed area, as the modulated three-phase PWM is too close, sampling points meeting the conditions cannot be found, and then the problem that current sampling is difficult or even impossible to sample occurs. This problem can cause non-smooth sector switching, thereby increasing motor power consumption and noise.
Disclosure of Invention
The embodiment of the application provides a current sampling method, a current sampling device and a storage medium, which aim to solve the technical problems that in the prior art, a single-resistance sampling mode is adopted to sample three-phase current of a motor, a plurality of sampling dead areas exist, and the sector switching is not smooth, so that the power consumption and noise of the motor are increased.
In a first aspect, an embodiment of the present application provides a current sampling method, including the following steps: respectively obtaining a first sampling interval and a second sampling interval according to a three-phase driving debugging signal of a current sector motor; if the first sampling interval and/or the second sampling interval is smaller than the minimum sampling time interval, performing pulse width modulation on at least one driving debugging signal in the three-phase driving debugging signals; setting sampling point time of a current sector according to the current three-phase driving debugging signal, and carrying out three-phase current sampling and reconstruction reduction on the motor after the sampling point time of all sectors is set, so as to obtain three-phase current of the motor.
Optionally, in some embodiments of the present application, before the step of obtaining the first sampling interval and the second sampling interval according to the three-phase driving debug signal of the current sector motor, the method further includes:
and driving the motor by adopting an SVPWM mode to form a plurality of sectors for vector control.
Optionally, in some embodiments of the present application, the step of obtaining the first sampling interval and the second sampling interval according to the three-phase driving debug signal of the current sector motor specifically includes: sequencing three-phase driving debugging signals of a current sector motor from small pulse width to large pulse width to sequentially obtain the first driving debugging signals, the second driving debugging signals and the third driving debugging signals; the first sampling interval is obtained according to the second driving debugging signal and the third driving debugging signal, and the second sampling interval is obtained according to the first driving debugging signal and the second driving debugging signal.
Optionally, in some embodiments of the present application, the step of obtaining the first sampling interval according to the second driving debug signal and the third driving debug signal, and the step of obtaining the second sampling interval according to the first driving debug signal and the second driving debug signal specifically includes: sequentially acquiring first time, second time and third time for starting to output a target level in the first driving debugging signal, the second driving debugging signal and the third driving debugging signal; the first sampling interval is obtained according to the time difference between the second time and the third time, and the second sampling interval is obtained according to the time difference between the first time and the second time.
Optionally, in some embodiments of the present application, the step of pulse width modulating at least one of the three-phase driving debug signals if the first sampling interval and/or the second sampling interval is smaller than a minimum sampling time interval specifically includes: and if the first sampling interval is smaller than the minimum sampling time interval, performing pulse width modulation on the second driving debugging signal or the third driving debugging signal.
Optionally, in some embodiments of the present application, the step of setting the sampling point time of the current sector according to the current three-phase driving debug signal specifically includes: setting a first sampling point time of a current sector according to a third driving debugging signal after pulse width modulation, and setting a second sampling point time of the current sector according to the second driving debugging signal; or, setting the first sampling point time of the current sector according to the third driving debugging signal, and setting the second sampling point time of the current sector according to the second driving debugging signal after pulse width modulation.
Optionally, in some embodiments of the present application, if the first sampling interval and/or the second sampling interval is smaller than a minimum sampling time interval, the step of pulse width modulating at least one driving debug signal of the three-phase driving debug signals specifically includes: and if the second sampling interval is smaller than the minimum sampling time interval, performing pulse width modulation on the first driving debugging signal or the second driving debugging signal.
Optionally, in some embodiments of the present application, the step of setting the sampling point time of the current sector according to the current three-phase driving debug signal specifically includes: setting a first sampling point time of the current sector according to the third driving debugging signal, and setting a second sampling point time of the current sector according to a second driving debugging signal after pulse width modulation; or, setting the first sampling point time of the current sector according to the third driving debugging signal, and setting the second sampling point time of the current sector according to the second driving debugging signal.
Optionally, in some embodiments of the present application, if the first sampling interval and/or the second sampling interval is smaller than a minimum sampling time interval, the step of pulse width modulating at least one driving debug signal of the three-phase driving debug signals specifically includes: and if the first sampling interval and the second sampling interval are smaller than the minimum sampling time interval, sequentially performing pulse width modulation on the second driving debugging signal and the third driving debugging signal or sequentially performing pulse width modulation on the second driving debugging signal and the first driving debugging signal.
Optionally, in some embodiments of the present application, the step of setting the sampling point time of the current sector according to the current three-phase driving debug signal specifically includes: setting a first sampling point time of the current sector according to the third driving debugging signal after pulse width modulation, and setting a second sampling point time of the current sector according to the second driving debugging signal after pulse width modulation; or, setting the first sampling point time of the current sector according to the third driving debugging signal, and setting the second sampling point time of the current sector according to the second driving debugging signal after pulse width modulation.
Alternatively, in some embodiments of the application, the pulse width modulation comprises pulse width expansion modulation or pulse width reduction modulation.
Optionally, in some embodiments of the present application, after pulse width expansion modulating the driving debug signal, the pulse width modulating further includes performing secondary modulation in the same PWM period on the driving debug signal after pulse width expansion modulating.
In a second aspect, an embodiment of the present application provides an apparatus, including: a memory, a processor, a program stored on and running on the processor, and a data bus for enabling a connected communication between the processor and the memory, which program, when being executed by the processor, implements the steps of the method described above.
In a third aspect, embodiments of the present application provide a storage medium for computer readable storage, where the storage medium stores one or more programs executable by one or more processors to implement the steps of the above-described method.
When the application adopts a single-resistor sampling mode to sample the three-phase current of the motor, a first sampling interval and a second sampling interval are respectively obtained according to the three-phase driving debugging signal of the motor in the current sector, so that at least one driving debugging signal in the three-phase driving debugging signal is subjected to pulse width modulation when the first sampling interval and/or the second sampling interval is smaller than the minimum sampling time interval, and the first sampling interval and the second sampling interval can meet the minimum sampling time interval requirement. And setting sampling point time of the current sector according to the current three-phase driving debugging signal, so as to sample and reconstruct three-phase current of the motor after the sampling point time of all the sectors is set, thereby obtaining the three-phase current of the motor. Therefore, when the sampling point time of the current sector is set according to the current three-phase driving debugging signal, the current three-phase driving debugging signal is possibly subjected to pulse width modulation, so that the first sampling interval and the second sampling interval can meet the minimum sampling time interval requirement, the sampling problem of a sampling blind area in a single-resistance sampling mode can be solved, the sector is switched smoothly, and the power consumption and the noise of a motor are further reduced.
Drawings
The technical solution of the present application and its advantageous effects will be made apparent by the following detailed description of the specific embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic flow chart of a current sampling method according to an embodiment of the present application.
Fig. 2 is a schematic circuit diagram of a three-phase driving and sampling circuit of a motor according to an embodiment of the present application.
Fig. 3 is a schematic diagram of six sectors of vector control obtained by driving the motor according to the SVPWM method.
Fig. 4a-4f are waveform diagrams of three-phase drive debug signals for the motors of the various sectors shown in fig. 3.
Fig. 5 is a schematic waveform diagram of the three-phase driving debug signals of the I-zone motor after sequencing from small pulse width to large pulse width according to the embodiment of the present application.
Fig. 6 is a specific flowchart of step S120 of the current sampling method shown in fig. 1.
Fig. 7 is a schematic diagram illustrating the case of step S121 shown in fig. 6.
Fig. 8 is a schematic diagram of the principle of pulse width expansion modulation on PWM3 and secondary modulation in the same PWM period on the third driving debug signal PWM3 after pulse width expansion modulation in the embodiment of the present application.
Fig. 9 is a schematic diagram illustrating the case of step S122 shown in fig. 6.
Fig. 10 is a schematic diagram illustrating the case of step S123 shown in fig. 6.
Fig. 11 is a schematic flow chart of an apparatus according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made in detail and with reference to the accompanying drawings, wherein it is apparent that the embodiments described are only some, but not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to fall within the scope of the application. The various embodiments described below and their technical features can be combined with each other without conflict.
During operation of the motor, phase currents of three-phase coils of the motor are generally required to be sampled to realize control of the motor, and sampling the three-phase currents of the motor in what manner affects the cost of controlling the operation of the motor. At present, the three-phase current of the motor is generally sampled in a single-resistance sampling mode, a double-resistance sampling mode and a three-resistance sampling mode, and compared with other two sampling modes, the single-resistance sampling mode is more widely applied due to simpler hardware structure and lower implementation cost. However, in the practical application process, we find that the single-resistance sampling mode has some sampling dead areas, which is mainly reflected in the situation that when the motor runs at a low speed or is idle, namely in a transition area with a sector being changed and a low-speed area, as the modulated three-phase PWM is too close, sampling points meeting the conditions cannot be found, and then the problem that current sampling is difficult or even impossible to sample occurs. This problem can cause non-smooth sector switching, thereby increasing motor power consumption and noise.
Based on this, it is necessary to provide a new current sampling solution to solve the technical problems that in the prior art, a single-resistance sampling mode is adopted to sample the three-phase current of the motor, so that a dead sampling area exists, the sector switching is not smooth, and the power consumption and noise of the motor are increased.
As shown in fig. 1, in one embodiment, the embodiment of the present application provides a current sampling method, which specifically includes the following steps:
Step S110: and respectively obtaining a first sampling interval and a second sampling interval according to the three-phase driving debugging signals of the current sector motor.
Specifically, the embodiment of the application mainly solves the technical problems that the power consumption and noise of the motor are increased due to the fact that a single-resistance sampling mode is adopted to sample the three-phase current of the motor in the prior art, so that a plurality of sampling dead areas exist, and the sector switching is not smooth. Therefore, the current sampling mode of the embodiment of the application is mainly aimed at a single-resistance sampling mode, and particularly can be a mode of adopting an SVPWM (space vector pulse width modulation) mode to drive a motor, wherein the theoretical basis of the SVPWM is an average value equivalent principle, namely, the average value of the SVPWM is equal to a given voltage vector by combining basic voltage vectors in one switching period. At a certain moment the voltage vector rotates into a certain region, which can be derived from a different combination of two adjacent non-zero vectors and zero vectors constituting this region in time. The action time of the two vectors is applied for multiple times in one sampling period, so that the action time of each voltage vector is controlled, the voltage space vector rotates approximately along a circular track, the actual magnetic flux generated by different switching states of the inverter approaches an ideal magnetic flux circle, and the switching state of the inverter is determined according to the comparison result of the two magnetic fluxes, so that a PWM waveform is formed. Taking the three-phase driving and sampling circuit of the motor in fig. 2 as an example, the motor is driven by adopting an SVPWM mode to form six sectors of vector control shown in fig. 3, wherein three-phase driving debugging signals of the motor in the region I (0 ° -60 °) are shown in fig. 4a, three-phase driving debugging signals of the motor in the region II (60 ° -120 °) are shown in fig. 4b, three-phase driving debugging signals of the motor in the region III (120 ° -180 °) are shown in fig. 4c, three-phase driving debugging signals of the motor in the region IV (180 ° -240 °) are shown in fig. 4d, three-phase driving debugging signals of the motor in the region V (240 ° -300 °) are shown in fig. 4e, and three-phase driving debugging signals of the motor in the region VI (300 ° -360 °) are shown in fig. 4 f. Six switches of the upper bridge arm P1 and the lower bridge arm P2 can be respectively controlled to be opened and closed differently by different driving debugging signals PWM, so that different phase currents are output at the upper end of the resistor R1 by obtaining different switch combinations.
At this time, in order to better realize the calculation of the first sampling interval and the second sampling interval and the setting of the sampling point time in the subsequent steps, the pulse width of the three-phase driving debugging signal of the current sector motor can be sequenced firstly, and the pulse width sequencing can be specifically performed according to the sequence from small pulse width to large pulse width. At this time, the specific process of executing the step of "obtaining the first sampling interval and the second sampling interval according to the three-phase driving debug signal of the current sector motor" of the present method may be: sequencing three-phase driving debugging signals of a current sector motor from small pulse width to large pulse width to sequentially obtain a first driving debugging signal PWM1, a second driving debugging signal PWM2 and a third driving debugging signal PWM3; the first sampling interval Ta is obtained according to the second driving debug signal PWM2 and the third driving debug signal PWM3, and the second sampling interval Tb is obtained according to the first driving debug signal PWM1 and the second driving debug signal PWM2. Taking three-phase driving debugging signals of the motors in the area I (0-60 degrees) shown in fig. 4a as an example, the first driving debugging signals PWM1, the second driving debugging signals PWM2 and the third driving debugging signals PWM3 are sequentially obtained according to the sequence of the pulse widths from small to large, and then the waveform diagram shown in fig. 5 is formed. That is, in this sector, since the pulse width of the w-phase driving debug signal is the smallest, it is the first driving debug signal PWM1, the pulse width of the u-phase driving debug signal is the largest, it is the third driving debug signal PWM3, and the remaining v-phase driving debug signal is the second driving debug signal PWM2. Similarly, the three-phase driving debugging signals of other sector motors can be sequenced from small pulse width to large pulse width to sequentially obtain a first driving debugging signal PWM1, a second driving debugging signal PWM2 and a third driving debugging signal PWM3.
The specific process of obtaining the first sampling interval Ta according to the third driving debug signal PWM3 and the second driving debug signal PWM2, and obtaining the second sampling interval Tb according to the second driving debug signal PWM2 and the first driving debug signal PWM1 may be: as shown in fig. 5, a first time T1, a second time T2, and a third time T3 for starting to output a target level (specifically, a high level here) in the first driving debug signal PWM1, the second driving debug signal PWM2, and the third driving debug signal PWM3 are sequentially acquired. Then, the first sampling interval Ta is obtained according to the time difference between the second time T2 and the third time T3, i.e., ta=t3-T2, and the second sampling interval Tb is obtained according to the time difference between the first time T1 and the second time T2, i.e., =t2-T1. The purpose of calculating the first sampling interval Ta and the second sampling interval Tb is to ensure that when the sampling point time of the current sector is set later, the first sampling interval Ta and the second sampling interval Tb can both meet the minimum sampling time interval requirement, that is, the minimum sampling time interval is assumed to be Tmin, tmin=adc sampling time+dead zone time+noise time, where the ADC sampling time is the time required for converting the analog signal quantity into the digital signal quantity when the ADC sampling time is ADC sampling. When the dead time is PWM output, one protection time provided to prevent the switches of the upper and lower arms from being simultaneously turned on needs to be set according to the speed of the switches. The noise time is the noise caused by the switching of the MOS tube, and is generally caused by the performance of the components. The first sampling interval Ta and the second sampling interval Tb can meet the minimum sampling time interval requirement, namely the requirement that Ta is more than or equal to Tmin and Tb is more than or equal to Tmin. That is, after the first sampling interval Ta and the second sampling interval Tb are obtained, the following procedure may be performed: whether the first sampling interval Ta and the second sampling interval Tb meet the minimum sampling time interval requirement is determined respectively, that is, whether the first sampling interval Ta and the second sampling interval Tb are greater than or equal to the minimum sampling time interval Tmin is determined respectively.
Step S120: and if the first sampling interval and/or the second sampling interval is smaller than the minimum sampling time interval, performing pulse width modulation on at least one driving debugging signal in the three-phase driving debugging signals.
Specifically, after the first sampling interval Ta and the second sampling interval Tb are obtained through the above method steps, and whether the first sampling interval Ta and the second sampling interval Tb meet the minimum sampling time interval requirement is determined correspondingly, when the first sampling interval Ta and/or the second sampling interval Tb cannot meet the minimum sampling time interval requirement, that is, the first sampling interval and/or the second sampling interval is smaller than the minimum sampling time interval, pulse width modulation is performed on at least one driving debug signal in the three-phase driving debug signals, so as to ensure that the first sampling interval Ta and the second sampling interval Tb can both meet the minimum sampling time interval requirement.
It can be seen that the above-mentioned case of performing pulse width modulation on at least one of the three-phase driving debug signals may specifically include three sampling dead zone cases where the three-phase current of the motor is sampled by adopting the single-resistance sampling manner in the prior art, that is, the case where only the first sampling interval Ta is smaller than the minimum sampling time interval Tmin, the case where only the second sampling interval Tb is smaller than the minimum sampling time interval Tmin, and the case where both the first sampling interval Ta and the second sampling interval Tb are smaller than the minimum sampling time interval Tmin.
In some examples, taking the case where only the first sampling interval Ta is smaller than the minimum sampling time interval Tmin as an example, the above-mentioned steps may be specifically performed as shown in fig. 6, including the steps of:
Step S121: and if the first sampling interval is smaller than the minimum sampling time interval, performing pulse width modulation on the second driving debugging signal or the third driving debugging signal.
Specifically, assuming that waveforms of the first driving debug signal PWM1, the second driving debug signal PWM2, and the third driving debug signal PWM3 after the pulse width sequencing are shown as solid lines in fig. 7, before pulse width modulation is not performed, the first sampling interval is marked as Ta1, and it is seen that only Ta1 < Tmin, and the minimum sampling time interval requirement cannot be satisfied. Therefore, the second driving debug signal PWM2 or the third driving debug signal PWM3 may be pulse-width modulated, so that the modulated first sampling interval Ta is greater than or equal to Tmin, i.e. the first sampling interval Ta may also meet the minimum sampling time interval requirement, so as to ensure that both the first sampling interval Ta and the second sampling interval Tb may meet the minimum sampling time interval requirement. The first sampling interval Ta is calculated by the time difference between the second time T2 and the third time T3, so that the value of the second time T2 can be increased in principle by performing pulse width modulation (here, pulse width modulation may be specifically performing pulse width reduction modulation on the second driving debug signal PWM 2), the value of the third time T3 can be reduced by performing pulse width modulation on the third driving debug signal PWM3 (here, pulse width modulation may be specifically performing pulse width expansion modulation on the third driving debug signal PWM 3), and the two can achieve the purpose of increasing the value of the first sampling interval Ta, but since performing pulse width remodulation on the second driving debug signal PWM2 not only can change the value of the first sampling interval Ta, but also can cause the change of the value of the second sampling interval Tb, here, under the condition that the second sampling interval Tb has met the minimum sampling time interval requirement, the effect on the second sampling interval Tb is preferably avoided as much as possible, that the third driving debug signal PWM3 is subjected to pulse width modulation, that is, the value of the third driving signal PWM3 is subjected to pulse width modulation, the value of the third driving debug signal PWM3 is subjected to pulse width modulation, the value of the third driving signal PWM3 is subjected to pulse width modulation is further reduced, and the value of the second sampling interval Ta is equal to or more than 7, and the pulse width modulation is performed in the second driving signal is further subjected to the same as the first pulse width modulation signal is subjected to the pulse width modulation 3, and the second pulse width modulation is subjected to the pulse width modulation is more than 7, and the pulse width modulation is subjected to the second pulse width modulation is subjected to the pulse width modulation is more than the second pulse modulation is subjected to the pulse modulation, and the pulse width modulation is subjected to the pulse modulation is required.
The implementation of the pulse width expansion modulation on the third driving debug signal PWM3 and the secondary modulation in the same PWM period on the third driving debug signal PWM3 after the pulse width expansion modulation can be implemented by different chips in different manners. Taking the chip hk32_ ASPIN x as an example, the comparison output function of the PWM module of the TIM1 may be implemented, specifically, the output pulse width of the third driving debug signal PWM3 may be enlarged by reducing the value of the comparison register (CCR 3), and simultaneously, one path of comparison register (CCR 4) is added to control the moment of triggering the DMA to write into CCR3, so as to control the intermediate remodulation function (that is, the remodulation in the same PWM period is performed on the third driving debug signal PWM3 after the pulse width expansion modulation). As shown in fig. 8, the TIM may operate in the following manner: 1. there is a counter CNT starting from 0 and adding 1 to each clock and after reaching the value of the Auto Reload Register (ARR) (the value of ARR in the figure is 900), subtracting 1 from each clock, i.e. the triangle shown in fig. 8. 2. There is a compare register (CCR 3) where CNT is less than or equal to 300, pwm output 0, and CNT greater than 300 output 1. I.e. the waveform shown by the solid line in the figure, may represent the waveform of the third driving debug signal PWM3 before modulation. When the third driving debug signal PWM3 is pulse width expansion modulated and the second driving debug signal PWM3 after the pulse width expansion modulation is twice modulated in the same PWM period, the operations of 1. Reducing the value of CCR3, as shown in the above figure, the value of CCR3 is changed from 300 to 260 (the reduced amplitude is preferably such that the Ta2 value is just equal to or slightly larger than the value of the minimum sampling time interval Tmin). 2. A compare register (CCR 4) is added and CCR4 is configured to 860, while the DMA is coordinated, the DMA source is preset to ram (values 900, 260) and the DMA target is CCR3. Triggering a DMA move event when CNT and CCR4 are equal, i.e., a waveform shown by a dashed line in the figure, may represent a waveform of the final modulated third drive debug signal PWM 3.
In some examples, taking the case that only the second sampling interval Tb cannot meet the minimum sampling time interval requirement as shown in fig. 6, the specific process of the above steps may further include the following steps:
step S122: and if the second sampling interval is smaller than the minimum sampling time interval, performing pulse width modulation on the first driving debugging signal or the second driving debugging signal.
Specifically, assuming that waveforms of the first driving debug signal PWM1, the second driving debug signal PWM2, and the third driving debug signal PWM3 after the pulse width sequencing are shown as solid lines in fig. 9, before pulse width modulation is not performed, the second sampling interval is marked as Tb1, and it is seen that only Tb1 < Tmin, the minimum sampling time interval requirement cannot be satisfied. Therefore, the first driving debug signal PWM1 or the second driving debug signal PWM2 can be pulse-width modulated, so that the modulated second sampling interval Tb is greater than or equal to Tmin, i.e. the second sampling interval Tb can also meet the minimum sampling time interval requirement, so as to ensure that both the first sampling interval Ta and the second sampling interval Tb can meet the minimum sampling time interval requirement. Since the second sampling interval Tb is calculated from the time difference between the first time T1 and the second time T2, the value of the first time T1 may be increased by pulse width modulating the first driving debug signal PWM1 (the pulse width modulation may be the pulse width reduction modulation of the first driving debug signal PWM 1), the value of the second time T2 may be decreased by pulse width modulating the second driving debug signal PWM2 (the pulse width modulation may be the pulse width expansion modulation of the second driving debug signal PWM 2), the value of the second sampling interval Tb may be increased, the pulse width expansion modulation of the second driving debug signal PWM2 may be performed, the value of the second time T2 may be reduced, the purpose of increasing the value of the second sampling interval Tb2 is achieved, the modulated second sampling interval Tb2 is not less than in, and in addition, the pulse width expansion modulated second driving debug signal PWM2 may be subjected to the final pulse width modulation in the same PWM period for keeping the driving capability consistent, as shown in fig. 9.
The implementation of the pulse width expansion modulation on the second driving debug signal PWM2 and the secondary modulation on the second driving debug signal PWM2 after the pulse width expansion modulation in the same PWM period can be specifically referred to the pulse width modulation process on the third driving debug signal PWM3 in the above embodiment.
In some examples, taking an example that neither the first sampling interval Ta nor the second sampling interval Tb can meet the minimum sampling time interval requirement, the specific process of the above steps may further be as shown in fig. 6, and further include the following steps:
Step S123: and if the first sampling interval and the second sampling interval are smaller than the minimum sampling time interval, sequentially performing pulse width modulation on the second driving debugging signal and the third driving debugging signal or sequentially performing pulse width modulation on the second driving debugging signal and the first driving debugging signal.
Specifically, it is assumed that waveforms of the first driving debug signal PWM1, the second driving debug signal PWM2, and the third driving debug signal PWM3 after the pulse width sequencing are shown as solid lines in fig. 10, and before pulse width modulation is not performed, the first sampling interval is marked with Ta1, the second sampling interval is marked with Tb1, and it is seen that Ta1 < Tmin, ta2 < Tmin, and none of them can meet the minimum sampling time interval requirement. Therefore, pulse width modulation can be sequentially performed on the second driving debug signal PWM2 and the third driving debug signal PWM3, or pulse width modulation can be sequentially performed on the second driving debug signal PWM2 and the first driving debug signal PWM1, so that the modulated first sampling interval Ta is greater than or equal to Tmin and the modulated second sampling interval Tb is greater than or equal to Tmin, so as to ensure that the first sampling interval Ta and the second sampling interval Tb can both meet the minimum sampling time interval requirement. The second sampling interval Tb is calculated by the time difference between the first time T1 and the second time T2, the first sampling interval Ta is calculated by the time difference between the second time T2 and the third time T3, in principle, the values of the second time T2 and the third time T3 can be reduced by sequentially performing pulse width modulation (the pulse width modulation can be specifically performed by sequentially reducing the pulse width of the second driving debugging signal PWM2 and the pulse width of the first driving debugging signal PWM1 here) on the second time T2 and the first time T1, or by sequentially performing pulse width modulation (the pulse width modulation can be specifically performed by sequentially expanding the pulse width of the second driving debugging signal PWM2 and the pulse width of the third driving debugging signal PWM3 here) on the second driving debugging signal PWM2 and the third driving debugging signal PWM3, the values of the second time T2 and the third time T3 can be increased, the pulse width modulation can be performed by sequentially performing pulse width modulation on the second driving signal PWM2 and the third driving signal PWM3 here, the pulse width modulation can be performed by sequentially increasing the pulse width of the second driving signal PWM2 and the third driving signal PWM3, the pulse width of the second driving signal Ta is increased by more than or equal to the value of the second driving signal T2 and the pulse width of the third driving signal PWM3, the pulse width of the second driving signal is increased by more than or equal to the value of the second driving signal T2 is increased, and the pulse width of the second driving signal is increased by sequentially, and the pulse width of the second driving signal is increased by the pulse width of the second driving signal is increased by the second sampling interval 3, and the pulse width is increased by the second sampling time T3 is increased by the first time 1, the second driving debug signal PWM2 and the third driving debug signal PWM3 after the pulse width modulation are shown by the dashed lines in fig. 10, respectively.
The above-mentioned implementation of pulse width expansion modulation on the pulse widths of the second driving debug signal PWM2 and the third driving debug signal PWM3 and the implementation of secondary modulation on the second driving debug signal PWM2 and the third driving debug signal PWM3 after pulse width expansion modulation in the same PWM period respectively may refer to the pulse width modulation process on the third driving debug signal PWM3 in the above-mentioned embodiment.
And S130, setting sampling point time of the current sector according to the current three-phase driving debugging signal, so as to sample and reconstruct three-phase current of the motor after the sampling point time of all the sectors is set, and obtaining the three-phase current of the motor.
Specifically, since the current sampling method in the embodiment of the present application is mainly directed to a single-resistor sampling method, the single-resistor sampling method needs to perform ADC sampling at two different times in one PWM period (i.e., as shown in fig. 2, the ADC performs sampling at two different times on the current at the upper end of R1 in one PWM period), and then performs reconstruction and reduction based on a basic assumption condition, that is, a condition that the sum of the currents of the three-phase currents is 0, to obtain the three-phase current of the motor. Therefore, when the sampling point time of the current sector is set according to the current three-phase driving debugging signals, and three-phase current sampling and reconstruction restoration are carried out on the motor after the sampling point time of all the sectors is set, so that the three-phase current of the current sector of the motor is obtained, the two sampling point times of the current sector, namely the first sampling point time and the second sampling point time, are set according to two driving debugging signals in the current three-phase driving debugging signals, and the three-phase current sampling and reconstruction restoration of the current sector of the motor can be realized.
Specifically, when the pulse widths of the first driving debug signal PWM1, the second driving debug signal PWM2, and the third driving debug signal PWM3 are ordered from small to large, the first sampling point time Ts1 (ts1=t3+dead time+noise time) of the current sector may be set according to the third driving debug signal PWM3, and the second sampling point time Ts2 (ts2=t2+dead time+noise time) of the current sector may be set according to the second driving debug signal PWM 2. When the pulse widths of the first driving debug signal PWM1, the second driving debug signal PWM2, and the third driving debug signal PWM3 are ordered from large to small, the first sampling point time Ts1 (ts1=t1+dead time+noise time) of the current sector may be set according to the first driving debug signal PWM1, and the second sampling point time Ts2 (ts2=t2+dead time+noise time) of the current sector may be set according to the second driving debug signal PWM 2.
Taking the example of setting the first sampling point time of the current sector according to the third driving debug signal PWM3 and setting the second sampling point time of the current sector according to the third driving debug signal PWM2 when the pulse widths of the first driving debug signal PWM1, the second driving debug signal PWM2, and the third driving debug signal PWM3 are ordered from small to large:
(1) When the first sampling interval Ta and the second sampling interval Tb can meet the minimum sampling time interval requirement initially, pulse width modulation is not required for the first driving debug signal PWM1, the second driving debug signal PWM2 and the third driving debug signal PWM3, and at this time, only the first sampling point time of the current sector is required to be directly set according to the third driving debug signal PWM3, and the second sampling point time of the current sector is required to be set according to the second driving debug signal PWM 2.
(2) When the first sampling interval Ta is smaller than the minimum sampling time interval Tmin, the first sampling interval Ta is required to perform pulse width modulation on the second driving debug signal PWM2 or the third driving debug signal PWM3, and at this time, the first sampling point time of the current sector can be set according to the third driving debug signal PWM3 after pulse width modulation, and the second sampling point time of the current sector can be set according to the second driving debug signal PWM 2; or, the first sampling point time of the current sector can be set according to the third driving debugging signal PWM3, and the second sampling point time of the current sector can be set according to the second driving debugging signal PWM2 after pulse width modulation.
(3) When the first sampling interval Tb is smaller than the minimum sampling time interval Tmin, the first driving debug signal PWM2 or the first driving debug signal PWM1 needs to be pulse-width modulated, and at this time, the first sampling point time of the current sector can be set according to the third driving debug signal PWM3, and the second sampling point time of the current sector can be set according to the second driving debug signal PWM2 after pulse-width modulation; or, the first sampling point time of the current sector may be set according to the third driving debug signal PWM3, and the second sampling point time of the ADC may be set according to the second driving debug signal PWM 2.
(4) When the first sampling interval Ta and the second sampling interval Tb are smaller than the minimum sampling time interval Tmin, the first sampling interval Ta and the second sampling interval Tb need to sequentially perform pulse width modulation on the second driving debug signal PWM2 and the third driving debug signal PWM3, or need to sequentially perform pulse width modulation on the second driving debug signal PWM2 and the first driving debug signal PWM1, at this time, the first sampling point time of the current sector can be set according to the third driving debug signal PWM3 after pulse width modulation, and the second sampling point time of the current sector can be set according to the second driving debug signal PWM2 after pulse width modulation; or, the first sampling point time of the current sector can be set according to the third driving debugging signal PWM3, and the second sampling point time of the current sector can be set according to the second driving debugging signal PWM2 after pulse width modulation.
Therefore, when the sampling point time of the current sector is set according to the current three-phase driving debugging signal, the current three-phase driving debugging signal is possibly subjected to pulse width modulation, so that the first sampling interval and the second sampling interval can meet the minimum sampling time interval requirement, the sampling problem of a sampling blind area in a single-resistance sampling mode can be solved, the sector is switched smoothly, and the power consumption and the noise of a motor are further reduced.
It should be noted that, in the above method steps of the embodiment of the present application, the method steps are all correspondingly described by taking "the three-phase driving debug signal of the current sector motor is sequenced from small to large according to the pulse width, and the first driving debug signal PWM1, the second driving debug signal PWM2 and the third driving debug signal PWM3 are sequentially obtained as examples, which are only for more intuitively describing the technical scheme of the present application, and therefore, the present application is not limited to the patent scope of the present application.
As shown in fig. 11, in one embodiment, the present invention proposes a terminal 20, where the terminal 20 includes a memory 21, a processor 22, a program stored on the memory and running on the processor, and a data bus 23 for implementing connection communication between the processor 21 and the memory 22, and the program is executed by the processor to implement the steps of the current sampling method in the foregoing embodiment, which is specifically described above and will not be repeated herein.
It should be noted that, the embodiment of the terminal 20 of the embodiment of the present invention and the embodiment of the current sampling method belong to the same concept, the specific implementation process is detailed in the embodiment of the current sampling method, and the technical features in the embodiment of the current sampling method are correspondingly applicable in the embodiment of the terminal 20, which is not repeated herein.
In one embodiment, the embodiment of the present invention proposes a storage medium, which is used for computer readable storage, where the storage medium stores one or more programs, and the one or more programs may be executed by one or more processors, so as to implement specific steps of the current sampling method in the foregoing embodiment, which is specifically described above and will not be repeated herein.
It should be noted that, the storage medium and the current sampling method embodiment belong to the same concept, the specific implementation process is detailed in the current sampling method embodiment, and technical features in the current sampling method embodiment are correspondingly applicable in the storage medium embodiment, which is not described herein.
Although the application has been shown and described with respect to one or more implementations, equivalent alterations and modifications will occur to others skilled in the art based upon a reading and understanding of this specification and the annexed drawings. The present application includes all such modifications and alterations and is limited only by the scope of the following claims. In particular regard to the various functions performed by the above described components, the terms used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the specification.
That is, the foregoing embodiments of the present application are merely examples, and are not intended to limit the scope of the present application, and all equivalent structures or equivalent processes using the descriptions of the present application and the accompanying drawings, such as the combination of technical features of the embodiments, or direct or indirect application in other related technical fields, are included in the scope of the present application.
In addition, the present application may be identified by the same or different reference numerals for structural elements having the same or similar characteristics. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more features. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the present application, the term "exemplary" is used to mean "serving as an example, instance, or illustration. Any embodiment described as "exemplary" in this disclosure is not necessarily to be construed as preferred or advantageous over other embodiments. The previous description is provided to enable any person skilled in the art to make or use the present application. In the above description, various details are set forth for purposes of explanation. It will be apparent to one of ordinary skill in the art that the present application may be practiced without these specific details. In other instances, well-known structures and processes have not been shown in detail to avoid unnecessarily obscuring the description of the application. Thus, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.
Claims (12)
1. A method of current sampling comprising the steps of:
driving a motor by adopting an SVPWM mode to form a plurality of sectors for vector control;
sequencing three-phase driving debugging signals of a current sector motor from small pulse width to large pulse width to sequentially obtain a first driving debugging signal, a second driving debugging signal and a third driving debugging signal;
Obtaining a first sampling interval according to the second driving debugging signal and the third driving debugging signal, and obtaining a second sampling interval according to the first driving debugging signal and the second driving debugging signal;
if the first sampling interval and/or the second sampling interval is smaller than the minimum sampling time interval, performing pulse width modulation on at least one driving debugging signal in the three-phase driving debugging signals;
Setting sampling point time of a current sector according to the current three-phase driving debugging signal, and carrying out three-phase current sampling and reconstruction reduction on the motor after the sampling point time of all sectors is set, so as to obtain three-phase current of the motor.
2. The current sampling method according to claim 1, wherein the step of obtaining the first sampling interval according to the second driving debug signal and the third driving debug signal, and obtaining the second sampling interval according to the first driving debug signal and the second driving debug signal, specifically comprises:
sequentially acquiring first time, second time and third time for starting to output a target level in the first driving debugging signal, the second driving debugging signal and the third driving debugging signal;
The first sampling interval is obtained according to the time difference between the second time and the third time, and the second sampling interval is obtained according to the time difference between the first time and the second time.
3. The current sampling method according to claim 1, wherein the step of pulse width modulating at least one of the three-phase drive debug signals if the first sampling interval and/or the second sampling interval is smaller than a minimum sampling time interval specifically comprises:
and if the first sampling interval is smaller than the minimum sampling time interval, performing pulse width modulation on the second driving debugging signal or the third driving debugging signal.
4. The current sampling method according to claim 3, wherein the step of setting the sampling point time of the current sector according to the current three-phase driving debug signal specifically comprises:
Setting a first sampling point time of a current sector according to a third driving debugging signal after pulse width modulation, and setting a second sampling point time of the current sector according to the second driving debugging signal;
or, setting the first sampling point time of the current sector according to the third driving debugging signal, and setting the second sampling point time of the current sector according to the second driving debugging signal after pulse width modulation.
5. The current sampling method according to claim 1, wherein the step of pulse width modulating at least one of the three-phase driving debug signals if the first sampling interval and/or the second sampling interval is smaller than a minimum sampling time interval specifically comprises:
And if the second sampling interval is smaller than the minimum sampling time interval, performing pulse width modulation on the first driving debugging signal or the second driving debugging signal.
6. The current sampling method according to claim 5, wherein the step of setting the sampling point time of the current sector according to the current three-phase driving debug signal specifically comprises:
setting a first sampling point time of the current sector according to the third driving debugging signal, and setting a second sampling point time of the current sector according to a second driving debugging signal after pulse width modulation;
or, setting the first sampling point time of the current sector according to the third driving debugging signal, and setting the second sampling point time of the current sector according to the second driving debugging signal.
7. The current sampling method according to claim 1, wherein the step of pulse width modulating at least one of the three-phase drive debug signals if the first sampling interval and/or the second sampling interval is smaller than a minimum sampling time interval specifically comprises:
And if the first sampling interval and the second sampling interval are smaller than the minimum sampling time interval, sequentially performing pulse width modulation on the second driving debugging signal and the third driving debugging signal or sequentially performing pulse width modulation on the second driving debugging signal and the first driving debugging signal.
8. The current sampling method according to claim 7, wherein the step of setting the sampling point time of the current sector according to the current three-phase driving debug signal specifically comprises:
setting a first sampling point time of the current sector according to the third driving debugging signal after pulse width modulation, and setting a second sampling point time of the current sector according to the second driving debugging signal after pulse width modulation;
or, setting the first sampling point time of the current sector according to the third driving debugging signal, and setting the second sampling point time of the current sector according to the second driving debugging signal after pulse width modulation.
9. The current sampling method according to any one of claims 1 to 8, wherein said pulse width modulation comprises pulse width expansion modulation or pulse width reduction modulation.
10. The current sampling method according to claim 9, wherein after pulse width expansion modulating the driving debug signal, the pulse width modulation further comprises performing a secondary modulation within the same PWM period on the driving debug signal after pulse width expansion modulating.
11. A current sampling apparatus, comprising: a memory, a processor, a program stored on and running on the memory, and a data bus for enabling a connected communication between the processor and the memory, which program, when being executed by the processor, implements the steps of the method according to any of claims 1-10.
12. A storage medium for computer readable storage, wherein the storage medium stores one or more programs executable by one or more processors to implement the steps of the method of any of claims 1-10.
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| CN112422017A (en) * | 2020-10-28 | 2021-02-26 | 湖南东嘉智能科技有限公司 | A Single Resistor Sampling Method |
| CN113687126A (en) * | 2021-07-22 | 2021-11-23 | 上海新时达电气股份有限公司 | Single-resistor current sampling method and device |
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| JP5309232B2 (en) * | 2012-02-01 | 2013-10-09 | ファナック株式会社 | PWM rectifier for driving a motor having a modulation type selection unit |
| CN103765757B (en) * | 2012-08-15 | 2016-05-11 | 深圳市英威腾电气股份有限公司 | A kind of method for reconstructing phase current and device thereof |
| CN110868123B (en) * | 2018-08-09 | 2022-03-25 | 北京大学 | Asymmetric SVPWM Reconstruction Method for Motor Based on Inserting Zero Vector |
| CN109347397A (en) * | 2018-12-13 | 2019-02-15 | 株洲易力达机电有限公司 | The current of electric method of sampling and system based on three resistance of three-phase drive bridge lower bridge arm |
| CN113872486B (en) * | 2021-09-27 | 2023-10-03 | 佛山市顺德区美的电子科技有限公司 | Three-phase current reconstruction method, device, equipment and storage medium |
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