CN114615580B - Microphone circuit and microphone packaging structure - Google Patents
Microphone circuit and microphone packaging structure Download PDFInfo
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- CN114615580B CN114615580B CN202210511424.9A CN202210511424A CN114615580B CN 114615580 B CN114615580 B CN 114615580B CN 202210511424 A CN202210511424 A CN 202210511424A CN 114615580 B CN114615580 B CN 114615580B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R1/00—Details of transducers, loudspeakers or microphones
- H04R1/08—Mouthpieces; Microphones; Attachments therefor
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R29/00—Monitoring arrangements; Testing arrangements
- H04R29/004—Monitoring arrangements; Testing arrangements for microphones
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Abstract
The invention provides a microphone circuit and a microphone packaging structure, wherein the microphone circuit comprises: the sensor module is used for acquiring a sound signal; the signal processing module is used for carrying out signal processing on the sound signal to obtain a processed signal; the output calibration module is used for carrying out output calibration on the processing signal to obtain an output calibration signal; the first anti-interference filter circuit is used for filtering an input power supply signal; the second anti-interference filter circuit is used for carrying out filter processing on the output calibration signal; the input end of the signal processing module and the output end of the first anti-interference filter circuit are electrically connected with the first test pin, and the first test pin is used for inputting test signals. The invention is convenient for testing the internal circuit of the microphone circuit board packaging structure and reduces the influence of capacitance burying and resistance burying.
Description
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to a microphone circuit and a microphone packaging structure.
Background
At present, many microphones pursue functional diversification, and not only need to meet performance requirements, but also the anti-interference capability, the antistatic capability and the like are all measurement indexes. Therefore, the embedded capacitor and the embedded resistor are added on the Circuit board PCB to enhance the anti-interference and anti-static capabilities, but also due to the existence of the resistor on the Circuit board, the burning Circuit of the Application Specific Integrated Circuit (ASIC) chip cannot obtain enough energy to burn out the fuse unit, so that the output signal of the microphone cannot be adjusted to a consistent sensitivity. Meanwhile, in order to pursue performance of the existing microphone circuit, the circuit is more and more complex, and a failure module cannot be accurately positioned after failure occurs.
Therefore, there is a need to provide a novel microphone circuit and microphone package structure to solve the above-mentioned problems in the prior art.
Disclosure of Invention
The invention aims to provide a microphone circuit and a microphone packaging structure, which are convenient for testing an internal circuit of the microphone circuit board packaging structure, reducing the influence caused by an anti-interference filter circuit consisting of a capacitor and a resistor and being convenient for adjusting the internal circuit of the microphone circuit board packaging structure.
To achieve the above object, the microphone circuit of the present invention includes:
the sensor module is used for acquiring a sound signal;
the signal processing module is electrically connected with the sensor module and is used for carrying out signal processing on the sound signal to obtain a processed signal;
the output calibration module is electrically connected with the signal processing module and is used for carrying out output calibration on the processing signal so as to obtain an output calibration signal;
the first anti-interference filter circuit is electrically connected with the input end of the signal processing module and is used for filtering an input power supply signal;
the second anti-interference filter circuit is electrically connected with the output end of the output calibration module and is used for filtering the output calibration signal;
the input end of the signal processing module and the output end of the first anti-interference filter circuit are electrically connected with the first test pin, and the first test pin is used for inputting test signals.
The microphone circuit has the advantages that: carry out filtering processing to the power signal of input through first anti-interference filter circuit, obtain the signal processing after the sound signal of sensor module has been handled to the signal processing module, later export the calibration in order to obtain the output calibration signal through the output calibration module, and carry out filtering processing to the output calibration signal through second anti-interference filter circuit, thereby guarantee output signal's accuracy, reduce the interference effect, and through setting up first test pin, before whole circuit uses, through to first test pin input test signal, so that test power signal can directly enter into the inside calibration test of circuit through first test pin.
Optionally, an input end of the first anti-interference filter circuit is electrically connected to the first test pin to form a closed-loop circuit, so that the first anti-interference filter circuit is subjected to an abnormal test through the test signal. The beneficial effects are that: thereby form closed loop circuit through connecting first test pin and first anti-interference filter circuit's input to input signal carries out the anomaly test to first anti-interference filter circuit inside.
Optionally, the microphone circuit further includes a second test pin, and the output end of the output calibration module and the input end of the second anti-interference filter circuit are electrically connected to the second test pin, so that after the first test pin inputs the test signal, the test output signal processed by the signal processing module and the output calibration module is output through the second test pin, and the output calibration module and the signal processing module are subjected to an abnormal test according to the test signal and the test output signal. The beneficial effects are that: the test signal is input into the whole circuit through the first test pin, and the test output signal after the test is output through the second test pin, so that the signal processing module and the output calibration module of the whole circuit can be detected and analyzed conveniently according to the test signal and the test output signal, and whether the signal processing module and the output calibration module work normally or not can be determined through detection and analysis.
Optionally, an output end of the second anti-interference filter circuit is connected to a signal output end of a product, and the second test pin is connected to an output end of the second anti-interference filter circuit to form a closed loop circuit, so as to perform an abnormal test on the second anti-interference filter circuit. The beneficial effects are that: the second anti-interference filter circuit is connected with the second test pin to form a closed loop circuit, so that the second anti-interference filter circuit can be conveniently subjected to abnormal test through the input signal of the second test pin.
The invention also provides a microphone packaging structure which comprises a processing chip, a circuit board, a sensor chip and the microphone circuit, wherein the microphone circuit and the processing chip are both arranged on the circuit board, the sensor module is arranged in the sensor chip, the signal processing module and the output calibration module are both arranged in the processing chip, one side of the circuit board, which is far away from the processing chip, is provided with an input pin, an output pin and a first test pin, the first anti-interference filter circuit and the second anti-interference filter circuit are both arranged in the circuit board, the input pin is connected with the input end of the first anti-interference filter circuit, the output pin is electrically connected with the output end of the second anti-interference filter circuit, and the first test pin penetrates through the circuit board to be connected with the input end of the signal processing module and the output end of the first anti-interference filter circuit And the end is electrically connected so as to input a test signal through the first test pin to carry out internal calibration on the output calibration module.
The microphone packaging structure has the beneficial effects that: in the microphone packaging structure, the working power supply signal is normally input into the whole circuit through the input pin, and under the condition that the use of the whole microphone is not influenced, the internal calibration of the output calibration module in the microphone circuit is conveniently carried out by inputting the test signal through the first test pin.
Optionally, the circuit board includes a buried resistance layer, a first combination layer, a buried capacitor dielectric layer and a second combination layer which are sequentially arranged, a first resistor is arranged on the buried resistance layer, and the processing chip and the sensor chip are both arranged on the buried resistance layer.
Optionally, a first connection pin connected to the input end of the processing chip is disposed on the circuit board, the first connection pin is connected to the output end of the first anti-interference filter circuit and the first test pin, and the first test pin is connected to the input pin to form a closed-loop structure, so as to perform anomaly detection on the first anti-interference filter circuit. The beneficial effects are that: through setting up the first connecting pin of being connected with first test pin and first anti-interference filter circuit's output for form closed loop circuit between first test pin and the first anti-interference filter circuit, so that carry out the anomaly detection to first anti-interference filter circuit.
Optionally, at least one group of first hole structures is arranged inside the circuit board, each group of first hole structures comprises a first blind hole, a second blind hole, a third blind hole and a first through hole, one side of the circuit board, which is far away from the processing chip, is provided with a first grounding pin, the first grounding pin passes through the first blind hole and is connected with a second combination layer, the first combination layer passes through the second blind hole and is connected with an input pin, the second combination layer, the first combination layer and the first grounding pin form a first capacitance structure, the first combination layer passes through the third blind hole and is connected with a first resistor in a buried resistance layer, the first resistor and the first capacitance structure form a first anti-interference filter circuit, and the first testing pin passes through the first through hole and is connected with the first connecting pipe pin.
Optionally, gaps are left between the first blind hole, the second blind hole, the third blind hole and the side wall of the first through hole and an internal circuit. The beneficial effects are that: the contact between the first blind hole, the second blind hole, the third blind hole and the circuit in the first through hole and the material layer in the circuit board is avoided.
Optionally, the microphone package structure includes a second test pin, where the second test pin is connected to an output end of the output calibration module in the processing chip to output a test signal, so as to perform a calibration test on the processing chip according to the first test pin and the second test pin. The beneficial effects are that: the signal processing circuit and the output calibration circuit in the processing chip can be calibrated and tested conveniently.
Optionally, a second connection pin connected to the output end of the processing chip is disposed on the circuit board, the second connection pin is connected to the input end of the second anti-interference filter circuit and the input end of the second test pin, and the second test pin is connected to the output pin to form a closed loop structure, so as to perform an abnormal test on the second anti-interference filter circuit. The beneficial effects are that: the second anti-interference filter circuit is conveniently tested for anomalies prior to use.
Optionally, a second resistor is disposed on the resistance-embedding layer, at least one group of second hole structures is disposed inside the circuit board, each group of second hole structures includes a fourth blind hole, a fifth blind hole, a sixth blind hole and a second through hole, a second grounding pin is arranged on one side of the circuit board far away from the processing chip and is connected with the second combination layer through the fourth blind hole, the first combination layer is connected with an output pin through the fifth blind hole, the second combination layer, the first combination layer and the second grounding pin form a second capacitor structure, and the first combination layer is connected with the second resistor in the buried resistance layer through the sixth blind hole, the second resistor and the second capacitor structure form the second anti-interference filter circuit, and the second test pin is connected with the second connecting pin through the second through hole.
Optionally, gaps are left between the fourth blind hole, the fifth blind hole, the sixth blind hole and the side wall of the second through hole and an internal circuit. The beneficial effects are that: and the contact between the circuits in the fourth blind hole, the fifth blind hole, the sixth blind hole and the second through hole and the material layer in the circuit board is avoided.
Optionally, first combination layer is including the first circuit layer, the first substrate layer and the first polarity layer of burying that set gradually, second combination layer is including the second that sets gradually bury and is held polarity layer, second substrate layer and second circuit layer, it sets up to bury the layer of hindering on the first circuit layer, first bury hold polarity layer with bury and hold the relative setting in one side of dielectric layer, the second bury hold polarity layer with bury and hold the relative setting in another side of dielectric layer.
Optionally, a package shell is arranged on the circuit board, and the processing chip and the sensor chip are both arranged inside the package shell.
Optionally, a sound inlet hole is formed in the top end of the package housing or the circuit board, and the sensor module is configured to convert the sound signal collected through the sound inlet hole into an electrical signal to be output to the signal processing module.
Optionally, a size of any one of the first test pin and the second test pin is smaller than or larger than a size of the input pin and a size of the output pin. The beneficial effects are that: the difference between the first test pin and the second test pin and the difference between the input pin and the output pin are distinguished conveniently, the polarity is distinguished conveniently, and the use error is effectively avoided.
Drawings
Fig. 1 is a schematic circuit diagram of a first circuit structure of the microphone circuit according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a second circuit structure of the microphone circuit according to the embodiment of the invention;
fig. 3 is a schematic cross-sectional view illustrating a microphone package structure provided with a first test pin according to an embodiment of the invention;
fig. 4 is a schematic cross-sectional view illustrating a second test pin of the microphone package structure according to an embodiment of the invention;
fig. 5 is another schematic structural diagram of the microphone package structure according to the embodiment of the invention;
fig. 6 is a bottom view of the microphone package structure according to the embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the present invention, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. As used herein, the word "comprising" and similar words are intended to mean that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items.
To solve the problems in the prior art, the present invention provides a microphone circuit, referring to fig. 1, including:
a sensor module 101 for acquiring a sound signal;
a signal processing module 102, electrically connected to the sensor module 101, for performing signal processing on the sound signal to obtain a processed signal;
an output calibration module 103 electrically connected to the signal processing module 102, configured to perform output calibration on the processed signal to obtain an output calibration signal;
the first anti-interference filter circuit 104 is electrically connected with the input end of the signal processing module 102 and is used for filtering an input power signal;
a second anti-interference filter circuit 105 electrically connected to the output end of the output calibration module 103, and configured to perform filtering processing on the output calibration signal;
the test device further comprises a first test pin 106, wherein the input end of the signal processing module 102 and the output end of the first anti-interference filter circuit 104 are electrically connected to the first test pin 106, and the first test pin 106 is used for inputting a test signal.
In this embodiment, when the microphone circuit normally works, a power signal is input to the input end of the first anti-interference filter circuit 104, the power signal is transmitted to the signal processing module 102 for power supply after being filtered by the first anti-interference filter circuit 104, a sound signal collected by the sensor module 101 is transmitted to the signal processing module 102 for signal processing to obtain a processed signal, the processed signal is transmitted to the output calibration module 103 for calibration to obtain an output calibration signal, and then the processed signal is transmitted to the second anti-interference filter circuit 105 for output filter processing, so that a final output signal can be obtained. The input end of the signal processing module 102 and the output end of the first anti-interference filter circuit 104 are electrically connected to the first test pin 106, so that the internal calibration of the circuit is facilitated by inputting a test signal through the first test pin 106, and the first test pin 106 is independent from other pin interfaces, so that the internal influence of the circuit is avoided.
Exemplarily, because a power signal can lose part of energy if passing through the first anti-interference filter circuit 104, the input power signal output calibration module 103 cannot obtain enough energy to blow a fuse unit, and the output calibration module 103 cannot be calibrated, in this scheme, a test signal is directly input at the first test pin 106 without loss through the first anti-interference filter circuit 104, and the test signal passes through the signal processing module 102, the output calibration module 103 and the second anti-interference filter circuit 105 in sequence and then is output through a signal output end, so that the calibration test of the output calibration module 103 in the whole circuit is facilitated.
In still other embodiments, an input of the first anti-jammer circuit 104 is electrically connected to the first test pin 106 to form a closed loop circuit for exception testing of the first anti-jammer circuit 104 with the test signal.
In this embodiment, a closed loop circuit is formed by electrically connecting the input terminal of the first anti-interference circuit 104 and the first test pin 106, so that the test signal input from the first test pin 106 can perform an abnormal test on the first anti-interference filter circuit 104, so as to detect whether the first anti-interference filter circuit 104 is normal in time.
In some other embodiments, referring to fig. 2, the microphone circuit further includes a second test pin 107, and both the output terminal of the output calibration module 103 and the input terminal of the second anti-interference filter circuit 105 are electrically connected to the second test pin 107, so that after the test signal is input to the first test pin 106, the test output signal processed by the signal processing module 102 and the output calibration module 103 is output through the second test pin 107, and the output calibration module 103 and the signal processing module 102 are tested for an abnormality according to the test signal and the test output signal.
In this embodiment, by adding the second test pin 107, the test signal input from the first test pin 106 can be output through the second test pin 107 after sequentially passing through the signal processing module 102 and the output calibration module 103, so that the signal processing module 102 and the output calibration module 103 in the whole circuit can be detected according to the test signal input from the first test pin 106 and the test output signal output from the second test pin 107, and whether the signal processing module 102 and the output calibration module 103 are normal or not can be analyzed, and if there is a problem, the signal processing module and the output calibration module 103 can be processed in time.
In some embodiments, the output terminal of the second anti-interference filter circuit 105 is connected to a signal output terminal of a product, and the second test pin 107 is connected to the output terminal of the second anti-interference filter circuit 105 and forms a closed loop circuit to perform an anomaly test on the second anti-interference filter circuit 105.
In this embodiment, since the second test pin 107 is connected to the output end of the second anti-interference filter circuit 105, a closed loop circuit is formed between the second test pin 107 and the second anti-interference filter circuit 105, and after the test signal is input through the second test pin 107, the test signal is detected inside the second anti-interference filter circuit 105, so as to detect whether the second anti-interference filter circuit 105 is abnormal.
The invention further provides a microphone packaging structure, referring to fig. 2 and fig. 3, comprising a processing chip 2, a circuit board 3, a sensor chip 4 and the microphone circuit, wherein the microphone circuit and the processing chip 2 are both mounted on the circuit board 3, the signal processing module 102 and the output calibration module 103 are both disposed inside the processing chip 2, the sensor module 101 is disposed inside the sensor chip 4, one side of the circuit board 3 away from the processing chip 2 is provided with an input pin 301, an output pin (not shown in the figure) and a first test pin 106, the first anti-interference filter circuit 104 and the second anti-interference filter circuit 105 are both disposed inside the circuit board 3, the input pin 301 is connected with an input end of the first anti-interference filter circuit 104, and the output pin is electrically connected with an output end of the second anti-interference filter circuit 105, the first test pin 106 penetrates through the inside of the circuit board 3 to be electrically connected with the input end of the signal processing module 102 and the output end of the first anti-interference filter circuit 104, so as to perform internal calibration on the output calibration module 103 by inputting a test signal through the first test pin 106.
To further explain the microphone packaging structure of the present embodiment, the sensor chip 4 is taken as an MEMS chip, and the processing chip 2 is taken as an ASIC chip, that is, the signal processing module 102 and the output calibration module 103 of the microphone circuit in the present embodiment are disposed in the ASIC chip, and the sensor module 101 is disposed in the MEMS chip.
In this embodiment, the signal processing module 102 and the output calibration module 103 are both disposed inside the processing chip 2, the sensor module 101 is disposed inside the sensor chip 4, and the sensor chip 4 and the processing chip 2 are connected together by a bonding wire. The output pin corresponds to the signal output end of the product, the input pin 301 corresponds to the signal input end of the product, the microphone packaging structure of the scheme works through the input pin 301 and the output pin under normal conditions, but when the product is calibrated internally, if the microphone packaging structure is directly input from the input pin 301, part of energy can be lost when a power supply signal passes through the first anti-interference filter circuit 104, so that the output calibration module 103 of the processing chip 2 cannot obtain enough energy to blow a fuse unit, and the calibration cannot be performed.
In this embodiment, the first test pin 106 is arranged, so that the power input directly reaches the inside of the processing chip 2 through the first test pin 106 in the test process, so as to implement the internal calibration of the product for the output calibration module 103 inside the processing chip 2. And this process is only used as the calibration, still inputs from the input pin 301 of input when the customer uses, will not influence normal use.
In some embodiments, with continued reference to fig. 3, the circuit board 3 includes a buried resistance layer 303, a first combination layer 304, a buried capacitance medium layer 305, and a second combination layer 306, which are sequentially disposed, a first resistor 307 is disposed on the buried resistance layer 303, and the processing chip 2 and the sensor chip 4 are both disposed on the buried resistance layer 303.
In still other embodiments, the circuit board 3 is provided with a first connection pin 308 connected to the input terminal of the processing chip 2, the first connection pin 308 is respectively connected to the output terminal of the first anti-interference filter circuit 104 and the first test pin 106, and the first test pin 106 is connected to the input pin 301 to form a closed-loop structure for performing anomaly detection on the first anti-interference filter circuit 104.
In this embodiment, by providing the first connection pin 308, the output terminal of the first anti-interference filter circuit 104 and the first test pin 106 are both connected to the first connection pin 308, so that after the first test pin 106 is connected to the input pin 301, the output terminal of the first anti-interference filter circuit 104 and the first test pin 106 form a closed-loop circuit structure, so as to input a test signal through the first test pin 106, and perform an anomaly test on the first anti-interference filter circuit 104.
In some embodiments, referring to fig. 3, at least one set of first hole structures is disposed inside the circuit board 3, each set of first hole structures includes a first blind hole 321, a second blind hole 322, a third blind hole 323, and a first through hole 324, a side of the circuit board 3 away from the processing chip 2 is disposed with a first ground pin 309, the first ground pin 309 is connected to the second combination layer 306 through the first blind hole 321, the first combination layer 304 is connected to the input pin 301 through the second blind hole 322, the second combination layer 306, the first combination layer 304, and the first ground pin 309 form a first capacitor structure, and the first combination layer 304 is connected to the first resistor 307 in the buried resistance layer 303 through the third blind hole 323, the first resistor 307 and the first capacitor structure form the first anti-interference filter circuit 104, the first test pin 106 is connected to the first connection pin 308 through the first via 324.
Illustratively, since the first ground pin 309 is connected to the second combined layer 306 through the first blind via 321, the first combined layer 304 is connected to the input pin 301 through the second blind via 322, and the first combined layer 304 and the second combined layer 306 are internally provided with two polarity layers of capacitance respectively, so that the second combined layer 306, the first combined layer 304 and the first ground pin 309 form a first capacitance structure, the first combined layer 304 is connected to the first resistor 307 in the buried resistance layer 303 through the third blind via 323, and the first ground pin 309 is connected to the second combined layer 306 through the first blind via 321, so that the first ground pin 309, the second combined layer 306, the first combined layer 304, the first resistor 307 and the input pin 301 form a first capacitance structure grounded in parallel, so as to form the first anti-interference filter circuit 104, so that after the power signal for the whole microphone to work is input through the input pin 301, the power signal is filtered through the first anti-interference filter circuit 104.
In other embodiments, gaps are left between the sidewalls of the first blind hole 321, the second blind hole 322, the third blind hole 323 and the first through hole 324, so as to perform an isolation function, so as to avoid an abnormal situation caused by the fact that the wires inside the first blind hole 321, the second blind hole 322, the third blind hole 323 and the first through hole 324 contact with various material layers inside the circuit board 3.
In some embodiments, referring to fig. 2 and 4, the microphone package structure further includes a second test pin 107, where the second test pin 107 is connected to an output terminal of the output calibration module 103 in the processing chip 2 to output a test signal, so as to perform a calibration test on the processing chip 2 according to the first test pin 106 and the second test pin 107.
After the test signal is input through the first test pin 106, the test signal sequentially passes through the signal processing module 102 and the output calibration module 103 in the processing chip 2, the test signal is directly output through the second test pin 107, the test signal is directly input and output, the first anti-interference filter circuit 104 and the second anti-interference filter circuit 105 are not needed, the abnormal condition of the test result caused by the loss of partial energy of the anti-interference filter circuit in the test process is avoided, and the test accuracy of the output calibration module 103 in the processing chip 2 is improved.
In still other embodiments, the circuit board 3 is provided with a second connection pin 310 connected to the output terminal of the processing chip 2, the second connection pin 310 is respectively connected to the input terminal of the second anti-interference filter circuit 105 and the input terminal of the second test pin 107, the second test pin 107 is connected to the output pin 302 to form a closed loop structure, and the second anti-interference filter circuit 105 is subjected to an abnormality test.
Illustratively, since the input terminal of the second anti-interference filter circuit 105 and the second test pin 107 are connected through the second connection pin 310, and the output pin 302 is connected to the output terminal of the second anti-interference filter circuit 105, a closed loop circuit structure is formed between the second anti-interference filter circuit 105 and the second test pin 107 by connecting the second test pin 107 and the output pin 302, so as to perform an abnormal test on the second anti-interference filter circuit 105 after the power signal is input.
When the whole microphone works, the working conditions of the signal processing module 102 and the output calibration module 103 in the processing chip 2 can be quickly detected through the first test pin 106 and the second test pin 107, and meanwhile, the signal processing module 102 and the output calibration module 103 can be conveniently adjusted according to the detection result, so that the sensitivity of an output signal is adjusted.
In some embodiments, with continued reference to fig. 2 and fig. 4, a second resistor 311 is disposed on the buried resistance layer 303, at least one set of second hole structures is disposed inside the circuit board 3, each set of the second hole structures includes a fourth blind hole 312, a fifth blind hole 313, a sixth blind hole 314, and a second through hole 315, a second ground pin 316 is disposed on a side of the circuit board 3 away from the processing chip 2, the second ground pin 316 is connected to the second combination layer 306 through the fourth blind hole 312, the first combination layer 304 is connected to the output pin 302 through the fifth blind hole 313, the second combination layer 306, the first combination layer 304, and the second ground pin 316 form a second capacitor structure, and the first combination layer 304 is connected to the second resistor 311 in the buried resistance layer 303 through the sixth blind hole 314, the second resistor 311 and the second capacitor structure form the second anti-interference filter circuit 105, the second test pin 107 is connected to the second connection pin 310 through the second through hole 315.
In this embodiment, for example, since the second ground pin 316 is connected to the second combination layer 306 through the fourth blind via 312, the first assembly layer 304 is connected to the output pins 302 through the fifth blind holes 313, while the first and second combination layers 304 and 306 have disposed therein two polarity layers of capacitance, such that the second combination layer 306, the first combination layer 304 and the second ground pin 316 form a second capacitive structure in parallel to ground, and the first combination layer 304 is connected to the second resistor 311 in the buried resistance layer 303 through the sixth blind via 314, such that the second ground pin 316, the second combination layer 306, the first combination layer 304, the second resistor 311, and the input pin 301 form the second anti-interference filter circuit 105 to facilitate filtering of the power signal by the second anti-interference filter circuit 105.
The power signal input at the input pin 301 is filtered by the first anti-interference filter circuit 104 and the output signal is filtered by the second anti-interference filter circuit 105, thereby improving the accuracy of the final output signal.
In some embodiments, the fourth blind hole 312, the fifth blind hole 313, the sixth blind hole 314, and the second through hole 315 sidewalls are all gapped from internal circuitry. In order to avoid the abnormal situation caused by the contact between the circuits inside the fourth blind via 312, the fifth blind via 313, the sixth blind via 314 and the second through via 315 and the various material layers inside the circuit board 3.
In some embodiments, the first combination layer 304 includes a first circuit layer 3041, a first substrate layer 3042, and a first embedded-capacitor polarity layer 3043, which are sequentially disposed, the second combination layer 306 includes a second embedded-capacitor polarity layer 3061, a second substrate layer 3062, and a second circuit layer 3063, which are sequentially disposed, the embedded-resistor layer 303 is disposed on the first circuit layer 3041, the first embedded-capacitor polarity layer 3043 is disposed opposite to one side of the embedded-capacitor dielectric layer 305, and the second embedded-capacitor polarity layer 3061 is disposed opposite to the other side of the embedded-capacitor dielectric layer 305. So that the first and second buried capacitor polarity layers 3043 and 3061 serve as two poles of a capacitor, respectively, to form a first and second capacitor structure.
In some embodiments, a package housing 5 is disposed on the circuit board 3, and the processing chip 2 and the sensor chip 4 are disposed inside the package housing 5. The processing chip 2 and the sensor chip 4 may be connected together by a wire or a bonding wire, or may adopt other connection manners, which is not described herein again.
In some embodiments, a sound inlet hole 6 is formed in the top end of the package 5 or the circuit board 3, and the sensor module 101 is configured to convert the sound signal collected through the sound inlet hole into an electrical signal to be output to the signal processing module 102.
Taking the circuit board 3 provided with the first test pin 106 as an example, referring to fig. 3, the sound inlet hole 6 is arranged at the top end of the package housing, referring to fig. 5, the sound inlet hole 6 is arranged at the bottom of the circuit board 3, so as to meet the microphone design requirements of different sound inlet requirements.
In some embodiments, the size of any one of the first test pin 106 and the second test pin 107 is smaller or larger than the size of the input pin 301 and the output pin 302.
For example, referring to fig. 6, the first test pin 106, the second test pin 107, the input pin 301, and the output pin 302 all have a square shape, the side lengths of the input pin 301 and the output pin 302 are the same, the side length of the first test pin 106 is smaller than the side length of the input pin 301, and the side length of the second test pin 107 is also smaller than the side length of the input pin 301, so that the first test pin 106, the second test pin 107, the input pin 301, and the output pin 302 can be distinguished quickly, and use errors can be avoided.
It should be noted that the shapes of the first test pin 106, the second test pin 107, the input pin 301 and the output pin 302 may also be other shapes, and are not described herein again.
Although the embodiments of the present invention have been described in detail hereinabove, it is apparent to those skilled in the art that various modifications and variations can be made to these embodiments. However, it is to be understood that such modifications and variations are within the scope and spirit of the present invention as set forth in the following claims. Moreover, the invention as described herein is capable of other embodiments and of being practiced or of being carried out in various ways.
Claims (16)
1. A microphone circuit, comprising:
the sensor module is used for acquiring a sound signal;
the signal processing module is electrically connected with the sensor module and is used for carrying out signal processing on the sound signal to obtain a processed signal;
the output calibration module is electrically connected with the signal processing module and is used for carrying out output calibration on the processing signal so as to obtain an output calibration signal;
the first anti-interference filter circuit is electrically connected with the input end of the signal processing module and is used for filtering an input power supply signal;
the second anti-interference filter circuit is electrically connected with the output end of the output calibration module and is used for filtering the output calibration signal;
the input end of the signal processing module and the output end of the first anti-interference filter circuit are electrically connected with the first test pin, the first test pin is used for inputting test signals, and the input end of the first anti-interference filter circuit is electrically connected with the first test pin to form a closed-loop circuit so as to carry out exception test on the first anti-interference filter circuit through the test signals.
2. The microphone circuit according to claim 1, further comprising a second test pin, wherein the output terminal of the output calibration module and the input terminal of the second anti-interference filter circuit are electrically connected to the second test pin, so that after the test signal is input to the first test pin, the test output signal processed by the signal processing module and the output calibration module is output through the second test pin, and the output calibration module and the signal processing module are tested for abnormality according to the test signal and the test output signal.
3. The microphone circuit of claim 2, wherein the output of the second anti-interference filter circuit is connected to the signal output of the microphone circuit, and the second test pin is connected to the output of the second anti-interference filter circuit to form a closed loop circuit for performing an anomaly test on the second anti-interference filter circuit.
4. A microphone packaging structure is characterized by comprising a processing chip, a circuit board, a sensor chip and the microphone circuit of claim 1, wherein the microphone circuit and the processing chip are mounted on the circuit board, the sensor module is arranged inside the sensor chip, the signal processing module and the output calibration module are arranged inside the processing chip, one side of the circuit board far away from the processing chip is provided with an input pin, an output pin and a first test pin, the first anti-interference filter circuit and the second anti-interference filter circuit are arranged inside the circuit board, the input pin is connected with the input end of the first anti-interference filter circuit, the output pin is electrically connected with the output end of the second anti-interference filter circuit, and the first test pin penetrates through the inside of the circuit board to be connected with the input end of the signal processing module and the first anti-interference filter circuit The output end of the wave circuit is electrically connected to input a test signal through the first test pin to carry out internal calibration on the output calibration module.
5. The microphone package structure of claim 4, wherein the circuit board comprises a buried resistance layer, a first combination layer, a buried capacitor dielectric layer and a second combination layer, wherein the buried resistance layer is provided with a first resistor, and the processing chip and the sensor chip are both disposed on the buried resistance layer.
6. The microphone package structure of claim 5, wherein the circuit board is provided with a first connection pin connected to an input terminal of the processing chip, the first connection pin is respectively connected to an output terminal of the first anti-interference filter circuit and the first test pin, and the first test pin is connected to the input pin to form a closed loop structure for performing anomaly detection on the first anti-interference filter circuit.
7. The microphone package structure of claim 6, wherein at least one set of first hole structures is disposed inside the circuit board, each set of first hole structures comprises a first blind hole, a second blind hole, a third blind hole and a first through hole, a first grounding pin is arranged on one side of the circuit board far away from the processing chip and is connected with the second combination layer through the first blind hole, the first combination layer is connected with the input pin through the second blind hole, the second combination layer, the first combination layer and the first grounding pin form a first capacitor structure, and the first combination layer is connected with the first resistor in the buried resistance layer through the third blind hole, the first resistor and the first capacitor structure form the first anti-interference filter circuit, and the first test pin is connected with the first connecting pin through the first through hole.
8. The microphone package structure of claim 7, wherein the first blind hole, the second blind hole, the third blind hole, and the first via sidewall all leave a gap from internal circuitry.
9. The microphone package structure of claim 5, wherein the microphone package structure comprises a second test pin, and the second test pin is connected to an output terminal of the output calibration module in the processing chip to output a test signal, so as to perform a calibration test on the processing chip according to the first test pin and the second test pin.
10. The microphone package structure of claim 9, wherein a second connection pin connected to an output terminal of the processing chip is disposed on the circuit board, the second connection pin is respectively connected to an input terminal of the second anti-interference filter circuit and an input terminal of the second test pin, the second test pin is connected to the output pin to form a closed loop structure, and the second anti-interference filter circuit is subjected to an abnormal test.
11. The microphone package structure of claim 10, wherein the buried resistance layer has a second resistor disposed thereon, the circuit board has at least one set of second hole structures disposed therein, each set of the second hole structures includes a fourth blind hole, a fifth blind hole, a sixth blind hole and a second through hole, a second ground pin is disposed on a side of the circuit board away from the processing chip, the second ground pin is connected to the second combination layer through the fourth blind hole, the first combination layer is connected to an output pin through the fifth blind hole, the second combination layer, the first combination layer and the second ground pin form a second capacitor structure, the first combination layer is connected to the second resistor in the buried resistance layer through the sixth blind hole, and the second resistor and the second capacitor structure form the second anti-interference filter circuit, the second test pin is connected with the second connecting pin through the second through hole.
12. The microphone package structure of claim 11, wherein the fourth blind hole, the fifth blind hole, the sixth blind hole, and the second through hole sidewall all leave a gap from internal circuitry.
13. The microphone packaging structure of claim 11, wherein the first combination layer comprises a first circuit layer, a first substrate layer and a first embedded-capacitor polarity layer, which are sequentially arranged, the second combination layer comprises a second embedded-capacitor polarity layer, a second substrate layer and a second circuit layer, which are sequentially arranged, the embedded-resistor layer is arranged on the first circuit layer, the first embedded-capacitor polarity layer is arranged opposite to one surface of the embedded-capacitor dielectric layer, and the second embedded-capacitor polarity layer is arranged opposite to the other surface of the embedded-capacitor dielectric layer.
14. The microphone package structure of claim 5, wherein a package housing is disposed on the circuit board, and the processing chip and the sensor chip are disposed inside the package housing.
15. The microphone package structure of claim 14, wherein a sound inlet hole is formed in the top end of the package casing or the circuit board, and the sensor module is configured to convert the sound signal collected through the sound inlet hole into an electrical signal to be output to the signal processing module.
16. The microphone package structure of claim 10, wherein a size of any one of the first test pin and the second test pin is smaller or larger than a size of the input pin and the output pin.
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