CN114546084A - Substrate management controller resetting method, system, storage medium and equipment - Google Patents

Abstract

The invention provides a method, a system, a storage medium and equipment for resetting a baseboard management controller, wherein the method comprises the following steps: setting a plurality of address modes to be selected and a plurality of line width types to be selected of the BMC; responding to the reset of a FLASH controller of the substrate management controller, and selecting one of a plurality of address modes and one of a plurality of line width modes as a reading address mode and a reading line width mode of a starting program for reading the substrate management controller from the FLASH; acquiring a starting program based on a read address mode and a read line width mode, timing a watchdog, and judging whether the starting is successful or not after the watchdog arrives; in response to the boot being unsuccessful, the read address mode is switched to another one of the plurality of address modes that has not been employed or the read line width mode is switched to another one of the plurality of read line width modes that has not been employed to perform a reboot. Based on the method of the invention, the configuration of the controller and the memory is kept consistent in a self-adaptive manner, and the purpose of starting the system is achieved.

Description

A baseboard management controller reset method, system, storage medium and device

technical field

The present invention relates to the technical field of servers, in particular to the technical field of baseboard management controllers for servers, and in particular to a method, system, storage medium and device for resetting a baseboard management controller.

Background technique

With the increasing importance of server management, major server manufacturers have correspondingly enhanced the manageability of servers on their respective hardware platforms, and continued to strengthen their functions. The server's reliable, easy-to-use management features and additional service functions are becoming the core competencies urgently needed by major server manufacturers.

The birth of Intelligent Platform Management Interface (IPMI, Intelligent Platform Management Interface) solves the problem of reliable server management. IPMI defines the communication protocol between hardware devices on the server motherboard (hardware device firmware that supports the IPMI protocol) and the communication protocol interface between system management software (SMS, System Management Software) and hardware devices on the server motherboard. The core of IPMI is a dedicated chip/controller called Baseboard Management Controller (BMC). The management of each managed device by the system management software is realized by communicating with the mainboard controller BMC, as shown in Figure 1.

The startup program of the baseboard management controller BMC is generally stored in the FLASH memory. NOR FLASH can be executed on-chip, so that the application can run directly inside the FLASH flash memory without having to read the code into the system DDR. However, this requires a premise that the address mode and line width mode of the FLASH controller should be consistent with the FLASH memory.

But once the software of the baseboard management controller BMC is reset, for example, the watchdog is reset, the FLASH controller will be reset. At this time, there may be differences in configuration between the FLASH controller and the FLASH memory. This will cause the baseboard management controller BMC to fail to start successfully after reset.

In order to solve this problem, the usual way is to default the FLASH controller to the specified startup mode when starting, such as 3byte startup. And the FLASH memory also defaults to the specified startup mode, such as 3byte startup. Thus, the two are kept consistent.

However, when the FLASH controller is reset, the FLASH memory must be reset at the same time, which is difficult to implement. Therefore, it is generally necessary to use hardware to associate the two to reset.

Therefore, in view of the problems in the prior art, it is necessary to propose an optimized setting method of the baseboard management controller, so as to solve the problem that the FLASH controller and the memory configuration in the baseboard management controller are inconsistent and cannot be started normally during reset, or depend on hardware or other Issues with additional complex operation settings to activate.

SUMMARY OF THE INVENTION

In view of this, the purpose of the present invention is to provide an improved method, system, storage medium and device for resetting a baseboard management controller, so as to solve the problem of inconsistency in the configuration of the controller and memory in the prior art, resulting in failure to start normally during reset, or relying on Due to hardware or other additional complex operation settings to start and so on.

Based on the above object, in one aspect, the present invention provides a method for resetting a baseboard management controller, wherein the method includes the following steps:

Set multiple address modes to be selected and multiple line width types to be selected of the baseboard management controller;

In response to the reset of the FLASH controller of the baseboard management controller, one of the plurality of address modes and one of the plurality of line width modes are selected as the read address mode and read linewidth mode;

Obtain this startup procedure based on this read address pattern and this read line width pattern, make watchdog carry out timing simultaneously, and after this watchdog is timed out, determine whether startup is successful;

In response to the unsuccessful start-up, switching the read address mode to another one of the plurality of address modes that has not been adopted or the read line width mode to another one of the plurality of read line width modes that has not been adopted one to perform a restart.

In some embodiments of the method for resetting a baseboard management controller according to the present invention, the method further comprises:

In response to all address modes and all multiple line width types and combinations being toggled and the restart still unsuccessful, stop the reset and start actions and wait for an external hardware reset.

In some embodiments of the method for resetting a baseboard management controller according to the present invention, in response to the failure to start, the read address mode is switched to another one of the plurality of address modes that has not been used or the read line Switching the width mode to another one of the plurality of read line width modes that has not been used to perform the restart further includes:

The startup program is obtained based on the current read address mode and the current read line width mode,

wherein the current read address mode is the switched address mode and the current read line width mode remains unchanged; or

The current read line width mode is the switched line width mode and the current read address mode remains unchanged.

In some embodiments of the method for resetting a baseboard management controller according to the present invention, in response to the failure to start, the read address mode is switched to another one of the plurality of address modes that has not been used or the read line Switching the width mode to another one of the plurality of read line width modes that has not been used to perform the restart further includes:

The startup program is obtained based on the current read address mode and the current read line width mode, and the watchdog is timed, and after the watchdog expires, it is determined whether the restart is successful.

Another aspect of the present invention also provides a baseboard management controller reset system, wherein the system includes:

a mode selection module, the mode selection module is configured to set multiple address modes to be selected and multiple line width types to be selected of the baseboard management controller;

A reset configuration module, the reset configuration module is configured to select one of the plurality of address modes and one of the plurality of line width modes as reading the baseboard management control from the FLASH in response to the reset of the FLASH controller of the baseboard management controller Read address mode and read line width mode of the startup program of the device;

Startup module, this startup module is configured to obtain this startup program based on this read address pattern and this read line width pattern, make watchdog carry out timing simultaneously, and after this watchdog arrives, judge whether startup is successful;

A restart module, the restart module is configured to switch the read address mode to another one of the plurality of address modes that has not been used or to switch the read line width mode to the plurality of read address modes in response to an unsuccessful start Take another one of the line width modes that has not been used to perform a restart.

In some embodiments of the baseboard management controller reset system according to the present invention, the system further includes:

A reset termination module configured to stop the reset and start actions and wait for an external hardware reset in response to all address modes and all multiple line width types and combinations being toggled and the restart is still unsuccessful.

In some embodiments of the baseboard management controller reset system according to the present invention, the restart module is further configured:

The startup program is obtained based on the current read address mode and the current read line width mode,

wherein the current read address mode is the switched address mode and the current read line width mode remains unchanged; or

The current read line width mode is the switched line width mode and the current read address mode remains unchanged.

In some embodiments of the baseboard management controller reset system according to the present invention, the restart module is further configured:

The startup program is obtained based on the current read address mode and the current read line width mode, and the watchdog is timed, and after the watchdog expires, it is determined whether the restart is successful.

In yet another aspect of the present invention, a computer-readable storage medium is also provided, storing computer program instructions, and when the computer program instructions are executed, any one of the above-mentioned methods for resetting a baseboard management controller according to the present invention is implemented.

In yet another aspect of the present invention, a computer device is also provided, including a memory and a processor, where a computer program is stored in the memory, and when the computer program is executed by the processor, any one of the above-mentioned baseboard management controllers according to the present invention is executed reset method.

The present invention has at least the following beneficial technical effects: based on the present invention, a chip software watchdog reset method based on an SPI (Serial Peripheral Interface, Serial Peripheral Interface) controller of a baseboard management controller BMC is provided, which adaptively allows The FLASH controller is consistent with the FLASH memory configuration, so as to achieve the purpose of starting the system. When the software resets or the watchdog resets the FLASH controller, the address line width mode can be adaptively selected to achieve a certain configuration consistent with the FLASH memory configuration. mode; a watchdog timer is configured to reset the controller periodically, only when the system starts successfully, it will not be reset all the time because the system re-feeds the dog; and the FLASH controller will cycle through various possibilities until the system succeeds Or eventually fail and give up.

Description of drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only These are some embodiments of the present invention. For those of ordinary skill in the art, other embodiments can also be obtained according to these drawings without creative efforts.

In the picture:

Fig. 1 shows the overall logical schematic diagram of the baseboard management controller function;

Fig. 2 shows a schematic block diagram of an embodiment of a method for resetting a baseboard management controller according to the present invention;

3 shows a schematic block diagram of an embodiment of a baseboard management controller reset system according to the present invention;

4 shows a schematic diagram of an embodiment of a computer-readable storage medium implementing a method for resetting a baseboard management controller according to the present invention;

Fig. 5 shows a schematic diagram of the hardware structure of an embodiment of a computer device for implementing a method for resetting a baseboard management controller according to the present invention.

Detailed ways

In order to make the objectives, technical solutions and advantages of the present invention clearer, the embodiments of the present invention will be described in further detail below in conjunction with the specific embodiments and with reference to the accompanying drawings.

It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are for the purpose of distinguishing two non-identical entities or non-identical parameters with the same name. " is only for the convenience of expression, and should not be construed as a limitation on the embodiments of the present invention. Furthermore, the terms "comprising" and "having", and any variations thereof, are intended to cover non-exclusive inclusion, e.g., other steps or units inherent in a process, method, system, product or device comprising a series of steps or units.

The invention mainly solves the problem of the watchdog reset of the SPI controller in the BMC design based on FPGA or chip. Simply put, the concept of the present invention is based on configuring the watchdog timer and repeatedly switching between different address modes and line width modes, such as 3bytes and 4bytes, single line width mode and four line width mode, try SPI (Serial Peripheral Interface, serial line peripheral interface) FLASH startup.

To this end, a first aspect of the present invention provides a method 100 for resetting a baseboard management controller. FIG. 2 shows a schematic block diagram of an embodiment of a method for resetting a baseboard management controller according to the present invention. In the embodiment shown in Figure 2, the method includes:

Step S110: setting multiple address modes to be selected and multiple line width types to be selected of the baseboard management controller;

Step S120: In response to the reset of the FLASH controller of the baseboard management controller, select one of the plurality of address modes and one of the plurality of line width modes as the reading of the startup program of the baseboard management controller from FLASH, respectively Address mode and read line width mode;

Step S130: obtaining the startup program based on the read address mode and the read line width mode,

At the same time, the watchdog is timed, and after the watchdog expires, it is judged whether the startup is successful;

Step S140 : In response to the unsuccessful startup, switch the read address mode to another one of the plurality of address modes that has not been used or switch the read line width mode to one of the plurality of read line width modes that has not been used another one that has been passed to perform a restart.

In general, in view of the above problems in the prior art, when the software resets or the watchdog resets the FLASH controller, the address line width mode can be adaptively selected so as to achieve a mode in which a certain configuration is consistent with the configuration of the FLASH memory. So as to achieve the purpose of starting the system. During this period, the controller is reset periodically. Only when the system is successfully started, it will not be reset all the time because of the re-feeding of the system, and the FLASH controller will cycle through various possibilities until the system succeeds or finally fails to give up.

In order to realize the above functions, it is first necessary to determine which address modes and line width modes may be used in the server, more precisely in the baseboard management controller. Therefore, according to the method of the present invention, a plurality of address modes to be selected and a plurality of line width types to be selected of the baseboard management controller are set in step S110. Preferably, two address modes to be selected by the baseboard management controller are set, preferably including a 3bytes address mode and a 4bytes address mode. In addition, two line width types to be selected by the baseboard management controller are set, preferably including a single line width mode and a four line width mode. However, where applicable, there may be more than two address modes and/or more than two line width modes. Therefore, the specific address patterns and line width patterns are not limited to those mentioned above.

Then in step S120, in response to the reset of the FLASH controller of the baseboard management controller, one of the plurality of address modes and one of the plurality of line width modes are respectively selected as the starting procedures for reading the baseboard management controller from the FLASH. Read address mode and read linewidth mode. That is to say, when the FLASH controller of the baseboard management controller is reset due to various reasons, one of the plurality of address modes set in step S110 is automatically selected as the baseboard management controller for reading the baseboard management from FLASH. read address mode of the startup program of the controller, and select one of the plurality of line width modes set in step S110 as the read line width mode for reading the startup program of the baseboard management controller from FLASH. After the controller is reset, it will automatically start reading data from the 0 address of the FLASH memory and execute it. Preferably, the read address mode is a 3bytes address mode by default, and the read line width mode is a single line width mode by default.

On this basis, in step S130, the startup procedure is obtained based on the read address mode and the read line width mode, while the watchdog is timed, and after the watchdog expires, it is determined whether the startup is successful. That is, after the read address mode and the read line width mode are selected in step S120, the startup program of the baseboard management controller is read from the FLASH based on the selected mode. At the same time, the watchdog is timed. After a period of time, judge whether the ARM system is successfully started. If the ARM system starts successfully, it means that the configuration of the FLASH controller is consistent with the configuration of the FLASH memory, then the watchdog is re-timed so that the FLASH controller will not be reset.

However, if the configuration of the FLASH controller does not match the configuration of the FLASH memory, an unsuccessful boot will result. Therefore, when it is determined in step S130 that the startup is unsuccessful, the read address mode is switched to another one of the plurality of address modes that has not been used or the read line width mode is switched to the plurality of read address modes in step S140 Take another one of the line width modes that has not been used to perform a restart. Specifically, if the ARM system fails to start, it means that the configuration of the FLASH controller is inconsistent with the configuration of the FLASH memory. Every time the watchdog timer resets unsuccessfully, it switches the address mode of the FLASH controller or any configuration of the line width mode. After reset, the FLASH controller will re-read the 0 address of the FLASH memory using the new, switched configuration mode (such as the 4bytes address mode) and try to restart, that is, restart.

In some embodiments of the baseboard management controller reset method 100 according to the present invention, the method further includes:

Step S150: In response to all address modes and all multiple line width types and their combinations being switched and the restart is still unsuccessful, stop the reset and start actions and wait for an external hardware reset.

That is to say, after the system has been started and restarted, and all possible startup program reading methods have been tried, if the system startup is still unsuccessful, it proves that an error has occurred in the system itself, and the system is stopped in step S150. Reset and start the action and wait for the external hardware reset, that is, the FLASH controller chooses to give up the reset and start action, at this time, it can only restart the work after the external hardware reset.

Taking the foregoing preferred embodiment as an example, if the address mode is divided into a 3-bytes address mode and a 4-bytes address mode, the line width type is divided into a single line width mode and a four line width mode. Then, depending on the permutation and combination, a maximum of four switches can complete all possible combinations. When the number of switching reaches the specified maximum value (for example, the maximum value is 4), in other words, all possible combinations have been tried to reset and start, but still cannot start normally, it means that there is an error in the system, and the FLASH controller will Choose to give up. At this time, only by resetting the external hardware can the FLASH controller start working again.

In some embodiments of the method 100 for resetting a baseboard management controller according to the present invention, step S140 switches the read address mode to another one of the plurality of address modes that has not been used or switches the read address mode to another address mode in response to the failure to start the read address mode. Switching the line width mode to another one of the plurality of read line width modes that has not been adopted to perform the restart further includes:

Step S141: obtain this startup program based on the current read address mode and the current read line width mode,

wherein the current read address mode is the switched address mode and the current read line width mode remains unchanged; or

The current read line width mode is the switched line width mode and the current read address mode remains unchanged.

That is to say, when restarting is performed, step S141 adopts the current read address mode and the current read line width mode to obtain the start-up program, at this time one of the above-mentioned two modes is the new, switched mode and the other Keep the original mode. Specifically, wherein the current read address mode is the switched address mode and the current read line width mode remains unchanged; or the current read line width mode is the switched line width mode and the current read line width mode The read address mode remains unchanged. Switching only one of the address mode and the line width mode at a time facilitates traversing all possible combinations in the most compact and fast way.

In some embodiments of the method 100 for resetting a baseboard management controller according to the present invention, step S140 switches the read address mode to another one of the plurality of address modes that has not been used or switches the read address mode to another address mode in response to the failure to start the read address mode. Switching the line width mode to another one of the plurality of read line width modes that has not been adopted to perform the restart further includes:

Step S142: obtain this startup program based on current read address pattern and current read line width pattern and make watchdog carry out timing simultaneously, and after this watchdog arrives,

Determine whether the restart is successful.

Specifically, when restarting is performed, step S142 obtains the startup program based on the current read address mode and the current read line width mode while timing the watchdog, and after the watchdog expires, determine Whether the restart is successful. That is to say, after reset, the FLASH controller will use the new configuration method (such as switched address mode or switched line width mode) to re-read the 0 address of the FLASH memory to start up. The watchdog is also timed, and after a period of time, it is judged whether the restart is successful. If the ARM system starts successfully, the watchdog is re-timed so that it will not cause a reset of the FLASH controller. If the ARM system fails to start, it means that the configuration of the FLASH controller is still inconsistent with the configuration of the FLASH memory. The timing of the watchdog is reset, and the configuration of the FLASH controller is switched again.

Based on the foregoing embodiments of the present invention, the present invention is further explained in a preferred embodiment by taking two address modes, namely 3bytes mode and 4bytes mode and two line width modes, namely single line width mode and four line width mode as examples. .

In this preferred embodiment, first of all, considering that NOR FLASH is characterized by in-chip execution (XIP, eXecuteIn Place, in-chip execution), the application program can run directly in the FLASH flash memory without having to read the code into the system RAM. . After the controller is reset, it will automatically start reading data from the 0 address of the FLASH memory and execute it. The read mode is 3bytes address mode by default, and the line width mode is single line width mode. At this time, the watchdog is timed. After a period of time, if the ARM system BOOT (startup) is successful, the watchdog will be re-timed, so that the FLASH controller will not be reset. If the BOOT of the ARM system is unsuccessful, it means that the configuration of the FLASH controller is inconsistent with the configuration of the FLASH memory. Every time the unsuccessful watchdog timer resets, switch the address mode of the FLASH controller or any configuration of the line width mode.

In this way, after the second reset, the FLASH controller will use a new configuration method (such as a 4bytes address method) to re-read the 0 address of the FLASH memory to start. The watchdog is also timed. After a period of time, if the BOOT of the ARM system is successful, the watchdog will be re-timed, so that the FLASH controller will not be reset. If the BOOT of the ARM system is unsuccessful, it means that the configuration of the FLASH controller is inconsistent with the configuration of the FLASH memory. The timing reset of the watchdog switches the configuration of the FLASH controller again. If the address mode is divided into 3bytes address mode and 4bytes address mode, and the line width type is divided into single line width and four line width mode, then according to the permutation and combination, a maximum of four switching can complete all possible combinations.

When the number of switching reaches the specified maximum value, it means that there is an error in the system, and the FLASH controller will choose to give up. At this time, only the external hardware reset can make the FLASH controller work again.

It should be noted that although the above embodiments focus on the server BMC-based peripheral SPI controller, however, it is contemplated that the method according to the present invention can be used in various systems with SOC, as well as in other system designs.

In addition, the above explanations, advantages and effects of the method for resetting the baseboard management controller according to the present invention are also applicable to the following baseboard management controller resetting system 200 and storage medium 300 according to the present invention without departing from the scope of the present invention and device 400.

In a second aspect of the present invention, a system 200 for resetting a baseboard management controller is also provided. FIG. 3 shows a schematic block diagram of an embodiment of a baseboard management controller reset system 200 according to the present invention. As shown in Figure 3, the system includes:

a mode selection module 210, the mode selection module 210 is configured to set multiple address modes to be selected and multiple line width types to be selected of the baseboard management controller;

A reset configuration module 220, the reset configuration module 220 is configured to select one of the plurality of address modes and one of the plurality of line width modes as reading the substrate from the FLASH in response to the reset of the FLASH controller of the baseboard management controller Manage the read address mode and read line width mode of the startup program of the controller;

Startup module 230, the startup module 230 is configured to obtain the startup program based on the read address mode and the read line width mode, at the same time make the watchdog time, and after the watchdog expires, determine whether the startup is successful ;

Restart module 240, the restart module 240 is configured to switch the read address mode to another one of the plurality of address modes that has not been used or switch the read line width mode to the plurality of address modes in response to an unsuccessful start. One of the read linewidth modes has not yet been used to perform a restart.

In some embodiments of the baseboard management controller reset system 200 according to the present invention, the system further includes:

A reset termination module 250 is configured to stop the reset and start actions and wait for an external hardware reset in response to all address modes and all multiple line width types and combinations thereof being switched and the restart is still unsuccessful.

Further, in some embodiments of the baseboard management controller reset system 200 according to the present invention, the restart module 240 is further configured:

The startup program is obtained based on the current read address mode and the current read line width mode,

wherein the current read address mode is the switched address mode and the current read line width mode remains unchanged; or

The current read line width mode is the switched line width mode and the current read address mode remains unchanged.

In addition, in some embodiments of the baseboard management controller reset system 200 according to the present invention, the restart module 240 is further configured to:

Based on the current read address mode and the current read line width mode, the startup program is obtained and the watchdog is timed, and after the watchdog expires, it is judged whether the restart is successful or not

In a third aspect of the embodiments of the present invention, a computer-readable storage medium is further provided, and FIG. 4 shows a schematic diagram of a computer-readable storage medium according to a method for resetting a baseboard management controller provided by an embodiment of the present invention. As shown in Figure 4, the computer readable storage medium 300 stores computer program instructions 310 that can be executed by a processor. The computer program instructions 310, when executed, implement the method of any of the above-described embodiments.

It should be understood that all the embodiments, features and advantages described above with respect to the BMC resetting method according to the present invention are equally applicable to the BMC resetting system and storage medium according to the present invention, provided that they do not conflict with each other.

In a fourth aspect of the embodiments of the present invention, a computer device 400 is further provided, including a memory 420 and a processor 410, where a computer program is stored in the memory, and when the computer program is executed by the processor, any one of the foregoing implementations is implemented example method.

As shown in FIG. 5 , it is a schematic diagram of a hardware structure of an embodiment of a computer device for executing a method for resetting a baseboard management controller provided by the present invention. Taking the computer device 400 shown in FIG. 5 as an example, the computer device includes a processor 410 and a memory 420, and may also include: an input device 430 and an output device 440. The processor 410, the memory 420, the input device 430 and the output device 440 may be connected by a bus or in other ways, and the connection by a bus is taken as an example in FIG. 5 . The input device 430 may receive input numerical or character information, and generate a signal input related to the reset of the baseboard management controller. The output device 440 may include a display device such as a display screen.

As a non-volatile computer-readable storage medium, the memory 420 can be used to store non-volatile software programs, non-volatile computer-executable programs and modules, such as program instructions corresponding to the resource monitoring method in the embodiments of the present application. /modules. The memory 420 may include a stored program area and a stored data area, wherein the stored program area may store an operating system, an application program required for at least one function; the stored data area may store data created by the use of the resource monitoring method, and the like. Additionally, memory 420 may include high-speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid-state storage device. In some embodiments, memory 420 may optionally include memory located remotely from processor 410, which may be connected to local modules via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

The processor 410 executes various functional applications and data processing of the server by running the non-volatile software programs, instructions and modules stored in the memory 420, that is, implements the resource monitoring method of the above method embodiments.

Finally, it should be noted that computer-readable storage media (e.g., memory) herein can be volatile memory or non-volatile memory, or can include both volatile and non-volatile memory. By way of example and not limitation, nonvolatile memory may include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory memory. Volatile memory may include random access memory (RAM), which may act as external cache memory. By way of example and not limitation, RAM is available in various forms such as Synchronous RAM (DRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDR SDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The storage devices of the disclosed aspects are intended to include, but not be limited to, these and other suitable types of memory.

Those skilled in the art will also appreciate that the various exemplary logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends on the specific application and design constraints imposed on the overall system. Those skilled in the art may implement the functions in various ways for each specific application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.

The various exemplary logical blocks, modules, and circuits described in connection with the disclosure herein can be implemented or executed using the following components designed to perform the functions herein: general purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASIC), Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. A general-purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in combination with a DSP, and/or any other such configuration.

The above are exemplary embodiments of the present disclosure, but it should be noted that various changes and modifications may be made without departing from the scope of the disclosure of the embodiments of the present invention as defined by the claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements disclosed in the embodiments of the present invention may be described or claimed in the singular, unless expressly limited to the singular, the plural is to be understood.

It should be understood that, as used herein, the singular form "a" is intended to include the plural form as well, unless the context clearly supports an exception. It will also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items. The above-mentioned embodiments of the present invention disclose the serial numbers of the embodiments only for description, and do not represent the advantages or disadvantages of the embodiments.

Those of ordinary skill in the art should understand that the discussion of any of the above embodiments is only exemplary, and is not intended to imply that the scope (including the claims) disclosed by the embodiments of the present invention is limited to these examples; under the idea of the embodiments of the present invention , the technical features in the above embodiments or different embodiments can also be combined, and there are many other changes in different aspects of the above embodiments of the present invention, which are not provided in detail for the sake of brevity. Therefore, any omission, modification, equivalent replacement, improvement, etc. made within the spirit and principle of the embodiments of the present invention should be included within the protection scope of the embodiments of the present invention.

Claims (10)

1. A method for resetting a baseboard management controller, wherein the method comprises the following steps: Set multiple address modes to be selected and multiple line width types to be selected of the baseboard management controller; In response to the reset of the FLASH controller of the baseboard management controller, one of the plurality of address patterns and one of the plurality of line width patterns are selected respectively as a read from the FLASH to read the startup program of the baseboard management controller Take address mode and read line width mode; The startup procedure is obtained based on the read address mode and the read line width mode, and the watchdog is timed at the same time, and after the watchdog expires, it is determined whether the startup is successful; In response to the unsuccessful start-up, switching the read address mode to another one of the plurality of address modes that has not been used or switching the read line width mode to one of the plurality of read line width modes that has not been used yet The other one used to perform a restart. 2. The method according to claim 1, wherein the method further comprises: In response to all address modes and all multiple line width types and combinations being switched and the restart still unsuccessful, stop the reset and start actions and wait for an external hardware reset. 3. The method according to claim 1 or 2, characterized in that, in response to the failure to start, switching the read address mode to another one of the plurality of address modes that has not been used yet or switching all the address modes. Switching the read line width mode to another one that has not been used in the plurality of read line width modes to perform restart further includes: The startup procedure is obtained based on the current read address mode and the current read line width mode, wherein the current read address mode is the switched address mode and the current read line width mode remains unchanged; or The current read line width mode is the switched line width mode and the current read address mode remains unchanged. 4. The method according to claim 3, characterized in that, in response to the failure to start, switching the read address mode to another one of the plurality of address modes that has not been used or changing the read address mode Switching the line width mode to another one that has not been used in the plurality of read line width modes to perform restart further includes: The start-up procedure is obtained based on the current read address mode and the current read line width mode, while the watchdog is timed, and after the watchdog expires, it is determined whether the restart is successful. 5. A system for resetting a baseboard management controller, wherein the system comprises: a mode selection module, the mode selection module is configured to set a plurality of address modes to be selected and a plurality of line width types to be selected of the baseboard management controller; A reset configuration module, the reset configuration module is configured to select one of the plurality of address modes and one of the plurality of line width modes as read from the FLASH in response to the reset of the FLASH controller of the baseboard management controller the read address mode and read line width mode of the startup program of the baseboard management controller; a startup module, the startup module is configured to obtain the startup program based on the read address mode and the read line width mode, while timing a watchdog, and after the watchdog expires, determine Whether the startup is successful; A restart module, the restart module is configured to switch the read address mode to another one of the plurality of address modes that has not been used or switch the read line width mode to Another one of the plurality of read line width modes that has not yet been adopted is used to perform a restart. 6. The system of claim 5, further comprising: A reset termination module configured to stop the reset and start actions and wait for an external hardware reset in response to all address modes and all multiple line width types and combinations thereof being switched and the restart is still unsuccessful. 7. The system according to claim 5 or 6, wherein the restart module is further configured: The startup procedure is obtained based on the current read address mode and the current read line width mode, wherein the current read address mode is the switched address mode and the current read line width mode remains unchanged; or The current read line width mode is the switched line width mode and the current read address mode remains unchanged. 8. The system of claim 7, wherein the restart module is further configured: The start-up procedure is obtained based on the current read address mode and the current read line width mode, while the watchdog is timed, and after the watchdog expires, it is determined whether the restart is successful. 9 . A computer-readable storage medium, characterized in that it stores computer program instructions, and when the computer program instructions are executed, the method for resetting a baseboard management controller according to any one of claims 1 to 4 is implemented. 10 . 10. A computer device, comprising a memory and a processor, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the computer program according to any one of claims 1-4 is executed. Baseboard management controller reset method.

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