CN110096366B - A configuration method, device and server for a heterogeneous memory system - Google Patents
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Abstract
本申请公开了一种异构内存系统的配置方法，通过向第一内存管理器发送基于IPMI协议的第一读取命令，并向第二内存管理器发送基于IPMI协议的第二读取命令，获得了动态随机存储器的内存信息与非易失性存储器的内存信息，最终将这些内存信息发送到目标服务器的基本输入输出系统，以对异构内存系统进行管理配置。可见，该方法基于IPMI协议实现两种存储介质内存信息的交互，由于该协议本身用于监控管理服务器状态，因此可以直接利用IPMI协议相关命令实现上述过程，显著降低了开发难度，节省了成本。此外，本申请还提供了一种异构内存系统的配置装置、服务器及计算机可读存储介质，其作用与上述方法相对应。
The present application discloses a method for configuring a heterogeneous memory system. By sending a first read command based on IPMI protocol to a first memory manager, and sending a second read command based on IPMI protocol to a second memory manager, The memory information of the dynamic random access memory and the memory information of the non-volatile memory are obtained, and finally these memory information is sent to the basic input and output system of the target server to manage and configure the heterogeneous memory system. It can be seen that the method realizes the interaction of the memory information of the two storage media based on the IPMI protocol. Since the protocol itself is used to monitor the management server status, the above process can be directly implemented by the relevant commands of the IPMI protocol, which significantly reduces the development difficulty and saves costs. In addition, the present application also provides a configuration device, a server and a computer-readable storage medium for a heterogeneous memory system, the functions of which correspond to the above method.
Description
Technical Field
The present disclosure relates to the field of computers, and in particular, to a method and an apparatus for configuring a heterogeneous memory system, a server, and a computer-readable storage medium.
Background
The nonvolatile memory is a novel storage medium, and compared with the current common DRAM, the nonvolatile memory has the advantages of bit-based access capability, no data loss after power failure, high storage density, low static power consumption, high dynamic power consumption, strong expandability and the like; however, compared to DRAM, NVM typically has similar read latency, one or several orders of magnitude slower write latency, and write times limitation, and it is obvious that using NVM only as system memory cannot meet the real-time requirements of current computer systems. Based on this, the heterogeneous hybrid memory can connect the DRAM and the NVM together to the system bus, and the heterogeneous memory combined in a reasonable manner has the advantages of large capacity, high performance, non-volatility and the like.
The key point of the heterogeneous hybrid memory is how to perform communication between the DRAM and the NVM to obtain respective required memory information, and at present, information is generally transmitted through the communication between the DRAM and the NVM by using the BIOS, but due to hardware limitations and related BIOS logic limitations, such a method is difficult to implement and has a high development cost.
Disclosure of Invention
The application aims to provide a configuration method, a configuration device, a server and a computer readable storage medium of a heterogeneous memory system, which are used for solving the problems of higher difficulty and higher development cost in the traditional mode of communicating and transferring information between a DRAM and an NVM by using a BIOS.
In order to solve the above technical problem, the present application provides a configuration method of a heterogeneous memory system, including:
sending a first reading command based on an IPMI protocol to a first memory manager to acquire memory information of a dynamic random access memory connected with the first memory manager, and sending a second reading command based on the IPMI protocol to a second memory manager to acquire memory information of a nonvolatile memory connected with the second memory manager;
and sending the memory information of the dynamic random access memory and the memory information of the nonvolatile memory to a basic input and output system of a target server so as to manage and configure the dynamic random access memory and the nonvolatile memory.
Optionally, the sending a first read command based on an IPMI protocol to a first memory manager to obtain memory information of a dynamic random access memory connected to the first memory manager, and sending a second read command based on the IPMI protocol to a second memory manager to obtain memory information of a nonvolatile memory connected to the second memory manager includes:
sending a first read command based on an IPMI protocol to a first memory manager to obtain a memory start address of a dynamic random access memory connected with the first memory manager, and sending a second read command based on the IPMI protocol to a second memory manager to obtain the memory capacity of a nonvolatile memory connected with the second memory manager.
Optionally, before the sending the first read command based on the IPMI protocol to the first memory manager to obtain the memory information of the dynamic random access memory connected to the first memory manager, and sending the second read command based on the IPMI protocol to the second memory manager to obtain the memory information of the nonvolatile memory connected to the second memory manager, the method further includes:
and receiving a first read command and a second read command which are sent by the terminal and are based on the IPMI protocol.
Optionally, the first read command and the second read command are pre-stored in a command script file.
Optionally, the first memory manager is a first FPGA chip, and the second memory manager is a second FPGA chip.
Optionally, before the sending the first read command based on the IPMI protocol to the first memory manager to obtain the memory information of the dynamic random access memory connected to the first memory manager, and sending the second read command based on the IPMI protocol to the second memory manager to obtain the memory information of the nonvolatile memory connected to the second memory manager, the method further includes:
sending a slow start command based on an IPMI protocol to a basic input output system of the target server so as to enable QPI of the basic input output system to enter slow start;
after the QPI of the basic input output system finishes the slow start, a fast start instruction is sent to the basic input output system, so that the QPI of the basic input output system enters the fast start, and a communication channel between the target server and the first memory manager is awakened.
The present embodiment further provides a configuration apparatus of a heterogeneous memory system, including:
a reading module: the device comprises a first memory manager, a second memory manager and a controller, wherein the first memory manager is used for sending a first read command based on an IPMI protocol to the first memory manager to obtain memory information of a dynamic random access memory connected with the first memory manager and sending a second read command based on the IPMI protocol to the second memory manager to obtain memory information of a nonvolatile memory connected with the second memory manager;
a configuration module: and the basic input and output system is used for sending the memory information of the dynamic random access memory and the memory information of the nonvolatile memory to a target server so as to manage and configure the dynamic random access memory and the nonvolatile memory.
Optionally, the reading module is specifically configured to:
sending a first read command based on an IPMI protocol to a first memory manager to obtain a memory start address of a dynamic random access memory connected with the first memory manager, and sending a second read command based on the IPMI protocol to a second memory manager to obtain the memory capacity of a nonvolatile memory connected with the second memory manager.
In addition, the present application also provides a server, including:
a memory: for storing a computer program;
a processor: for executing the computer program to implement the steps of the configuration method of the heterogeneous memory system as described above.
Finally, the present application also provides a computer-readable storage medium having stored thereon a computer program for implementing the steps of the method for configuring a heterogeneous memory system as described above when the computer program is executed by a processor.
According to the configuration method of the heterogeneous memory system, the first reading command based on the IPMI protocol is sent to the first memory manager, the second reading command based on the IPMI protocol is sent to the second memory manager, the memory information of the dynamic random access memory connected with the first memory manager and the memory information of the nonvolatile memory connected with the second memory manager are obtained, and finally the memory information of the dynamic random access memory and the memory information of the nonvolatile memory are sent to the basic input and output system of the target server, so that the dynamic random access memory and the nonvolatile memory are managed and configured. Therefore, the method realizes the interaction process of the memory information of the two storage media based on the IPMI protocol, and the IPMI protocol is used for monitoring and managing the state of the hardware equipment of the server, so that the process can be realized by directly utilizing the related commands of the IPMI protocol, the development difficulty is obviously reduced, and the cost is saved.
In addition, the present application also provides a configuration device, a server and a computer readable storage medium of the heterogeneous memory system, and the functions thereof correspond to the above method, and are not described herein again.
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For a clearer explanation of the embodiments or technical solutions of the prior art of the present application, the drawings needed for the description of the embodiments or prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a flowchart illustrating an implementation of a configuration method of a heterogeneous memory system according to an embodiment of the present disclosure;
fig. 2 is a flowchart illustrating a second implementation of a configuration method of a heterogeneous memory system according to a second embodiment of the present disclosure;
fig. 3 is a functional block diagram of an embodiment of a configuration apparatus of a heterogeneous memory system according to the present disclosure;
fig. 4 is a schematic structural diagram of an embodiment of a server provided in the present application.
Detailed Description
The core of the application is to provide a configuration method, a device, a server and a computer readable storage medium of a heterogeneous memory system, which realize the process of transferring the memory information of a dynamic random access memory and a nonvolatile memory based on an IPMI protocol, reduce the development difficulty and save the cost.
In order that those skilled in the art will better understand the disclosure, the following detailed description will be given with reference to the accompanying drawings. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, a first embodiment of a configuration method of a heterogeneous memory system provided in the present application is described below, where the first embodiment includes:
step S101: sending a first read command based on the IPMI protocol to a first memory manager to acquire memory information of a dynamic random access memory connected with the first memory manager, and sending a second read command based on the IPMI protocol to a second memory manager to acquire memory information of a nonvolatile memory connected with the second memory manager.
The heterogeneous Memory system in this embodiment includes a Dynamic Random Access Memory (DRAM), a Non-Volatile Memory (NVM), a first Memory manager and a second Memory manager, which respectively control and manage the two storage media, and is implemented based on an IPMI module of a target server in this embodiment. As described above, in the implementation process, the IPMI module reads the memory information of the corresponding storage medium by sending the read command based on the IPMI protocol to the first memory manager and the second memory manager, respectively. It should be noted that, the present embodiment does not limit the sequence of sending the first read instruction and the second read instruction.
In this embodiment, the first read command and the second read command for reading the memory information are both commands based on an IPMI protocol, where IPMI is an abbreviation of an Intelligent Platform Management Interface (Intelligent Platform Management Interface), and is an industrial standard for managing peripheral devices used in an enterprise system based on an Intel structure, the standard is established by multiple companies, and bmc (baseboard Management controller) is a specific implementation form of the IPMI protocol. The IPMI protocol provides standard commands and OEM commands, so as to monitor and manage the states of the system and hardware devices, such as temperature, voltage, fan operating state, power state, etc., and has the characteristics of simplicity and easy use, especially when a large number of machines in a machine room need to be operated.
As for the obtaining mode of the read command, the read command may be stored in the storage unit of the target server in advance, and the read command may be directly obtained from the storage unit of the target server when needed, specifically, the storage form may be stored as a command script file, and the command script file may include not only the read command but also other commands involved in the implementation process; in addition, a message sent by the terminal may also be received before the implementation process, and the read command is obtained by analyzing the message.
Step S102: and sending the memory information of the dynamic random access memory and the memory information of the nonvolatile memory to a basic input and output system of a target server so as to manage and configure the dynamic random access memory and the nonvolatile memory.
The key problem to be solved by this embodiment is how to transfer respective memory information between the dynamic random access memory and the nonvolatile memory to perform heterogeneous memory combination, specifically, the memory information of the dynamic random access memory may be a memory start address, the memory information of the nonvolatile memory may be a memory capacity, and the basic Input Output system is a bios (basic Input Output system), and finally the basic Input Output system combines the heterogeneous memories into one memory block after obtaining the two kinds of memory information.
In this embodiment, a configuration method of a heterogeneous memory system is provided, where a first read command based on an IPMI protocol is sent to a first memory manager, and a second read command based on the IPMI protocol is sent to a second memory manager, to obtain memory information of a dynamic random access memory connected to the first memory manager and memory information of a non-volatile memory connected to the second memory manager, and finally, the memory information of the dynamic random access memory and the memory information of the non-volatile memory are sent to a basic input/output system of a target server, so as to manage and configure the dynamic random access memory and the non-volatile memory. Therefore, the management configuration process of the whole heterogeneous hybrid memory system to the heterogeneous memory is realized based on the IPMI protocol, and the IPMI protocol is used for monitoring the state of the hardware equipment of the management server, so that the process can be realized by directly utilizing related commands of the IPMI protocol.
The second embodiment of the configuration method of the heterogeneous memory system provided by the present application is described in detail below, and the second embodiment is implemented based on the first embodiment and is expanded to a certain extent on the basis of the first embodiment. Specifically, the second embodiment realizes boot startup of the BIOS and the memory manager based on the first embodiment.
Referring to fig. 2, the second embodiment specifically includes:
step S201: and responding to the running request to run the target command script.
As described in the first embodiment, the commands involved in the implementation process of the scheme may be executed in-band or out-of-band on the terminal or the target server, and as a specific implementation, the present example integrates the related commands into a script form and executes the script form under the operating system of the target server. The process for running the target command script is called a target process, and the subsequent processes are all realized based on the target process. Specifically, before step S202, it is necessary to control the heterogeneous memory system to be powered on.
Step S202: and sending a slow start command based on the IPMI protocol to the basic input output system of the target server to enable QPI of the basic input output system to enter slow start.
Qpi (quickpath interconnect), i.e. fast channel interconnect, is a serial high-speed point-to-point connection protocol based on packet transmission, and uses differential signals and special clocks for transmission to realize direct interconnection between chips. In this embodiment, the QPI is mainly used to communicate the CPU of the target server and the first memory management chip, and the CPU of the target server and the second memory management chip. As an optional implementation manner, in this embodiment, the memory managers are all implemented based on an FPGA chip, and hereinafter, the first memory manager is referred to as a first FPGA chip, and the second memory manager is referred to as a second FPGA chip.
Step S203: and after the QPI of the basic input and output system finishes the slow start, sending a fast start instruction to the basic input and output system so as to enable the QPI of the basic input and output system to enter the fast start.
Specifically, after completing the slow start of QPI, the bios sends a restart signal to the target process, and the target signal determines whether the bios completes the slow start according to whether the restart signal is received. And after the basic input and output system is judged to finish slow start, a fast start instruction is sent to the basic input and output system, and then QPI of the basic input and output system enters fast start. And after the rapid start is finished, controlling the first FPGA chip to start so as to communicate the communication channel of the target server CPU and the first FPGA chip and configure the first FPGA chip.
Step S204: sending a first reading command based on an IPMI protocol to a first FPGA chip to obtain an internal memory initial address of a dynamic random access memory connected with the first FPGA chip; and sending a second read command based on the IPMI protocol to the second FPGA chip to acquire the memory capacity of the nonvolatile memory connected with the second FPGA chip.
Specifically, the target process sends the memory starting address of the dynamic random access memory to the second FPGA chip, and then obtains the memory capacity of the nonvolatile memory from the second FPGA chip and sends the memory capacity to the basic input and output system, so that memory information interaction is completed. In addition, the second FPGA chip can be configured in a related mode.
Step S205: and sending the memory starting address of the dynamic random access memory and the memory capacity of the nonvolatile memory to a basic input and output system of a target server so as to manage and configure the dynamic random access memory and the nonvolatile memory.
In addition, the target process can also guide the basic input and output system to complete the whole starting process, so that the operating system runs to the login interface; at this point, the heterogeneous hybrid memory system is started and can be used normally.
In summary, the key problem to be solved by the configuration method of the heterogeneous memory system provided in this embodiment is how to transfer respective memory information between the dynamic random access memory and the nonvolatile memory so as to perform heterogeneous memory combination, and how to control the operating system of the entire heterogeneous memory to complete booting. Specifically, the present embodiment develops an IPMI command for guiding the system based on the IPMI protocol, and the command is mainly applied to: the method comprises the steps of guiding a basic input and output system to start, configuring a first FPGA chip, configuring a second FPGA chip, completing memory information interaction between two different memories of a dynamic random access memory and a nonvolatile memory, and finally combining the heterogeneous memories into a memory block, wherein the information interaction between the dynamic random access memory and the nonvolatile memory is used for exchanging the initial address and the memory capacity of the memory so as to combine the dynamic random access memory and the nonvolatile memory into a heterogeneous hybrid memory, and finally guiding the whole system to finish starting to start. Finally, the information interaction and system starting process among the heterogeneous hybrid memory systems are simplified, the development difficulty is reduced, and the cost is saved.
In the following, a configuration device of a heterogeneous memory system provided in an embodiment of the present application is introduced, and a configuration device of a heterogeneous memory system described below and a configuration method of a heterogeneous memory system described above may be referred to correspondingly.
As shown in fig. 3, the apparatus includes:
the reading module 301: the device comprises a first memory manager, a second memory manager and a controller, wherein the first memory manager is used for sending a first read command based on an IPMI protocol to the first memory manager to obtain memory information of a dynamic random access memory connected with the first memory manager and sending a second read command based on the IPMI protocol to the second memory manager to obtain memory information of a nonvolatile memory connected with the second memory manager;
the configuration module 302: and the basic input and output system is used for sending the memory information of the dynamic random access memory and the memory information of the nonvolatile memory to a target server so as to manage and configure the dynamic random access memory and the nonvolatile memory.
As a specific implementation manner, the reading module is specifically configured to: sending a first read command based on an IPMI protocol to a first memory manager to obtain a memory start address of a dynamic random access memory connected with the first memory manager, and sending a second read command based on the IPMI protocol to a second memory manager to obtain the memory capacity of a nonvolatile memory connected with the second memory manager.
The configuration device of the heterogeneous memory system of the present embodiment is used to implement the configuration method of the heterogeneous memory system, and therefore a specific implementation manner of the configuration device may be seen in the foregoing embodiment portions of the configuration method of the heterogeneous memory system, for example, the reading module 301 and the configuration module 302 are respectively used to implement steps S101 and S102 in the configuration method of the heterogeneous memory system. Therefore, specific embodiments thereof may be referred to in the description of the corresponding respective partial embodiments, and will not be described herein.
In addition, since the configuration device of the heterogeneous memory system of this embodiment is used to implement the configuration method of the heterogeneous memory system, the role of the configuration device corresponds to that of the method described above, and details are not described here.
In addition, the present application also provides a server, as shown in fig. 4, including:
the memory 401: for storing a computer program;
the processor 402: for executing the computer program to implement the steps of the configuration method of the heterogeneous memory system as described above.
Finally, the present application also provides a computer-readable storage medium having stored thereon a computer program for implementing the steps of the method for configuring a heterogeneous memory system as described above when executed by a processor.
The server and the computer-readable storage medium of this embodiment are used to implement the foregoing configuration method for the heterogeneous memory system, so that the specific implementation manners of the server and the computer-readable storage can be found in the foregoing embodiment of the configuration method for the heterogeneous memory system, and the functions of the server and the computer-readable storage correspond to the functions of the foregoing method embodiment, and are not described again here.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The configuration method, the configuration device, the server and the computer-readable storage medium of the heterogeneous memory system provided by the present application are described in detail above. The principles and embodiments of the present application are explained herein using specific examples, which are provided only to help understand the method and the core idea of the present application. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.
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| CN107861760A (en) * | 2017-11-24 | 2018-03-30 | 联想(北京)有限公司 | BIOS collocation method, terminal and server |
| CN108182157A (en) * | 2018-01-30 | 2018-06-19 | 郑州云海信息技术有限公司 | A kind of method for realizing isomery mixing memory, BMC, device and storage medium |
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