CN114497010B - A packaging structure manufacturing method based on vertical wafer and packaging structure - Google Patents
A packaging structure manufacturing method based on vertical wafer and packaging structure Download PDFInfo
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- CN114497010B CN114497010B CN202111683437.6A CN202111683437A CN114497010B CN 114497010 B CN114497010 B CN 114497010B CN 202111683437 A CN202111683437 A CN 202111683437A CN 114497010 B CN114497010 B CN 114497010B
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 62
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 239000002184 metal Substances 0.000 claims abstract description 76
- 229910052751 metal Inorganic materials 0.000 claims abstract description 76
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 45
- 239000010931 gold Substances 0.000 claims abstract description 25
- 229910052737 gold Inorganic materials 0.000 claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 238000000034 method Methods 0.000 claims abstract description 6
- 239000010410 layer Substances 0.000 claims description 57
- 238000006243 chemical reaction Methods 0.000 claims description 11
- 239000012790 adhesive layer Substances 0.000 claims description 6
- 230000000694 effects Effects 0.000 abstract description 6
- 235000012431 wafers Nutrition 0.000 description 110
- 238000005538 encapsulation Methods 0.000 description 10
- 239000011347 resin Substances 0.000 description 6
- 229920005989 resin Polymers 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 4
- 239000011324 bead Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000002310 reflectometry Methods 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910052573 porcelain Inorganic materials 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 239000000741 silica gel Substances 0.000 description 1
- 229910002027 silica gel Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10H20/00
- H01L25/0753—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10H20/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/852—Encapsulations
- H10H20/853—Encapsulations characterised by their shape
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/036—Manufacture or treatment of packages
- H10H20/0362—Manufacture or treatment of packages of encapsulations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/036—Manufacture or treatment of packages
- H10H20/0364—Manufacture or treatment of packages of interconnections
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Led Device Packages (AREA)
Abstract
本发明公开了一种基于垂直晶片的封装结构制作方法及封装结构，所述封装结构制作方法包括如下步骤：S1、在LED基板上表面预制若干独立的金属区；S2、将电极极性相反的垂直晶片固定在所述金属区上表面；S3、用金线连接相邻所述金属区上的所述垂直晶片；S4、在所述垂直晶片四周铺设第一封装层；S5、在所述垂直晶片、所述金线及所述第一封装层上方铺设第二封装层。本发明能够实现垂直晶片的串联，达到“高电压”的目的，规避晶片与基板之间的金线连接，避免污染晶片，实现高密度高亮度的效果。
The present invention discloses a method for manufacturing a packaging structure based on a vertical chip and a packaging structure, the packaging structure manufacturing method comprising the following steps: S1, prefabricating a plurality of independent metal areas on the upper surface of an LED substrate; S2, fixing vertical chips with opposite electrode polarities on the upper surface of the metal area; S3, connecting the vertical chips on adjacent metal areas with gold wires; S4, laying a first packaging layer around the vertical chip; S5, laying a second packaging layer above the vertical chip, the gold wire and the first packaging layer. The present invention can realize the series connection of vertical chips, achieve the purpose of "high voltage", avoid the gold wire connection between the chip and the substrate, avoid contaminating the chip, and achieve the effect of high density and high brightness.
Description
Technical Field
The invention belongs to the technical field of LEDs, and particularly relates to a manufacturing method based on a vertical wafer packaging structure and the packaging structure.
Background
With the development of semiconductor technology for illumination, there are currently mainly LED chips of three structures, i.e., front-loading, flip-chip and vertical structures. The vertical structure of the wafer has natural advantages in terms of light emitting uniformity, heat dissipation and the like at small intervals. In addition, the current common red light chips are mostly in vertical structures, and in order to meet the increasing requirements of the market on the colors and specifications of LEDs, a packaging structure based on reasonable design of special chips is particularly important.
In the prior art, the vertical wafer-based packaging is mainly single vertical wafer packaging, the serial connection among wafers is realized through serial connection among single finished product lamp beads, the optical density in a unit area is easily insufficient, the low-voltage LED light source has inherent defects, such as short service life of a driving power supply and incapability of working under high current, and the like, a small-sized LED chip generally operates under the environment of 20-30mA and 3V, the operation environment of the single power supply chip is 350mA and 3V, the light distribution of the finished product is easily uneven due to the fact that the luminous point interval is large, the good light intensity consistency cannot be achieved among different areas due to the fact that the lamp beads are integrated, and the problem that white resin spreads to the chip surface along an LED bracket along a gold wire easily occurs when the product is lightened by using white resin with high reflectivity in the LED packaging.
Disclosure of Invention
In order to overcome the technical defects, a first aspect of the present invention provides a method for manufacturing a package structure based on vertical wafers, which can realize the serial connection of the vertical wafers and achieve the effect of high density and high brightness.
In order to solve the problems, the invention is realized according to the following technical scheme:
a method for manufacturing a packaging structure based on a vertical wafer comprises the following steps:
s1, prefabricating a plurality of independent metal areas on the upper surface of an LED substrate;
s2, fixing a vertical wafer with opposite electrode polarity on the upper surface of the metal region;
S3, connecting the vertical wafers on the adjacent metal areas by gold wires;
s4, paving a first packaging layer around the vertical wafer;
s5, paving a second packaging layer above the vertical wafer, the gold wire and the first packaging layer.
Further, in the step S2, the vertical wafers include a first vertical wafer and a second vertical wafer with opposite electrode polarities, and the number of the first vertical wafer and the number of the second vertical wafer are fixed on the same metal region according to a ratio of 1:1.
Further, in the step S2, a fully automatic die bonder is used to bond a conductive adhesive layer to the surface of the metal area, and the vertical wafer is fixed on the upper surface of the metal area through the conductive adhesive layer.
The invention also discloses a packaging structure based on the vertical wafer, which is manufactured by adopting the manufacturing method of the packaging structure, and comprises an LED substrate and a plurality of vertical wafers;
The LED substrate comprises a plurality of independent metal areas, wherein vertical wafers with opposite polarities of upper and lower electrodes are arranged on the upper surface of each metal area, the vertical wafers on the same metal area are connected through the lower metal area, the vertical wafers on the adjacent metal areas are connected through gold wires, and the gold wires are positioned above the vertical wafers and are not in direct contact with the LED substrate.
Further, the vertical wafers comprise a first vertical wafer and a second vertical wafer, and the polarities of upper and lower electrodes of the first vertical wafer and the second vertical wafer are opposite.
Further, the metal area comprises a pair of positive electrode metal area and negative electrode metal area which are conducted with an external power supply, and a plurality of independent metal areas which are not connected with the external power supply;
The upper surfaces of the independent metal areas are provided with the first vertical wafer and the second vertical wafer, the first vertical wafer and the second vertical wafer on the same independent metal area are connected through the upper surfaces of the independent metal areas which are contacted with the lower electrode, and the first vertical wafer and the second vertical wafer of two adjacent independent metal areas are connected through the gold wire;
The upper surface of the positive electrode metal region is provided with the first vertical wafer, and the first vertical wafer is connected with the second vertical wafer of the adjacent independent metal region through the gold wire;
the second vertical wafer is arranged on the upper surface of the negative electrode metal region and is connected with the first vertical wafer of the adjacent independent metal region through the gold wire.
Further, the vertical wafer is fixed on the upper surface of the metal area through the conductive bonding layer.
The semiconductor packaging structure further comprises a first packaging layer and a second packaging layer, wherein the first packaging layer is filled in the gap between the vertical wafers, the thickness of the first packaging layer is equal to the height of the vertical wafers or lower than the height of the vertical wafers, the first packaging layer is not directly contacted with the gold wires, and the second packaging layer covers the first packaging layer, the vertical wafers and the gold wires.
Further, a light conversion layer is further arranged, the light conversion layer is paved above the first packaging layer, the vertical wafer and the gold wire, and the second packaging layer is paved above the light conversion layer.
Compared with the prior art, the invention has the following beneficial effects:
The gold wires are only connected with the wafers, so that the gold wire connection between the wafers and the substrate is avoided, the wire bonding distance is reduced, the wafer spacing is shortened, the pollution of white resin along the gold wires to the wafers is avoided, and the effect of high density and high brightness is realized.
Drawings
The invention is described in further detail below with reference to the attached drawing figures, wherein:
fig. 1 is a schematic structural diagram of a vertical wafer based package structure according to embodiment 2;
FIG. 2 is a schematic diagram of the connection of the package structure based on the vertical wafer in embodiment 2;
the mark is that 1, an LED substrate, 2, a first vertical wafer, 3, a second vertical wafer, 4, an anode metal area, 5, a cathode metal area, 6, an independent metal area, 7, a gold wire, 8, a first packaging layer, 9, a light conversion layer and 10, a second packaging layer.
Detailed Description
The preferred embodiments of the present invention will be described below with reference to the accompanying drawings, it being understood that the preferred embodiments described herein are for illustration and explanation of the present invention only, and are not intended to limit the present invention.
Example 1
The embodiment discloses a manufacturing method of a packaging structure based on a vertical wafer, which comprises the following steps:
s1, prefabricating a plurality of independent metal areas on the upper surface of an LED substrate;
s2, a full-automatic die bonder is adopted to dot an electric conduction bonding layer on the upper surface of the metal area, and vertical wafers with opposite electrode polarities are fixed on the metal area through the electric conduction bonding layer;
s3, connecting the vertical wafers on the adjacent metal areas by gold wires;
s4, paving a first packaging layer around the vertical wafer by using a dispensing machine;
s5, paving a second packaging layer above the vertical wafer, the gold wire and the first packaging layer by adopting a dispensing machine.
Specifically, in step S2, the vertical wafers include a first vertical wafer and a second vertical wafer with opposite polarities of electrodes, and the number of the first vertical wafer and the second vertical wafer is fixed on the same metal region according to a ratio of 1:1.
Specifically, in step S3, the gold wires of the full-automatic wire bonding machine are used to connect the vertical wafers on the adjacent metal areas, and due to the special arrangement, the gold wires do not need to be directly printed on the substrate, more wire bonding positions do not need to be reserved for the porcelain nozzles of the full-automatic wire bonding machine, the distance between the wafers is effectively shortened, the high-density arrangement of the wafers is realized to achieve the highlight effect, and due to the fact that the gold wires are located above the wafers, the gold wires are prevented from contacting with the first packaging layer, and the phenomenon that white resin spreads from the upper side of the wafers along the gold wires to pollute the wafers is effectively avoided.
Example 2
As shown in fig. 1 and 2, the embodiment discloses a package structure of a vertical wafer, which is manufactured by the method for manufacturing a package structure described in embodiment 1, and includes an LED substrate 1 and a plurality of vertical wafers, wherein the vertical wafers include a first vertical wafer 2 and a second vertical wafer 3, and polarities of upper and lower electrodes of the first vertical wafer 2 and the second vertical wafer 3 are opposite.
The LED substrate 1 is provided with a pair of positive electrode metal areas 4, a negative electrode metal area 5 and a plurality of independent metal areas 6 which are not connected with an external power supply, wherein the independent metal areas are not connected with each other, the upper surface of each independent metal area 6 is simultaneously provided with a first vertical wafer 2 and a second vertical wafer 3, the first vertical wafer 2 and the second vertical wafer 3 on the same independent metal area 6 are connected through the upper surface of each independent metal area 6 which is contacted with a lower electrode, the first vertical wafer 2 and the second vertical wafer 3 of two adjacent independent metal areas 6 are connected through gold wires 7, the gold wires 7 are always positioned above the first vertical wafer 2 and the second vertical wafer 3 and are not in direct contact with the LED substrate 1, the upper surface of the positive electrode metal area 4 is provided with the first vertical wafer 2 which is connected with the second vertical wafer 3 of the adjacent independent metal area 6 through the gold wires, and the upper surface of the negative electrode metal area 5 is provided with the second vertical wafer 3 which is connected with the first vertical wafer 2 of the adjacent independent metal area 6 through the gold wires.
The first vertical wafers 2 and the second vertical wafers 3 on the upper surfaces of the independent metal areas 6 are sequentially connected, and the first vertical wafer and the last vertical wafer are respectively connected with the first vertical wafer 2 of the positive electrode metal area 4 and the second vertical wafer 3 of the negative electrode metal area 5 to form a complete serial loop.
Specifically, the semiconductor device further comprises an electric conduction bonding layer (not shown in the figure), and the first vertical wafer 2 and the second vertical wafer 3 are fixed on the upper surface of the metal area through the electric conduction bonding layer.
In the above embodiment, the semiconductor package further comprises a first encapsulation layer 8 and a second encapsulation layer 10, wherein the first encapsulation layer 8 is white resin with high reflectivity, the second encapsulation layer 10 is made of transparent silica gel material, the first encapsulation layer 8 fills gaps among the vertical wafers, gaps among the vertical wafers and the LED substrate 1 and is not in direct contact with gold wires 7, the thickness of the first encapsulation layer 8 is equal to the height of the vertical wafers or is lower than the height of the vertical wafers, and the second encapsulation layer 10 covers the first encapsulation layer 8, the vertical wafers and the gold wires 7.
In the embodiment, the light conversion layer 9 is further included, the light conversion layer 9 is paved above the vertical wafer, the gold wire 7 and the first encapsulation layer 8, the second encapsulation layer 10 is paved above the light conversion layer 9, and fluorescent powder is added into the light conversion layer 9, so that light with different effects can be obtained.
In the embodiment, the serial connection of the vertical wafers is realized by designing the mounting mode of the substrates and the wafers, so that the purpose of high voltage is achieved, the types of gold wire bonding only comprise the connection between the wafers, the gold wire bonding between the wafers and the substrates is avoided, the wire bonding distance is reduced, the phenomenon that white resin spreads to the surfaces of the wafers along the gold wires to pollute the wafers is avoided, and the light emitting effect of high density and high brightness is realized.
The present invention is not limited to the preferred embodiments, and any modifications, equivalent variations and modifications made to the above embodiments according to the technical principles of the present invention are within the scope of the technical proposal of the present invention.
Claims (9)
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111683437.6A CN114497010B (en) | 2021-12-31 | 2021-12-31 | A packaging structure manufacturing method based on vertical wafer and packaging structure |
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| CN216671633U (en) * | 2021-12-31 | 2022-06-03 | 广东晶科电子股份有限公司 | Packaging structure based on vertical wafer |
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| KR100809693B1 (en) * | 2006-08-01 | 2008-03-06 | 삼성전자주식회사 | Vertical stacked multichip package with improved reliability of lower semiconductor chip and manufacturing method thereof |
| CN102194808B (en) * | 2011-05-10 | 2013-04-10 | 江西科技师范学院 | LED (light emitting diode) integrated packaging device with up-down power type electrodes and packaging method thereof |
| TW201332158A (en) * | 2012-01-20 | 2013-08-01 | Top Crystal Technology Inc | Chip-on-board LEDs structure with different wavelengths |
| CN202487656U (en) * | 2012-03-28 | 2012-10-10 | 深圳市斯迈得光电子有限公司 | All-dimensional lighting LED packaging structure |
| CN202549840U (en) * | 2012-04-10 | 2012-11-21 | 深圳市斯迈得光电子有限公司 | Multi-wafer integration type white-light light emitting diode (LED) packaging structure |
| JP2014143448A (en) * | 2014-05-12 | 2014-08-07 | Invensys Corp | Electronic component for wiring and manufacturing method of the same |
| CN204130527U (en) * | 2014-08-18 | 2015-01-28 | 黎杰 | Light emitting diode with vertical structure Series Package unit |
| CN204361097U (en) * | 2015-01-21 | 2015-05-27 | 南京华鼎电子有限公司 | A kind of integrated form COB encapsulating structure of adjustable color temperature |
| CN104916626B (en) * | 2015-04-20 | 2017-07-18 | 旭宇光电（深圳）股份有限公司 | LED encapsulation method and LED encapsulation structure |
| CN107842719A (en) * | 2017-11-17 | 2018-03-27 | 广东晶科电子股份有限公司 | A kind of COB packaged light sources and preparation method thereof |
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