CN114363728B - Electronic equipment and method for preventing current backflow - Google Patents
Electronic equipment and method for preventing current backflow Download PDFInfo
- Publication number
- CN114363728B CN114363728B CN202111647761.2A CN202111647761A CN114363728B CN 114363728 B CN114363728 B CN 114363728B CN 202111647761 A CN202111647761 A CN 202111647761A CN 114363728 B CN114363728 B CN 114363728B
- Authority
- CN
- China
- Prior art keywords
- module
- power supply
- power
- level signal
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 22
- 230000006854 communication Effects 0.000 claims abstract description 65
- 238000004891 communication Methods 0.000 claims abstract description 65
- 230000002035 prolonged effect Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 19
- 230000003287 optical effect Effects 0.000 description 15
- 238000013461 design Methods 0.000 description 5
- 238000004590 computer program Methods 0.000 description 4
- 238000012544 monitoring process Methods 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 238000012423 maintenance Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007175 bidirectional communication Effects 0.000 description 1
Landscapes
- Power Sources (AREA)
Abstract
The invention discloses electronic equipment and a method for preventing current from flowing backwards, wherein the electronic equipment comprises a first module, a second module, a first power supply and a second power supply; a first power supply for supplying power to the first module; a second power supply for supplying power to the second module; and the first module is used for controlling the voltage of the communication channel to be a second level signal when the voltage of the communication channel between the first module and the second module is determined to be the first level signal after the second module is powered down. Because the first module can control the voltage of the communication channel to be the second level signal after determining that the second module is powered down, the current can be prevented from flowing into the second module and the second power supply by the first module, so that the risk of current backflow can be reduced, the risk of damage to devices is reduced, and the service life of the electronic equipment is prolonged.
Description
Technical Field
The present invention relates to the field of electronic design, and in particular, to an electronic device and a method for preventing current backflow.
Background
With the development of the switch, after the X86 system is adopted, the modularized process of the switch continues to advance, and the high-end switch of the data center is generally composed of a central processing unit (central processing unit, CPU) module, a baseboard management controller (Baseboard Management Controller, BMC) module, a media access Control (MEDIA ACCESS Control, MAC) module, an optical module and other modules. The CPU module can realize control management of the service card, network protocol control management and data maintenance of each service module and the like; the BMC module can realize intelligent monitoring, power-on and power-off control, power and temperature state monitoring and the like of the whole machine; the MAC module can realize network interaction and forwarding; the optical module may implement photoelectric conversion.
Along with the demands of modularization and energy saving of the switch, the switch can control part of the modules to be powered down independently or in a dormant state, but as a plurality of signals are communicated among the modules, if one module is powered down, current can flow backwards, so that the chip is in an abnormal mode.
Disclosure of Invention
The invention provides electronic equipment and a method for preventing current backflow, which are used for solving the current backflow problem caused by independent power-down of modules in the prior art.
In a first aspect, an embodiment of the present invention provides an electronic device, including a first module, a second module, a first power supply, and a second power supply;
the first power supply is used for supplying power to the first module;
the second power supply is used for supplying power to the second module;
The first module is used for controlling the voltage of the communication channel to be a second level signal when the voltage of the communication channel between the first module and the second module is determined to be the first level signal after the second module is powered down;
The first module is a module with a control function.
In one possible implementation, the first module includes a CPLD;
The first module is specifically configured to:
The first module controls the voltage of the communication channel to be a second level signal through the CPLD.
In one possible implementation, the CPLD includes an OD gate;
The output end of the OD gate is connected with one end of the communication channel and is used for outputting the second level signal, the first power end of the OD gate is connected with the first power supply, and the second power end of the OD gate is connected with the second power supply.
In one possible embodiment, the device further comprises a pull-up resistor;
the pull-up resistor is connected between the communication path and the second power supply.
In one possible embodiment, the power supply further comprises a third power supply and a third module;
The third power supply is used for supplying power to the third module;
the third module is connected with the output end of the OD gate.
In one possible implementation, the communication path between the third module and the output of the OD gate is in a high impedance state.
In a second aspect, an embodiment of the present invention provides a method for preventing current backflow, applied to the electronic device according to any one of the first aspect, where the method includes:
after the first module determines that the second module is powered down, determining that the voltage of a communication channel connected with the first module and the second module is a first level signal;
the first module controls the voltage of the communication channel to be a second level signal;
The first module is a module with a control function.
In one possible implementation, the first module includes a CPLD;
The first module controlling the voltage of the communication path to be a second level signal, comprising:
and the first module controls one end of the CPLD connected with the communication channel to output a second level signal so that the voltage of the communication channel is the second level signal.
In a possible implementation manner, the first module includes a CPLD, the CPLD includes an OD gate, an output end of the OD gate of the CPLD is connected to one end of the communication path, a first power end of the OD gate of the CPLD is connected to the first power supply, and a second power end of the OD gate of the CPLD is connected to the second power supply;
The first module controlling the voltage of the communication path to be a second level signal, comprising:
the output end of the OD gate outputs a second level signal.
The invention has the following beneficial effects:
The invention discloses electronic equipment and a method for preventing current from flowing backwards, wherein the electronic equipment comprises a first module, a second module, a first power supply and a second power supply; a first power supply for supplying power to the first module; a second power supply for supplying power to the second module; and the first module is used for controlling the voltage of the communication channel to be a second level signal when the voltage of the communication channel between the first module and the second module is determined to be the first level signal after the second module is powered down. Because the first module can control the voltage of the communication channel to be the second level signal after determining that the second module is powered down, the current can be prevented from flowing into the second module and the second power supply by the first module, so that the risk of current backflow can be reduced, the risk of damage to devices is reduced, and the service life of the electronic equipment is prolonged.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the description of the embodiments will be briefly described below, it will be apparent that the drawings in the following description are only some embodiments of the present invention, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a hardware architecture in the related art;
FIG. 2 is a schematic diagram of a modular power supply design of the related art;
FIG. 3 is a schematic diagram of a related art module powered down independently;
fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present invention;
FIG. 5a is a schematic diagram of a module independent power down according to an embodiment of the present invention;
FIG. 5b is a schematic diagram of another module according to an embodiment of the present invention;
FIG. 6 is a schematic diagram illustrating an application of an OD gate circuit according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of another module independent power down according to an embodiment of the present invention;
fig. 8 is a flowchart of a method for preventing current backflow according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail below with reference to the accompanying drawings, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
With development of the switch, after the X86 system is adopted, a modularized process of the switch is further advanced, as shown in fig. 1, which is a schematic diagram of a hardware architecture of the switch in the related art, and includes a CPU module 101, a BMC module 102, a MAC module 103, an optical module 104, and a substrate 105. The CPU module 101 can realize control management of the service card, network protocol control management and data maintenance of each service module, and the like; the BMC module 102 can realize intelligent monitoring, power-on and power-off control, power and temperature state monitoring and the like of the whole machine; the MAC module 103 may implement network interaction and forwarding; the optical module 104 may implement photoelectric conversion.
As shown in fig. 2, a schematic structural diagram of a modular power supply design in the related art includes a power supply module 201 and a direct current (Direct Current to Direct Current, DC-DC) unit 202, and as can be seen from fig. 2, each module or substrate corresponds to one DC-DC unit 202, that is, the power supply of each module adopts an independent design, and for the modules or chips with independent power-up and power-down requirements, the corresponding power supply part can control the power supply to power up and down independently.
As shown in fig. 3, which is a schematic diagram of power-down of the module in the related art, in fig. 3, the optical module power supply 301 supplies power to the optical module 104, that is, the optical module power supply 301 may control the optical module 104 to power down independently or be in a sleep state. After the optical module 104 is powered down, the optical module power supply 301 and the optical module 104 keep low level, but the powered-up MAC module 103 keeps high level output, which may cause current to flow backward through the pull-up resistor R into the optical module power supply 301, i.e. in the current direction indicated by the dashed line in the figure, and the optical module power supply 301 inputs the backward current into the optical module 104 that has been powered down, so that the optical module 104 may be in an abnormal working state.
Based on the above problems, the embodiment of the invention provides an electronic device and a method for preventing current backflow, which are used for solving the current backflow problem caused by independent power down of a module in the prior art.
The electronic device and the method of preventing current backflow provided by the exemplary embodiments of the present application will be described below with reference to the accompanying drawings in conjunction with the above-described application scenario, and it should be noted that the above-described application scenario is only shown for the convenience of understanding the spirit and principle of the present application, and the embodiments of the present application are not limited in this respect.
As shown in fig. 4, a schematic structural diagram of an electronic device according to an embodiment of the present invention includes a first module 401, a second module 402, a first power supply 403, and a second power supply 404;
the first power supply 403 is configured to supply power to the first module 401;
the second power supply 404 is configured to supply power to the second module 402;
The first module 401 is configured to determine, after determining that the second module 402 is powered down, that a voltage of a communication path connected to the first module and the second module is a first level signal, and control a voltage of the communication path L to be a second level signal;
the first module is a module with a control function.
In the embodiment of the invention, the first module is a module with a control function, and when the first module determines that the second module is powered down and then determines that the voltage of a communication channel between the first module and the second module is a first level signal, the voltage of the communication channel is controlled to be a second level signal. Because the first module can control the voltage of the communication channel to be the second level signal after determining that the second module is powered down, the current can be prevented from flowing into the second module and the second power supply by the first module, so that the risk of current backflow can be reduced, the risk of damage to devices is reduced, and the service life of the electronic equipment is prolonged.
The first module in the embodiment of the invention can be a CPU module, a BMC module, a substrate, an MAC module, and other modules, and the modules with control functions are all applicable to the embodiment of the invention.
The second module 402 is powered down, i.e. the second power supply stops supplying power to the second module 402, which may be controlled by the first module 401 or may be controlled by another module. The first module 401 determines the working state of the second module 402, by detecting the power input end of the second module 402, for example, if it is detected that the power input end of the second module 402 is at a high level, it is determined that the second module 402 is powered normally, and if it is detected that the power input end of the second module 402 is at a low level, it is determined that the second module 402 is powered down.
The mode of determining the state of the module in the embodiment of the present invention is not limited, and any mode of determining the state of the module is applicable to the embodiment of the present invention.
The electronic device in the embodiment of the invention can be a switch, a server or other electronic devices, and the invention is not limited to this.
In a specific implementation, the first level signal may be a high level, and the second level signal is a low level, and the complex programmable logic device CPLD in the first module 401 controls the voltage of the communication path L to be the second level signal.
The control of the voltage of the communication path to the low level by the first module will be described in detail.
As shown in fig. 5a, a schematic structural diagram of an electronic device according to an embodiment of the present invention may further include a pull-up resistor R connected between the communication path L and the second power supply 404. The first module 401 includes a CPLD501;
in addition, if two-wire serial buses (Inter-INTEGRATED CIRCUIT, I 2 C) are used, pull-up resistors R must be provided for the two communication paths L, respectively, and each pull-up resistor R is connected between a corresponding one of the communication paths L and the second power supply 404.
When the first module 401 controls the second module 402 to be powered down independently or enter a sleep state, the second power supply 404 and the second module 402 keep low level output, the first power supply 403 and the first module 401 keep high level output under a normal working state, so that the voltage of the communication path L is still high level, and at this time, there is a risk that current flows through the pull-up resistor R back into the second power supply 404 and then flows back into the second module 402 through the second power supply 404.
For the first module 401 connected to the CPLD501, when the first module 401 is in a normal working state, the second module 402 is powered down and the voltage of the communication path L is at a high level, the electronic device provided by the invention can control the pin connected with the communication path L by the first module 401 to output a low level through the CPLD 501.
The pin connected to the communication path L by the first module 401 is controlled by the CPLD501 to output a low level, i.e. the pin connected to the communication path L by the first module 401 is controlled by software in the CPLD501 to output a low level, i.e. the level on the communication link L is a low level, so that no current flows to the second module 402 and the second power supply 404.
In one embodiment, CPLD501 may include an OD gate 502, as shown in fig. 5b, where an output terminal of OD gate 502 is connected to one end of communication path L, a first power terminal of OD gate 502 is connected to first power supply 403, and a second power terminal of OD gate 502 is connected to second power supply 404.
As can be seen from fig. 5b, the second power supply 404 and the first module are not connected to the pull-up resistor R, when the first module 401 is in a normal operation state, the second module 402 is powered down, and when the voltage of the communication path L is at a high level, a current is formed between the first module 401 and the second module 402, and flows back into the second module 402 along the communication path L.
The first power terminal of the OD gate 502 is kept powered, the second power terminal of the OD gate 502 stops powering, and the output terminal of the OD gate outputs a low level according to the characteristics of the OD gate.
The OD gate is described in detail below.
Referring to fig. 6, an application diagram of an OD gate circuit according to an embodiment of the invention is shown, where an OD gate 502 includes an Input end Input, an Output end Output, a first power end Vcc1, a second power end Vcc2, a first transistor M1, a second transistor M2, a first resistor R1, a second resistor R2, and a third resistor R3;
The Input end Input of the OD gate 502 is connected to the controller 405, the controller 405 is configured to control the first transistor M1 to be turned on or off, the Output end Output of the OD gate 502 is connected to one end of the communication path L, the first power source end Vcc1 of the OD gate 502 is connected to the first power source 403, and the second power source end Vcc2 of the OD gate 502 is connected to the second power source 404.
When the first module 401 is in a normal operation state, the second module 402 is powered down and the voltage of the communication path L is at a high level, the first power supply 403 inputs a high level to the first power supply terminal Vcc1, and the second power supply 404 inputs a low level to the second power supply terminal Vcc2, so that the Output terminal Output of the OD gate 502 outputs a low level.
If the communication path L is a bidirectional communication, the CPLD502 does not need to process the communication signal because the first module 401 is an input terminal when the second module 402 outputs the communication signal to the first module 401.
As described above, the low level output by communication path L may be implemented by software in CPLD501, or may be implemented by an OD gate in CPLD501, that is, implemented by hardware.
The low level output by the communication path L is realized through hardware, so that software programs and programming can be reduced, and the related cost is reduced.
In a possible implementation manner, as shown in fig. 7, a schematic structural diagram of another electronic device provided by an embodiment of the present invention, where the electronic device may further include a third module 701 and a third power supply 702, where the third power supply 702 is configured to supply power to the third module 701; the third module 701 is connected to the output end of the OD gate 502 of the first module 401, and the third module 701 is an interconnection undefined module with respect to the first module 401, that is, the third module 701 does not communicate with the first module 401, and the path L2 between the third module 701 and the first module 401 is set to a high-impedance state, so that the influence of the CPLD501 on the interconnection undefined module can be avoided through the above design.
Based on the same inventive concept, the embodiment of the present invention further provides a method for preventing current backflow, and implementation of the method may refer to implementation of electronic equipment, and repeated parts are not repeated.
As shown in fig. 8, a flow chart of a method for preventing current backflow according to an embodiment of the present invention includes:
Step 801, after determining that a second module is powered down, a first module determines that a voltage of a communication path connected to the first module and the second module is a first level signal;
Step 802, the first module controls the voltage of the communication path to be a second level voltage;
The first module is a module with a control function.
Optionally, the first module includes a CPLD;
The first module controlling the voltage of the communication path to be a second level signal, comprising:
and the first module controls one end of the CPLD connected with the communication channel to output a second level signal so that the voltage of the communication channel is the second level signal.
Optionally, the first module includes a CPLD, the CPLD includes an OD gate, an output end of the OD gate of the CPLD is connected with one end of the communication path, a first power end of the OD gate of the CPLD is connected with the first power supply, and a second power end of the OD gate of the CPLD is connected with the second power supply;
The first module controlling the voltage of the communication path to be a second level signal, comprising:
the output end of the OD gate outputs a second level signal.
The embodiment of the invention discloses electronic equipment and a method for preventing current from flowing backwards, wherein the electronic equipment comprises a first module, a second module, a first power supply and a second power supply; a first power supply for supplying power to the first module; a second power supply for supplying power to the second module; after the first module determines that the second module is powered down, the voltage of a communication channel connected with the first module and the second module is determined to be a first level signal, and the voltage of the communication channel is controlled to be a second level signal. Because the first module can control the voltage of the communication channel to be the second level signal after determining that the second module is powered down, the current can be prevented from flowing into the second module and the second power supply by the first module, so that the risk of current backflow can be reduced, the risk of damage to devices is reduced, and the service life of the electronic equipment is prolonged.
The present application is described above with reference to block diagrams and/or flowchart illustrations of methods, apparatus (systems) and/or computer program products according to embodiments of the application. It will be understood that one block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, and/or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer and/or other programmable data processing apparatus, create means for implementing the functions/acts specified in the block diagrams and/or flowchart block or blocks.
Accordingly, the present application may be embodied in hardware and/or in software (including firmware, resident software, micro-code, etc.). Still further, the present application may take the form of a computer program product on a computer-usable or computer-readable storage medium having computer-usable or computer-readable program code embodied in the medium for use by or in connection with an instruction execution system. In the context of the present application, a computer-usable or computer-readable medium may be any medium that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (6)
1. An electronic device, comprising a first module, a second module, a first power supply, a second power supply and a pull-up resistor, wherein the first module comprises a CPLD;
The output end of the first power supply is electrically connected with the power input end of the first module, the CPLD is electrically connected with the second module through a communication channel, and is electrically connected with the second power supply through the pull-up resistor, and the output end of the second power supply is electrically connected with the power input end of the second module;
the first power supply is used for supplying power to the first module;
the second power supply is used for supplying power to the second module;
the first module is configured to determine, after detecting that the power input end of the second module is at a low level, that the voltage of the communication path is a first level signal, and control, by using the CPLD, the voltage of the communication path to be a second level signal;
The first module is a module with a control function, the first level signal is high level, and the second level signal is low level.
2. The electronic device of claim 1, wherein the CPLD comprises an OD gate;
the output end of the OD gate is connected with one end of the communication channel and is used for outputting the second level signal, the first power end of the OD gate is connected with the first power supply, and the second power end of the OD gate of the CPLD is connected with the second power supply.
3. The electronic device of claim 2, further comprising a third power supply and a third module;
The third power supply is used for supplying power to the third module;
the third module is connected with the output end of the OD gate.
4. The electronic device of claim 3, wherein a communication path between the third module and an output of the OD gate is in a high impedance state.
5. A method of preventing current flow in a reverse direction for use in an electronic device as claimed in any one of claims 1 to 4, the method comprising:
After detecting that the power input end of a second module is at a low level, a first module determines that the voltage of a communication channel connected with the first module and the second module is a first level signal;
the first module controls one end connected with the communication channel to output a second level signal through the CPLD so that the voltage of the communication channel is the second level signal;
the first module is a module with a control function, the first module comprises the CPLD, the first level signal is high level, and the second level signal is low level.
6. The method of claim 5, wherein the first module comprises a CPLD, the CPLD comprising an OD gate, an output of the OD gate of the CPLD being connected to one end of the communication path, a first power source of the OD gate of the CPLD being connected to the first power source, a second power source of the OD gate of the CPLD being connected to the second power source;
The first module controlling the voltage of the communication path to be a second level signal, comprising:
The output end of the OD gate outputs the second level signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111647761.2A CN114363728B (en) | 2021-12-30 | 2021-12-30 | Electronic equipment and method for preventing current backflow |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111647761.2A CN114363728B (en) | 2021-12-30 | 2021-12-30 | Electronic equipment and method for preventing current backflow |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114363728A CN114363728A (en) | 2022-04-15 |
| CN114363728B true CN114363728B (en) | 2024-06-18 |
Family
ID=81104124
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111647761.2A Active CN114363728B (en) | 2021-12-30 | 2021-12-30 | Electronic equipment and method for preventing current backflow |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114363728B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115314451B (en) * | 2022-08-23 | 2023-06-06 | 中国电子科技集团公司第十研究所 | Method for treating insufficient power-down caused by current backflow of domestic SRIO exchange chip |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102243481A (en) * | 2011-03-28 | 2011-11-16 | 上海华为技术有限公司 | Device, method and circuit for realizing interconnection between modules powered by different power supplies |
| CN111857311A (en) * | 2020-08-27 | 2020-10-30 | 湖南新云网科技有限公司 | Dual-system device |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100379610B1 (en) * | 2001-04-18 | 2003-04-08 | 삼성전자주식회사 | On-chip system with voltage level converting device capable of preventing leakage current owing to voltag level difference |
| CN103457458B (en) * | 2012-05-28 | 2016-03-30 | 华为终端有限公司 | Current switching control appliance and electronic equipment |
| CN105006860B (en) * | 2015-07-20 | 2018-06-26 | 广州金升阳科技有限公司 | A kind of equalizer circuit of controllable charge and discharge device and the super capacitor based on this device |
| CN109840006B (en) * | 2019-02-19 | 2020-10-16 | 无锡闻泰信息技术有限公司 | Main control chip power supply device |
| CN211701852U (en) * | 2020-04-02 | 2020-10-16 | 上海闻泰电子科技有限公司 | Voltage reduction module and mobile terminal |
| CN213846644U (en) * | 2020-11-17 | 2021-07-30 | 深圳市德兰明海科技有限公司 | Power supply circuit and switching device |
-
2021
- 2021-12-30 CN CN202111647761.2A patent/CN114363728B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102243481A (en) * | 2011-03-28 | 2011-11-16 | 上海华为技术有限公司 | Device, method and circuit for realizing interconnection between modules powered by different power supplies |
| CN111857311A (en) * | 2020-08-27 | 2020-10-30 | 湖南新云网科技有限公司 | Dual-system device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114363728A (en) | 2022-04-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6952785B1 (en) | Methods and apparatus for powering a data communications port | |
| US4677566A (en) | Power control network for multiple digital modules | |
| CN110649694B (en) | NCSI network card power supply system | |
| US20120137159A1 (en) | Monitoring system and method of power sequence signal | |
| CN104216499B (en) | Rack and its power control method | |
| US9223394B2 (en) | Rack and power control method thereof | |
| US20200210304A1 (en) | Server power consumption management method and device | |
| US20110060850A1 (en) | Mobile device of supporting uart and usb communication using same connector and operating method there-of | |
| US7433763B2 (en) | Power management logic that reconfigures a load when a power supply fails | |
| CN110008069B (en) | Power supply switching control circuit and control method | |
| US20040025064A1 (en) | Dynamic power level control based on a board latch state | |
| CN111103827B (en) | Server working mode switching device | |
| CN103809723A (en) | Equipment cabinet and power source control method thereof | |
| CN114363728B (en) | Electronic equipment and method for preventing current backflow | |
| CN108628792B (en) | Communication interface current leakage prevention system and method | |
| CN111324503B (en) | Machine frame management device, method and computer readable storage medium | |
| US8650421B2 (en) | Network interface apparatus and related power saving method thereof | |
| CN210608666U (en) | Control device of redundant power supply and power supply system | |
| CN205071015U (en) | Ethernet power supply unit | |
| CN107517106A (en) | A kind of POE method of supplying power to and POE power supply units | |
| CN109408151B (en) | A field programmable gate array configuration mode automatic switching device and switching method | |
| CN101938360B (en) | Network interface device and related power saving method | |
| CN112068692A (en) | A server power supply device and server | |
| CN115766622B (en) | Switch power-on control circuit, method and system | |
| CN117666742B (en) | Server management engine recovery circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |