CN114205989A - Circuit board and method for manufacturing the same - Google Patents
Circuit board and method for manufacturing the same Download PDFInfo
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- CN114205989A CN114205989A CN202010979240.6A CN202010979240A CN114205989A CN 114205989 A CN114205989 A CN 114205989A CN 202010979240 A CN202010979240 A CN 202010979240A CN 114205989 A CN114205989 A CN 114205989A
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- conductive
- layer
- block
- circuit board
- conductive layer
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Some embodiments of the present disclosure provide a circuit board and a method of manufacturing the circuit board, including the following steps. Providing a first conductive layer; providing an adhesive material and at least one conductive block, wherein the adhesive material has conductivity; adhering at least one conductive block on one surface of the first conductive layer by using an adhesive material; providing an insulating layer; arranging an insulating layer on the surface of the first conducting layer and on the at least one conducting block; and disposing a second conductive layer on the insulating layer. The circuit board provided by the present disclosure provides greater flexibility for the thickness of the inner conductive block and the design of the circuit pattern.
Description
Technical Field
The present disclosure relates to circuit boards and methods of manufacturing the same. In particular, the present disclosure relates to circuit boards with embedded conductive blocks and methods of making the same.
Background
The current method for manufacturing a circuit board with embedded conductive blocks (locally thickened) mainly comprises two ways, one is electroplating a conductive layer, and the second is to form a through hole in an insulating layer of a substrate, fill a conductive material in the through hole, and then form a conductive layer on the insulating layer and the upper surface and the lower surface of the conductive material filled in the through hole.
However, there is a limitation in the thickness of the plating in the first method, such as the inability to form a conductive block structure with a thickness greater than 200 μm. The second method is limited by the conventional substrate thickness, resulting in a limitation of the thickness of the conductive bump. Therefore, in the current method of embedding the conductive block, there is a limit to the thickening of the conductive block.
On the other hand, in the second method, if the conductive layer is further patterned to form the circuit, the patterned region is required to avoid the portion filled with the conductive material, which limits the design flexibility of the circuit pattern.
Therefore, how to make the conductive block embedded in the circuit board have the flexibility of thickness adjustment and improve the flexibility of the patterned region of the conductive layer is an urgent problem to be solved.
Disclosure of Invention
One aspect of the present disclosure is a circuit board comprising: the circuit board comprises a first conductive layer, at least one adhesion layer, at least one conductive block, an insulating layer and a second conductive layer. At least one adhesive layer is arranged on the surface of the first conductive layer, and the at least one adhesive layer has conductivity. And the at least one conductive block comprises a top surface and a bottom surface opposite to the top surface, wherein the bottom surface is contacted with the at least one adhesive layer and is adhered to the first conductive layer through the at least one adhesive layer. And the insulating layer covers the surface of the first conductive layer and the at least one conductive block. The second conducting layer is arranged on the insulating layer.
In some embodiments, the ratio of the thickness of the first conductive layer relative to the thickness of the first conductive layer, the at least one adhesive layer, and the at least one conductive bump is greater than 1: 15.
In some embodiments, the sum of the thicknesses of the first conductive layer, the at least one adhesive layer, and the at least one conductive bump is 20 micrometers to 3 millimeters.
In some embodiments, the first conductive layer has a thickness greater than 3 microns.
In some embodiments, the at least one adhesive layer has a thickness of less than 5 microns.
In some embodiments, the at least one adhesive layer contacts a surface area of the bottom surface of the at least one conductive bump no more than the surface area of the bottom surface of the at least one conductive bump.
In some embodiments, the conductive block further comprises a plurality of conductive blocks, wherein the plurality of conductive blocks are different in size, shape, or both.
In some embodiments, the conductive structure further includes at least one conductive pillar, and the at least one conductive pillar penetrates through the second conductive layer and the insulating layer and extends to a top surface of the at least one conductive bump.
In some embodiments, the top of the at least one conductive post is coplanar with the second conductive layer.
In some embodiments, the at least one conductive post is a conductive post and the at least one conductive mass is a conductive mass, the conductive post being located on the conductive mass.
In some embodiments, the at least one conductive post is a plurality of conductive posts and the at least one conductive mass is a conductive mass, the plurality of conductive posts being located on the conductive mass.
In some embodiments, the first conductive layer is a patterned first conductive layer, the second conductive layer is a patterned second conductive layer, or a combination thereof.
In some embodiments, the material of at least one adhesion layer comprises metal particles.
One aspect of the present disclosure is a method of manufacturing a circuit board, comprising: providing a first conductive layer; providing an adhesive material and at least one conductive block, wherein the adhesive material has conductivity; adhering at least one conductive block to the surface of the first conductive layer using an adhesive material; providing an insulating layer; arranging an insulating layer on the surface of the first conducting layer and on the at least one conducting block; and disposing a second conductive layer on the insulating layer.
In some embodiments, the step of adhering the at least one conductive block to the surface of the first conductive layer with an adhesive material comprises heating the adhesive material to make the adhesive material in a fluid state, and adhering the at least one conductive block to the surface of the first conductive layer with the adhesive material.
In some embodiments, the step of disposing an insulating layer on the surface of the first conductive layer and on the at least one conductive bump comprises: removing a part of the insulating layer, forming at least one groove which is sunken upwards, and covering and accommodating at least one conductive block in the at least one groove; and laminating the insulating layer, the at least one conductive block and the first conductive layer.
In some embodiments, the method further includes forming at least one conductive pillar, where the at least one conductive pillar penetrates through the second conductive layer and the insulating layer and extends to a top surface of the at least one conductive bump.
In some embodiments, the step of forming at least one conductive post comprises: removing part of the insulating layer and part of the second conductive layer to expose the top surface of the at least one conductive block and form at least one blind hole; and filling the at least one blind hole with a conductive material, so that the conductive material contacts the second conductive layer to form at least one conductive column.
In some embodiments, the step of disposing the second conductive layer on the insulating layer includes patterning the first conductive layer and the second conductive layer.
It is to be understood that both the foregoing general description and the following detailed description are examples, and are intended to provide further explanation of the disclosure as claimed.
Drawings
The present disclosure may be more completely understood in consideration of the following detailed description of embodiments in connection with the accompanying drawings.
Fig. 1A-1G illustratively depict a process flow for manufacturing a circuit board in accordance with some embodiments of the present disclosure.
Fig. 2A-2B schematically depict a process for fabricating a circuit board including conductive posts according to some embodiments of the present disclosure.
Fig. 3A-3B schematically illustrate a process for manufacturing a circuit board including conductive pillars according to further embodiments of the present disclosure.
Fig. 4 schematically depicts a process for manufacturing a circuit board containing traces according to some embodiments of the present disclosure.
Fig. 5 schematically depicts a process for manufacturing a circuit board including traces and conductive pillars according to some embodiments of the present disclosure.
[ description of main element symbols ]
100 circuit board 110 conductive layer
111 first conductive layer 1111 surface
112 second conductive layer 113 patterned first conductive layer
114 patterned second conductive layer 120 adhesive layer
130 conductive block 131 first conductive block
132 second conductive block 133 third conductive block
134 top surface 135 top surface
140 insulating layer 150 conductive column
A is a groove and B is a blind hole
Detailed Description
It is to be understood that the following disclosure provides many different embodiments, or examples, for implementing different features of the subject matter of the disclosure. The particular arrangements and examples shown are meant to simplify the present disclosure and not to limit the same. Of course, these are merely examples and are not intended to be limiting. For example, the formation of a first feature over a second feature described below may include direct contact between the two or the two with additional features intervening therebetween. Furthermore, the present disclosure may repeat reference numerals and/or symbols in the various embodiments. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
The terms used in this specification have their ordinary meaning in the art and in the context of their use. The embodiments used in this specification, including examples of any terms discussed herein, are illustrative only and do not limit the scope and meaning of the disclosure or of any exemplary terms. Likewise, the present disclosure is not limited to some of the implementations provided in this specification.
It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present embodiments.
As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
As used herein, the terms "comprising," "including," "having," and the like are to be understood as open-ended, i.e., meaning including but not limited to.
Fig. 1A-1G illustratively depict a process flow for manufacturing a circuit board in accordance with some embodiments of the present disclosure.
First, please refer to fig. 1A. A first conductive layer 111 is provided. In some embodiments, the first conductive layer 111 is a metal, such as copper (copper foil), but not limited thereto. In some embodiments, the thickness of the first conductive layer is greater than 3 microns, such as 3 microns to 10 microns (3 microns, 4 microns, 5 microns, 6 microns, 7 microns, 8 microns, 9 microns, or 10 microns), but is not so limited.
Please refer to fig. 1B and fig. 1C. An adhesive material having conductivity is applied to the surface 1111 of the first conductive layer 111 to serve as an adhesive layer 120, and the conductive block 130 is adhered to the surface 1111 of the first conductive layer 111. In some embodiments, the adhesive material may be first applied to the bottom surface of the conductive block 130, and the conductive block 130 is adhered to the surface 1111 of the first conductive layer 111.
In some embodiments, the surface area of the adhesive layer 120 contacting the bottom surface of the conductive block 130 does not exceed the surface area of the bottom surface of the conductive block 130, i.e., the adhesive layer 120 does not extend beyond the bottom surface of the conductive block 130. In some embodiments, the adhesive material comprises a conductive paste with a conductive substance, such as a Transient Liquid Phase Sintering (TLPS) adhesive material. The transient liquid phase sintered adhesive material comprises a combination of metal particles (e.g., copper)Tin) and a solvent, and the principle is that after the interface liquid phase flow is formed by the combination of metal particles which generate liquid phase at the adhesion interface by heating, the melting point of the liquid phase gradually rises along with the progress of reaction diffusion, so that the melting point of the adhesion layer 120 exceeds the adhesion temperature, and the adhesion layer 120 is solidified, and the effect of adhering the first conductive layer 111 is achieved. The adhesive layer 120 formed by the transient liquid phase sintering adhesive material not only has high reliability, but also has low resistance (excellent conductivity, resistivity can be less than 1x 10)-6Ω · m) and high thermal conductivity (thermal conductivity greater than 20W/mk), can conduct the conductive bump 130 and the first conductive layer 111, and assist in heat dissipation of the conductive bump 130. In one embodiment, the transient liquid phase sintering adhesive material is heated to a temperature higher than 150 ℃ and lower than the melting point of the first conductive layer 111 and the conductive bump 130 (e.g., but not limited to 160 ℃, 170 ℃, 180 ℃, 190 ℃, or 200 ℃), so that the transient liquid phase sintering adhesive material is in a liquid phase flow dynamic state. In one embodiment, the thickness of the adhesive layer 120 is less than 5 microns, such as 0.01 microns to 5 microns, such as 1 micron, 2 microns, 3 microns, 4 microns, or any value in the foregoing range, but not limited thereto.
In some embodiments, the conductive block 130 is not limited in size and shape. In one embodiment, the conductive bumps 130 may be the same size or shape; in another embodiment, the conductive blocks 130 are different in size or shape (e.g., the first conductive block 131, the second conductive block 132, and the third conductive block 133 of FIG. 1C). In one embodiment, the conductive block 130 may be an elongated extension structure, such as a conductive pad or a wire.
In some embodiments, the sum of the thicknesses of the first conductive layer 111, the adhesive layer 120, and the conductive block 130 may be 20 micrometers to 3 millimeters, such as 20 micrometers, 40 micrometers, 60 micrometers, 80 micrometers, 100 micrometers, 200 micrometers, 400 micrometers, 600 micrometers, 800 micrometers, 1 millimeter, 2 millimeters, 3 millimeters, or any value in the foregoing interval, but is not limited thereto. It should be noted that, by using the adhesive layer 120 and adhering the conductive block 130 to the first conductive layer 111 first and then bonding other components, the conductive block 130 is not limited by the thickness of the conventional circuit board, and provides a more flexible application for the structure of the circuit board with the conductive block 130 embedded therein. For example, in some embodiments, a thicker conductive block 130 may be used, such that the ratio of the thickness of the first conductive layer 111 to the thickness of the first conductive layer 111, the adhesion layer 120, and the conductive block 130 is greater than 1:15, such as 1:15 to 1:30 (e.g., 1:16, 1:17, 1:18, 1:19, 1:20, 1:21, 1:22, 1:23, 1:24, 1:25, 1:26, 1:27, 1:28, 1:29, 1:30, or the ratio in any of the foregoing ranges), but is not limited thereto.
Please refer to fig. 1D to fig. 1G. Fig. 1D, an insulating layer 140 is provided. Referring to fig. 1E, a portion of the insulating layer 140 is removed, and a recess a that is recessed upward and can accommodate the conductive block 130 is formed on the surface of the insulating layer 140. Referring to fig. 1F and fig. 1G, the insulating layer 140 is disposed on the surface 1111 of the first conductive layer 111 and the conductive block 130, such that the conductive block 130 is accommodated in the groove a; meanwhile, a second conductive layer 112 is provided, and the second conductive layer 112 is disposed on the insulating layer 140, so as to obtain the circuit board 100.
In some embodiments, the material and thickness of the second conductive layer 112 may be the same as or similar to the first conductive layer 111.
In other embodiments, the step of disposing the insulating layer 140 on the surface 1111 of the first conductive layer 111 and the conductive block 130 may also be to form a groove a capable of accommodating the conductive block 130 on the first insulating layer, and then cover the conductive block 130 and the first conductive layer 111 with the first insulating layer including the groove a, so that the groove a accommodates the conductive block 130. One or more second insulating layers without the recess forming process are disposed on the first insulating layer including the recess a according to the desired thickness of the insulating layer 140. Finally, a second conductive layer 112 is disposed on the second insulating layer or the uppermost second insulating layer to obtain the circuit board 100. In some embodiments, the steps of disposing the insulating layer 140 on the surface 1111 of the first conductive layer 111 and the conductive block 130 and disposing the second conductive layer 112 on the insulating layer 140 include using a thermal compression method to simultaneously press the first conductive layer 111, the insulating layer 140, the conductive block 130 and the second conductive layer 112 to obtain the circuit board 100, wherein the first conductive layer 111, the conductive block 130, the adhesive layer 120 and the second conductive layer 112 have conductivity and are electrically connected to each other to form a conductive structure.
Referring to fig. 2A-2B, a process for manufacturing a circuit board including conductive pillars 150 according to some embodiments of the present disclosure is exemplarily described.
First, referring to fig. 2A, a portion of the insulating layer 140 and a portion of the second conductive layer 112 are removed to expose the top surface 134 of the conductive block 130, thereby forming a blind hole B. Next, referring to fig. 2B, the conductive material is filled in the blind via B to form the conductive pillar 150. That is, the conductive pillar 150 penetrates through the second conductive layer 112 and the insulating layer 140, and extends to the top surface 134 of the conductive bump 130. In some embodiments, no conductive post 150 may be disposed on the top surface 135 of a portion of the conductive bump 130 (e.g., the third conductive bump 133).
In some embodiments, the conductive material may be the same as the material of conductive layer 110, such as copper. In some embodiments, the blind via B can be formed by laser or selective etching, and the second conductive layer 112 is used as a plating seed layer to fill the conductive material in the blind via B to form the conductive pillar 150. In some embodiments, the tops of the conductive pillars 150 are coplanar with the second conductive layer 112.
The conductive pillars 150 are used to assist in dissipating heat from the conductive block 130, and one skilled in the art can selectively form one or more conductive pillars 150 on the conductive block 130 according to heat dissipation requirements, cost, and subsequent process considerations.
In some embodiments, please refer to fig. 3A to fig. 3B, which schematically describe a process of manufacturing the circuit board 100 including the conductive pillars 150 according to other embodiments of the present disclosure, wherein a plurality of conductive pillars 150 are formed on one conductive block 130 in addition to one conductive pillar 150 formed on one conductive block 130, so that a heat dissipation area of the conductive block 130, which is easily heated in use, can be increased. Fig. 3A illustrates that a blind via B is formed on the first conductive block 131 and two blind vias B are formed on the second conductive block 132. Fig. 3B illustrates filling the conductive material in the blind via B to form a conductive pillar 150. In some embodiments, fig. 3A and 3B may form the blind via B and the conductive pillar 150 in a manner similar to that described in fig. 2A and 2B.
That is, the circuit board 100 of the present disclosure may include the conductive pillar 150 on the conductive block 130, the plurality of conductive pillars 150 on the conductive block 130, no conductive pillar 150 on the conductive block 130, or both of the above configurations.
In some embodiments, referring to fig. 4, the first conductive layer 111, the second conductive layer 112, or both may be patterned by photolithography and etching to form the patterned first conductive layer 113, the patterned second conductive layer 114, or the patterned first conductive layer 113 and the patterned second conductive layer 114 for use as a circuit.
For example, the first conductive layer 111 and the second conductive layer 112 may be further patterned in the circuit board 100 including the conductive block 130 to form a patterned first conductive layer 113 and a patterned second conductive layer 114. Referring to fig. 5, the first conductive layer 111 and the second conductive layer 112 may be further patterned in the circuit board 100 including the conductive bumps 130 and the conductive posts 150. It is to be emphasized that, in some embodiments of the present disclosure, the conductive bump 130 does not penetrate through the insulating layer 140 and the second conductive layer 112, and a portion of the conductive bump 130 does not have the conductive pillar 150 (e.g., the third conductive bump 133). Therefore, the position of the conductive block 130 is not limited when patterning the second conductive layer 112.
In some embodiments of the present disclosure, the conductive layer and the conductive block are bonded by using a conductive adhesive material, and compared to the conventional method of forming the conductive block on the conductive layer by electroplating or filling the conductive material in the through hole of the insulating layer in the substrate, the thickness of the conductive block of the present disclosure is not limited by the substrate or electroplating, and the conductive block has better flexibility and is not limited by the patterning position of the conductive layer to avoid the position of the conductive block, thereby providing more design changes for the circuit pattern.
Although the present disclosure has been described in detail with respect to certain embodiments, other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein.
Claims (19)
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