CN114171457A - Display panel and method of making the same - Google Patents
Display panel and method of making the same Download PDFInfo
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- CN114171457A CN114171457A CN202111486856.0A CN202111486856A CN114171457A CN 114171457 A CN114171457 A CN 114171457A CN 202111486856 A CN202111486856 A CN 202111486856A CN 114171457 A CN114171457 A CN 114171457A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/441—Interconnections, e.g. scanning lines
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/451—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
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Abstract
The application discloses a display panel and a preparation method thereof, wherein the preparation method comprises the steps of providing a substrate; preparing a common electrode layer, a grid electrode layer and a grid electrode insulating layer on the substrate; preparing a metal oxide layer and a data transmission layer on the gate insulating layer; the step of preparing the metal oxide layer and the data transmission layer on the gate insulating layer includes: performing a yellow light process by using a semitransparent light shield to define the data transmission layer, a required channel region and a light resistance pattern of a pixel region; etching to remove the film layer without the photoresist protection; ashing to remove the channel region and the light resistance above the pixel region, etching to remove the channel region and the data transmission layer of the pixel region, and only keeping the metal oxide layer above. The technical effect of the application lies in that the fringe field switching liquid crystal panel is prepared by only adopting four light shades, so that the cost is saved, the manufacturing efficiency is improved, and the aperture opening ratio of the display panel is improved.
Description
Technical Field
The application relates to the field of display, in particular to a display panel and a preparation method thereof.
Background
The Fringe Field Switching (FFS) technology is currently a technology applied in the Field of liquid crystal display, has the advantages of fast response speed, wide viewing angle, high light transmittance, and the like, is widely applied to terminal devices such as notebook displays, desktop displays, televisions, and the like, and is also a display technology rapidly developed in recent years.
The core of the FFS technology is a Thin Film Transistor (TFT) technology, but the TFT of the FFS liquid crystal panel is usually made of two layers of ITO, so that the manufacturing process of the FFS liquid crystal panel is more complicated, and 1-2 masks are more used than the general liquid crystal panel. In order to reduce the cost and increase the manufacturing efficiency, it is one of the current research directions to reduce the number of masks in FFS technology.
Disclosure of Invention
The present disclosure is directed to a display panel and a method for manufacturing the same, which can solve the technical problems of complex manufacturing process, large mask usage amount, and the like of the existing fringe field switching liquid crystal display panel.
In order to achieve the above object, the present application provides a method for manufacturing a display panel, including the steps of: providing a substrate; preparing a common electrode layer, a grid electrode layer and a grid electrode insulating layer on the substrate; preparing a metal oxide layer and a data transmission layer on the gate insulating layer; the step of preparing the metal oxide layer and the data transmission layer on the gate insulating layer includes: performing a yellow light process by using a semitransparent light shield to define the data transmission layer, a required channel region and a light resistance pattern of a pixel region; etching to remove the film layer without the protection of the photoresist pattern; ashing to remove the channel region and the light resistance above the pixel region, etching to remove the channel region and the data transmission layer of the pixel region, and only keeping the metal oxide layer above.
Further, the step of preparing the common electrode layer and the gate electrode layer on the substrate includes the following steps: sequentially coating a film common electrode layer and a gate electrode layer on the upper surface of the substrate; performing a yellow light process by using a first translucent photomask to define photoresist patterns of the gate layer and the common electrode layer; the first translucent mask comprises a first complete shielding area, a first translucent shielding area and a first opening area; etching to remove the film layer without the protection of the photoresist pattern; ashing to remove a layer of photoresist, exposing the gate layer corresponding to the first semitransparent shielding region, etching to remove the exposed gate layer, and ashing to remove the residual photoresist.
Further, the step of preparing a gate insulating layer on the substrate includes: and depositing a gate insulating layer material on the gate layer, the common electrode layer and the upper surface of the substrate, wherein the gate insulating layer material comprises silicon oxide or a mixture of silicon nitride and silicon oxide, the deposition thickness is 3000-4500 angstroms, patterning is carried out on the gate insulating layer material by adopting a photomask, and partial gate layer patterns are exposed to form the gate insulating layer.
Further, the step of preparing the metal oxide layer and the data transmission layer on the gate insulating layer includes: sequentially depositing a metal oxide layer and a data transmission layer on the gate insulating layer; the adopted second semi-transparent light shield comprises a second complete shielding area, a second semi-transparent shielding area and a second opening area; the second semitransparent shielding area is opposite to the channel area and the pixel area; ashing to remove the channel region corresponding to the second semi-transparent shielding region and the photoresist above the pixel region, etching to remove the data transmission layer of the channel region and the pixel region, only keeping the metal oxide layer above the channel region and the pixel region, and ashing to remove the residual photoresist.
Further, the deposition thickness of the metal oxide layer is 500-1500 angstroms, and the material of the metal oxide layer is at least one of indium gallium zinc oxide, indium gallium tin oxide and indium gallium zinc tin oxide; the deposition thickness of the data transmission layer is 2500-5000 angstrom meters, the data transmission layer is of a laminated structure formed by at least two layers of metal materials, one layer of the data transmission layer is made of copper, and the rest at least one layer of the data transmission layer is made of at least one of molybdenum, titanium and niobium.
Further, the preparation method of the display panel further comprises the following steps: and depositing a layer of passivation layer material above the data transmission layer, the metal oxide layer and the grid insulation layer, wherein the passivation layer material comprises silicon oxide or silicon oxynitride, the deposition thickness is 2000-4000 angstroms, patterning is carried out on the passivation layer material by adopting a light shield, and a part of the data transmission layer and a part of the metal oxide layer are exposed to form a passivation layer.
Further, the preparation method of the display panel further comprises the following steps: and carrying out laser processing on the substrate, converting the exposed metal oxide layer into a conductor to form a pixel electrode, wherein the metal oxide layer covered by the passivation layer has semiconductor performance and serves as a channel, and the metal oxide layers converted into the conductor on the two sides of the channel serve as a source electrode and a drain electrode to form a thin film transistor structure.
Further, the size of a patterned opening of the passivation layer is adjusted, and the laser intensity during laser processing is adjusted to control the diffusion depth of the conductor, so that the length of the channel is smaller than 3 microns.
Furthermore, the common electrode layer is made of a transparent material and comprises indium tin oxide or indium zinc oxide, and the thickness of the film layer is 500-1000 angstrom; the gate layer is made of a laminated structure consisting of at least two layers of metal materials, wherein one layer of the material is copper, and the rest at least one layer of the material is at least one of molybdenum, titanium and niobium; the thickness of the film layer is 2500-5000 angstrom meters.
To achieve the above object, the present application further provides a display panel prepared by the method for preparing a display panel as described above.
The technical effect of the application lies in that the fringe field switch liquid crystal panel is prepared by only adopting four light masks, the number of the light masks is reduced, the preparation procedures are reduced, the process cost is saved, the manufacturing efficiency is improved, and meanwhile, the aperture opening ratio of the display panel can be improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present disclosure;
FIG. 2 is a schematic structural diagram of a plated common electrode layer and a gate electrode layer according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a photolithography process using a first translucent mask according to an embodiment of the present disclosure;
FIG. 4 is a schematic structural diagram illustrating a structure of a film without protection of a first photoresist layer removed according to an embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of a patterned gate layer according to an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of a completed gate insulating layer according to an embodiment of the present disclosure;
FIG. 7 is a schematic diagram of a deposited metal oxide layer and a data transmission layer provided in an embodiment of the present application;
FIG. 8 is a schematic view of a photolithography process using a second translucent mask according to an embodiment of the present disclosure;
FIG. 9 is a schematic structural diagram illustrating a structure after removing a layer without protection of a second photoresist layer according to an embodiment of the present disclosure;
fig. 10 is a schematic structural diagram of a patterned data transmission layer provided in an embodiment of the present application;
FIG. 11 is a schematic structural diagram illustrating a passivation layer deposited according to an embodiment of the present disclosure;
fig. 12 is a schematic structural diagram of a display panel according to an embodiment of the present application.
Description of reference numerals:
1. a substrate; 2. a common electrode layer; 3. a gate layer; 4. a gate insulating layer; 5. a metal oxide layer; 6. a data transport layer; 7. a passivation layer;
10. a first photoresist layer; 20. a second photoresist layer;
100. a first translucent mask; 200. a second translucent mask;
110. a first fully shaded region; 120. a first translucent mask region; 130. a first open area;
210. a second fully shaded region; 220. a second translucent mask region; 230. a second open area.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application. Furthermore, it should be understood that the detailed description and specific examples, while indicating exemplary embodiments of the invention, are given by way of illustration and explanation only, and are not intended to limit the scope of the invention. In the present application, unless indicated to the contrary, the use of the directional terms "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, and more particularly to the orientation of the figures of the drawings; while "inner" and "outer" are with respect to the outline of the device.
The embodiment of the application provides a display panel and a preparation method thereof. The following are detailed below. It should be noted that the following description of the embodiments is not intended to limit the preferred order of the embodiments.
As shown in fig. 1 to 12, the method for manufacturing a display panel provided in the embodiment of the present application includes steps S1 to S.
S1 provides a substrate 1, wherein the substrate 1 is generally a glass substrate and has a substrate function.
S2 prepares the common electrode layer 2, the gate electrode layer 3, and the gate insulating layer 4 on the upper surface of the substrate 1. Specifically, a common electrode layer 2 and a gate electrode layer 3 (see fig. 2) are sequentially coated on the entire upper surface of the substrate 1, the common electrode layer 2 is made of a transparent material including indium tin oxide or indium zinc oxide, and the thickness of the film layer is 500-1000 angstrom. The thickness of the film layer of the gate layer 3 is 2500-5000 angstrom meters, the material of the gate layer 3 is a laminated structure composed of at least two layers of metal materials, one layer of the material is copper (Cu), the remaining at least one layer of the material is at least one of molybdenum (Mo), titanium (Ti) and niobium (Nb), and in this embodiment, the gate layer 3 may be a structure of copper/molybdenum, copper/titanium, copper/molybdenum niobium and the like.
As shown in fig. 3, a first translucent mask 100 is used to perform a photolithography process to define photoresist patterns of the gate layer 3, the common electrode layer 2, the pixel region and the terminal region as a first photoresist layer 10. Specifically, the first translucent mask 100 includes a first fully shielding region 110, a first translucent shielding region 120, and a first opening region 130. The first complete shielding region 110 is disposed opposite to the terminal region and a portion of the pixel region, the first semi-transparent shielding region 120 is disposed opposite to a portion of the pixel region, and the first opening region 130 is disposed opposite to the remaining portion, so as to define a pattern of the gate layer 3, the common electrode layer 2 and the terminal region. The thickness of the photoresist layer defined by the first semi-transparent shielding region 120 is smaller than that defined by the first fully shielding region 110. The transparency of the first translucent mask region 120 of the first translucent mask 100 is adjusted to change the thickness of the defined photoresist layer.
As shown in fig. 4, the film layer (the gate layer and the common electrode layer not covered by the photoresist layer) without the protection of the first photoresist layer 10 is removed by the first etching process.
As shown in fig. 5, ashing treatment is performed by using oxygen to remove a photoresist layer, exposing the gate layer corresponding to the first translucent shielding region 120, and ensuring that the photoresist layer defined by the first translucent shielding region 120 can be removed. And removing the gate layer above the common electrode layer in the pixel region by second etching, transparentizing the gate layer, and removing the residual photoresist by ashing again to form a patterned gate layer 3 and a patterned common electrode layer 2.
As shown in fig. 6, a gate insulating layer material is deposited on the gate layer 3, the common electrode layer 2 and the upper surface of the substrate 1, wherein the gate insulating layer material comprises silicon oxide or a mixture of silicon nitride and silicon oxide, and the deposition thickness is 3000 to 4500 angstroms. And patterning the semiconductor substrate by using a photomask to expose part of the gate layer pattern of the terminal area, thereby forming a gate insulating layer 4. The gate insulating layer 4 serves as an insulating layer, and prevents problems such as short circuits between the gate layer 3 and other metal layers.
S3 prepares a metal oxide layer 5 and a data transfer layer 6 on the gate insulating layer 4. Specifically, a metal oxide layer 5 and a data transfer layer 6 are sequentially deposited on the upper surface of the gate insulating layer 4 (see fig. 7). The deposition thickness of the metal oxide layer 5 is 500-1500 angstroms, and the material of the metal oxide layer 5 is at least one of Indium Gallium Zinc Oxide (IGZO), Indium Gallium Tin Oxide (IGTO) and Indium Gallium Zinc Tin Oxide (IGZTO). The deposition thickness of the data transmission layer 6 is 2500-5000 angstrom meters, the data transmission layer 6 is a laminated structure formed by at least two layers of metal materials, one layer of the material is copper (Cu), the rest at least one layer of the material is at least one of molybdenum (Mo), titanium (Ti) and niobium (Nb), and in this embodiment, the data transmission layer 6 can be a structure of copper/molybdenum, copper/titanium, copper/molybdenum niobium and the like.
As shown in fig. 8, a yellow light process is performed using the second translucent mask 200 to define the data transmission layer 6 and the photoresist pattern of the desired channel region and pixel region, and form the second photoresist layer 20. The second translucent mask 200 includes a second completely shielding region 210, a second translucent shielding region 220 and a second open region 230. The second semi-transparent shielding region 220 is disposed opposite to the channel region and the pixel region, and a thickness of the photoresist layer defined by the second semi-transparent shielding region 220 is smaller than a thickness of the photoresist layer defined by the second complete shielding region 210. Adjusting the transparency of the second translucent mask region 220 of the second translucent mask 200 can change the thickness of the defined photoresist layer.
As shown in fig. 9, the etching process removes the film layer (the data transmission layer and the metal oxide layer not covered by the second photoresist layer 20) without the protection of the second photoresist layer 20.
As shown in fig. 10, ashing treatment is performed by using oxygen to remove a photoresist layer, the ashing treatment removes the photoresist layer above the channel region and the pixel region corresponding to the second semi-transparent shielding region 220, and exposes the metal oxide layer corresponding to the second semi-transparent shielding region 220, so as to ensure that the photoresist layer defined by the second semi-transparent shielding region 220 can be removed. And etching to remove the data transmission layer of the channel region and the pixel region, only keeping the metal oxide layer above the channel region and the data transmission layer of the pixel region, and ashing to remove the residual photoresist to form a patterned data transmission layer 6 and a patterned metal oxide layer 5.
S4 depositing a passivation layer material over the data transmission layer 6, the metal oxide layer 5, and the gate insulating layer 4, wherein the passivation layer material includes silicon oxide or silicon oxynitride, the deposition thickness is 2000-4000 angstroms, and the passivation layer material is patterned by using a photomask to expose a portion of the data transmission layer and a portion of the metal oxide layer, thereby forming a passivation layer 7 (see fig. 11).
S5 is a step of performing laser processing on the substrate 1 to convert the exposed metal oxide layer 5 into a conductor to form a pixel electrode, and the metal oxide layer 5 covered by the passivation layer 7 is not converted into a conductor and still has semiconductor properties as a channel, and the metal oxide layers converted into a conductor on both sides of the channel are used as a source and a drain to form a TFT having a thin film transistor structure (see fig. 12). The patterned opening size of the passivation layer 7 is adjusted, and the laser intensity during laser processing is adjusted to control the diffusion depth of the conductor, so that the length of the channel is smaller than 3 microns, the size of the TFT is effectively reduced, and the opening ratio can be improved.
The preparation method of the display panel has the advantages that the fringe field switching liquid crystal panel is prepared by only adopting four photomasks, the number of photomasks is reduced, preparation procedures are reduced, process cost is saved, manufacturing efficiency is improved, and meanwhile the aperture opening ratio of the display panel can be improved.
As shown in fig. 12, the present embodiment further provides a display panel, which is prepared by the method for preparing a display panel described above, and the display panel includes a substrate 1, a common electrode layer 2, a gate electrode layer 3, a gate insulating layer 4, a metal oxide layer 5, a data transmission layer 6, a passivation layer 7, and functional film layers such as a light emitting layer, which are not described in detail in this embodiment.
The technical effect of the display panel is that the fringe field switching liquid crystal panel is prepared by only adopting four light shades in the preparation process of the display panel, the number of the light shades is reduced, the preparation procedures are reduced, the process cost is saved, the manufacturing efficiency is improved, and meanwhile, the aperture opening ratio of the display panel can be improved.
The display panel and the manufacturing method thereof provided by the embodiments of the present application are described in detail above, and the principle and the embodiment of the present application are explained herein by applying specific examples, and the description of the embodiments above is only used to help understanding the method and the core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A preparation method of a display panel is characterized by comprising the following steps:
providing a substrate;
preparing a common electrode layer, a grid electrode layer and a grid electrode insulating layer on the substrate; and
preparing a metal oxide layer and a data transmission layer on the gate insulating layer;
the step of preparing the metal oxide layer and the data transmission layer on the gate insulating layer includes:
performing a yellow light process by using a semitransparent light shield to define the data transmission layer, a required channel region and a light resistance pattern of a pixel region;
etching to remove the film layer without the protection of the photoresist pattern;
ashing to remove the channel region and the light resistance above the pixel region, etching to remove the channel region and the data transmission layer of the pixel region, and only keeping the metal oxide layer above.
2. The method for manufacturing a display panel according to claim 1, wherein the step of manufacturing a common electrode layer and a gate layer on the substrate comprises the steps of:
sequentially coating a film common electrode layer and a gate electrode layer on the upper surface of the substrate;
performing a yellow light process by using a first translucent photomask to define photoresist patterns of the gate layer and the common electrode layer; the first translucent mask comprises a first complete shielding area, a first translucent shielding area and a first opening area;
etching to remove the film layer without the protection of the photoresist pattern;
ashing to remove a layer of photoresist, exposing the gate layer corresponding to the first semitransparent shielding region, etching to remove the exposed gate layer, and ashing to remove the residual photoresist.
3. The method of manufacturing a display panel according to claim 2, wherein the step of manufacturing a gate insulating layer on the substrate includes:
and depositing a gate insulating layer material on the gate layer, the common electrode layer and the upper surface of the substrate, wherein the gate insulating layer material comprises silicon oxide or a mixture of silicon nitride and silicon oxide, the deposition thickness is 3000-4500 angstroms, patterning is carried out on the gate insulating layer material by adopting a photomask, and partial gate layer patterns are exposed to form the gate insulating layer.
4. The method of manufacturing a display panel according to claim 3, wherein the step of manufacturing the metal oxide layer and the data transfer layer on the gate insulating layer includes:
sequentially depositing a metal oxide layer and a data transmission layer on the gate insulating layer;
the adopted second semi-transparent light shield comprises a second complete shielding area, a second semi-transparent shielding area and a second opening area;
the second semitransparent shielding area is opposite to the channel area and the pixel area;
ashing to remove the channel region corresponding to the second semi-transparent shielding region and the photoresist above the pixel region, etching to remove the data transmission layer of the channel region and the pixel region, only keeping the metal oxide layer above the channel region and the pixel region, and ashing to remove the residual photoresist.
5. The method for manufacturing a display panel according to claim 4,
the deposition thickness of the metal oxide layer is 500-1500 angstroms, and the material of the metal oxide layer is at least one of indium gallium zinc oxide, indium gallium tin oxide and indium gallium zinc tin oxide;
the deposition thickness of the data transmission layer is 2500-5000 angstrom meters, the data transmission layer is of a laminated structure formed by at least two layers of metal materials, one layer of the data transmission layer is made of copper, and the rest at least one layer of the data transmission layer is made of at least one of molybdenum, titanium and niobium.
6. The method for manufacturing a display panel according to claim 4, further comprising the steps of:
and depositing a layer of passivation layer material above the data transmission layer, the metal oxide layer and the grid insulation layer, wherein the passivation layer material comprises silicon oxide or silicon oxynitride, the deposition thickness is 2000-4000 angstroms, patterning is carried out on the passivation layer material by adopting a light shield, and a part of the data transmission layer and a part of the metal oxide layer are exposed to form a passivation layer.
7. The method for manufacturing a display panel according to claim 6, further comprising:
and carrying out laser processing on the substrate, converting the exposed metal oxide layer into a conductor to form a pixel electrode, wherein the metal oxide layer covered by the passivation layer has semiconductor performance and serves as a channel, and the metal oxide layers converted into the conductor on the two sides of the channel serve as a source electrode and a drain electrode to form a thin film transistor structure.
8. The method for manufacturing a display panel according to claim 7,
and adjusting the size of the patterned opening of the passivation layer and adjusting the intensity of laser during laser processing to control the diffusion depth of the conductor, so that the length of the channel is less than 3 microns.
9. The method for manufacturing a display panel according to claim 2,
the common electrode layer is made of a transparent material and comprises indium tin oxide or indium zinc oxide, and the thickness of the film layer is 500-1000 angstrom;
the gate layer is made of a laminated structure consisting of at least two layers of metal materials, wherein one layer of the material is copper, and the rest at least one layer of the material is at least one of molybdenum, titanium and niobium; the thickness of the film layer is 2500-5000 angstrom meters.
10. A display panel produced by the production method for a display panel according to any one of claims 1 to 9.
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| WO2024040625A1 (en) * | 2022-08-23 | 2024-02-29 | 广州华星光电半导体显示技术有限公司 | Liquid crystal display panel and manufacturing method therefor |
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