CN114143628A - Multi-rate digital acquisition device and method - Google Patents
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
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- H04L1/0002—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
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- H—ELECTRICITY
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Abstract
The invention discloses a multi-rate digital acquisition device and a method, belonging to the field of power system automation, wherein the device comprises: the system comprises a multi-core processor plug-in, a data sending plug-in, a power supply plug-in and a human-computer interface plug-in; the digital signal processor DSP comprises: the device comprises a receiving and decoding module, a digital filtering module, a linear interpolation module and a merging and sending module; judging the frame format of the received sampling data according to the sampling rate of the accessed digital signal by the receiving and decoding module; analyzing a data frame receiving time mark, and performing partition caching on the sampled data to a buffer; the invention solves the problem of fixed speed of digital sampling signals output by the same equipment, and further forwards the received data at different speeds after processing, thereby meeting different requirements of different interactive equipment on sampling speed.
Description
Technical Field
The invention belongs to the field of power system automation, and particularly relates to a multi-rate digital acquisition device and method.
Background
The intelligent transformer substation adopts an electronic transformer or a conventional transformer to convert primary current or voltage into digital signals through a merging unit, and then the digital signals are transmitted to secondary equipment such as protection, measurement and control and the like through optical fibers. The speed of the digital sampling signal output by the merging unit is fixed, and the requirements of different devices in the station on different sampling speeds of primary current or voltage cannot be met. In addition, the digital sampling rate output by the merging unit is only 4kHz, so that the requirement of other equipment, such as a power quality monitoring terminal, on primary current or voltage high-rate acquisition cannot be met.
With the continuous high-speed development of renewable energy sources and wind power generation technologies, the flexible direct-current power transmission technology is also widely applied, and a direct-current electronic transformer is used as a key device in a flexible direct-current power grid and is required to provide primary current or voltage digital signals with high-speed sampling and multi-speed output.
Disclosure of Invention
The purpose of the invention is as follows: in order to overcome the defects in the prior art, the invention provides the acquisition method and the acquisition device capable of simultaneously outputting the digital signals with different sampling rates, so that the requirements of different equipment of an intelligent substation on different primary current or voltage sampling rates are met, and the primary current or voltage digital signals with high-speed sampling and multi-speed output are provided for the flexible direct-current power grid control protection system.
The technical scheme is as follows: in a first aspect, the present invention provides a method for multi-rate digital acquisition, comprising the steps of:
receiving different types of digital signals, determining the format of a sampling data frame according to the sampling rate configured when the digital signals are accessed, analyzing the data frame confirmed by the CRC, obtaining sampling data at different sampling rates and storing the sampling data in a data cache region;
carrying out digital filtering processing on the sampled data in the data cache region, and filtering high-frequency interference data;
reading sampling point time of the filtered sampling data, performing linear interpolation calculation on the sampling data based on the sampling point time to obtain a digital sampling value of a sending rate, and updating the sampling data according to the sampling value;
acquiring sending rate parameters of the sampled data with different sampling rates, correspondingly updating the sampled data in the sending buffer area based on the different sending rate parameters, sending the multi-type sampled data to a sending register, and outputting the multi-sampled data according to the state of the sending register and the time of reaching the corresponding sending rate.
In a further embodiment, in determining the sampled data frame format:
judging whether a sampling data frame is received or not according to the sampling rate; if not, the frame is considered to be lost and the receiving is continued;
if a sampling data frame is received, judging the frame format of the received sampling data; if the data frame format is judged to be correct, analyzing the data frame receiving time mark, and storing the time mark into a time mark cache region; if the data frame format is judged to be incorrect, the receiving is continued.
In a further embodiment, parsing the data frame validated by the CRC check code comprises:
judging a CRC (cyclic redundancy check) code of a data frame for received sampling data;
judging whether the CRC check code is correct, if so, analyzing according to a data frame definition format to obtain sampling data at different sampling rates and storing the sampling data in a data cache region; if not, resetting the optical fiber receiving module and sampling the emptying data.
In a further embodiment, the linear interpolation calculation process for the sampled data based on the sample point time is as follows:
searching an interpolated sampling point moment in a time scale buffer area;
reading sampling data corresponding to the time scale in the data cache region, and further performing linear interpolation calculation on the sampling data;
and if the time of the interpolated sampling point is not searched, resetting the digital sampling value and setting the sampling quality as invalid.
In a further embodiment, the multi-sample data is output at a corresponding transmit rate arrival time according to the transmit register state:
if the state of the sending register is normal, judging whether the data sending time reaches the current sending rate reaching time or not, if so, sending the sampling data, and if not, not sending the sampling data;
if the state of the sending register is abnormal, resetting the optical fiber sending module; no sample data is sent out.
In a second aspect the present invention provides a multi-rate digital acquisition apparatus comprising: the system comprises a multi-core processor plug-in, a data sending plug-in, a power supply plug-in and a human-computer interface plug-in;
the multi-core processor plug-in is connected with the human-computer interface plug-in, and comprises a Central Processing Unit (CPU) and a Digital Signal Processor (DSP); the digital signal processor DSP comprises: the device comprises a receiving and decoding module, a digital filtering module, a linear interpolation module and a merging and sending module;
the receiving and decoding module is used for receiving, judging and analyzing the sampling data at different rates and storing the sampling data in a data cache region;
the digital filtering module is used for carrying out digital filtering processing on the sampling data of the data cache region and filtering high-frequency interference data;
the linear interpolation module is used for carrying out linear interpolation calculation on the sampling data based on the sampling point moment to obtain a digital sampling value of the sending rate and updating the sampling data according to the sampling value;
the merging and sending module is used for acquiring the sending rate parameter of the sampling data, updating the sampling data in the sending buffer area to the sending register based on the sending rate parameter, and outputting the multi-sampling data according to the state of the sending register and the time of reaching the corresponding sending rate
The central processing unit CPU is accessed to a background monitoring system and is used for managing and recording the running condition of the whole device;
the digital signal processor DSP is used for receiving a plurality of paths of digital sampling signals of different types through optical fibers and processing and merging data;
the data sending plug-in sends digital signal processor DSP to process the merged digital sampling signals with different rates;
the human-computer interface plug-in is used for outputting information of the plug-in of the multi-core processor;
the power supply plug-in is electrically connected with the multi-core processor plug-in, the data sending plug-in, the power supply plug-in and the man-machine interface plug-in through a mainboard power supply loop which is electrically connected with the power supply plug-in; the plug-in unit is used for supplying power to the multi-core processor plug-in unit, the data sending plug-in unit and the human-computer interface plug-in unit.
In a further embodiment, the receiving and decoding module performs data classification buffering by dividing a buffer area in a buffer, where the buffer area includes: a timestamp buffer and a data buffer.
In a further embodiment, the digital signal processor DSP is connected to a data sending plug-in via an I/O bus, and the data sending plug-in sends, processes and combines the digital sampling signals at different sending rates; the I/O bus includes: and the data bus and the CAN bus are connected with the multi-core processor plug-in, the data sending plug-in and the man-machine interface plug-in through the I/O bus for data interaction.
In a further embodiment, the human-computer interface plug-in is used for inputting instructions to the multi-core processor plug-in or outputting data processed by the multi-core processor plug-in and monitoring information of the monitoring background through other input devices in the external substation.
Has the advantages that: compared with the prior art, the invention has the following advantages:
(1) the problem of fixed speed of digital sampling signals output by the same equipment is solved through the receiving and decoding module, the digital filtering module, the linear interpolation module and the merging and sending module, sampling data received by the optical fiber module are calculated and processed through the multi-core processor plug-in, and then the sampling data are forwarded at different speeds through the data sending plug-in, so that different requirements of different interaction equipment on the sampling speed are met, and digital signals at different sampling speeds can be provided for different equipment.
(2) Other output equipment in the external transformer substation is connected through the human-computer interface plug-in unit, so that the human-computer interface plug-in unit can efficiently display and output acquired data in real time, or an acquisition process is controlled through input equipment definition.
Drawings
FIG. 1 is a schematic diagram of the apparatus of the present invention;
fig. 2 is a flow chart of the receiving and decoding module of the present invention.
FIG. 3 is a flow chart of the linear interpolation module of the present invention.
Fig. 4 is a flow chart of the merge sending module in the present invention.
Detailed Description
In order to more fully understand the technical content of the present invention, the technical solution of the present invention will be further described and illustrated with reference to the following specific embodiments, but not limited thereto.
In a first embodiment, the present invention is further described with reference to fig. 1, which provides a multi-rate digital acquisition apparatus, including: the system comprises a multi-core processor plug-in, a data sending plug-in, a power supply plug-in and a human-computer interface plug-in;
the multi-core processor plug-in is connected with the human-computer interface plug-in, and comprises a Central Processing Unit (CPU) and a Digital Signal Processor (DSP); the digital signal processor DSP comprises: the device comprises a receiving and decoding module, a digital filtering module, a linear interpolation module and a merging and sending module;
the receiving and decoding module is used for receiving, judging and analyzing the sampling data at different rates and storing the sampling data in a data cache region;
the digital filtering module is used for carrying out digital filtering processing on the sampling data of the data cache region and filtering high-frequency interference data;
the linear interpolation module is used for carrying out linear interpolation calculation on the sampling data based on the sampling point moment to obtain a digital sampling value of the sending rate and updating the sampling data according to the sampling value;
the merging and sending module is used for acquiring the sending rate parameter of the sampling data, updating the sampling data in the sending buffer area to the sending register based on the sending rate parameter, and outputting the multi-sampling data according to the state of the sending register and the time of reaching the corresponding sending rate
The central processing unit CPU is accessed to the background monitoring system and is used for managing and recording the running condition of the whole device;
the digital signal processor DSP is used for receiving a plurality of paths of digital sampling signals of different types through optical fibers and processing and merging data;
the data sending plug-in sends a digital signal processor DSP to process the merged digital sampling signal;
the human-computer interface plug-in is used for the information output of the plug-in of the multi-core processor;
the power supply plug-in is electrically connected with the multi-core processor plug-in, the data sending plug-in, the power supply plug-in and the man-machine interface plug-in through a mainboard power supply loop which is electrically connected with the power supply plug-in; the power supply module is used for supplying power to the multi-core processor plug-in, the data sending plug-in and the human-computer interface plug-in.
The central processing unit CPU is used for a field programmable gate array FPGA; the digital signal processor DSP is used for high-level instruction processing.
The digital signal processor DSP receives the multi-channel digital sampling signal through the optical fiber and processes and merges the data, and the digital signal processor DSP comprises: the device comprises a receiving and decoding module, a digital filtering module, a linear interpolation module and a merging and sending module.
Wherein, the receiving and decoding module carries out data classification caching by dividing a cache region in the cache, and the data classification caching comprises the following steps: the time mark buffer area and the data buffer area;
carrying out digital filtering on the sampling data of the data buffer area of the receiving and decoding module, adopting a second-order low-pass Butterworth filter, wherein the z-domain transfer function of the filter is as follows:
H(z)＝(b0+b1*z-1+b2*z-2)/(1-a1*z-1-a2*z-2)
filter coefficient b in formula0、b1、b2、b3、a1、a2，z-1、z-2Representing the Z-domain transform of discrete samples by a digitally filtered cutoff frequency f0And buffer sample data rate determination. The linear interpolation module has a linear interpolation function of a first-order polynomial, the interpolation error on an interpolation node is zero, and the geometric meaning of the linear interpolation module is that an A point (x) is utilized0,y0) And point B (x)1,y1) To approximate the primitive function
Wherein y is0、y1Are respectively x0、x1Time (x)1＞x0) And x is the interrupt time of the DSP.
The linear interpolation module flow is shown in fig. 3, and the specific implementation method is as follows: searching the interpolation sampling point time in the time scale buffer area according to the DSP interruption time x, namely x1And x0Satisfy x1＞x＞x0(ii) a Further reading the sampling data corresponding to the data buffer area, i.e. y0And y1(ii) a Further mixing (x)0,y0) And (x)1,y1) Substituting the first-order polynomial into the first-order polynomial to calculate a sampling value of the DSP interruption time x, namely a digital sampling value of the sending rate; and if the time of the interpolated sampling point is not searched in the time scale cache region, resetting the digital sampling value and setting the sampling quality as invalid.
And the merging and sending module judges whether to send the data in the cache region according to the state of the sending register.
The DSP is connected with the data sending plug-in unit through an I/O bus, and the data sending plug-in unit sends and processes the combined digital sampling signals.
The I/O bus includes: and the data bus and the CAN bus are connected with the multi-core processor plug-in and the data sending plug-in through the I/O bus for data interaction.
The human-computer interface plug-in is used for inputting instructions to the multi-core processor plug-in or outputting data processed by the multi-core processor plug-in and monitoring information of the monitoring background through output equipment through other input equipment in the external substation.
The second embodiment, further explained with reference to fig. 2 to fig. 3, provides a multirate digital acquisition method, including the following steps:
receiving different types of digital signals, determining the format of a sampling data frame according to the sampling rate configured when the digital signals are accessed, analyzing the data frame confirmed by the CRC, obtaining sampling data at different sampling rates and storing the sampling data in a data cache region;
carrying out digital filtering processing on the sampled data in the data cache region, and filtering high-frequency interference data;
reading sampling point time of the filtered sampling data, performing linear interpolation calculation on the sampling data based on the sampling point time to obtain a digital sampling value of a sending rate, and updating the sampling data according to the sampling value;
acquiring sending rate parameters of the sampled data with different sampling rates, correspondingly updating the sampled data in the sending buffer area based on the different sending rate parameters, sending the multi-type sampled data to a sending register, and outputting the multi-sampled data according to the state of the sending register and the time of reaching the corresponding sending rate.
In determining a sampled data frame format:
judging whether a sampling data frame is received or not according to the sampling rate; if not, the frame is considered to be lost and the receiving is continued;
if a sampling data frame is received, judging the frame format of the received sampling data; if the data frame format is judged to be correct, analyzing the data frame receiving time mark, and storing the time mark into a time mark cache region; if the data frame format is judged to be incorrect, the receiving is continued.
The analyzing of the data frame confirmed by the CRC includes:
judging a CRC (cyclic redundancy check) code of a data frame for received sampling data;
judging whether the CRC check code is correct, if so, analyzing according to a data frame definition format to obtain sampling data at different sampling rates and storing the sampling data in a data cache region; if not, resetting the optical fiber receiving module and sampling the emptying data.
In a further embodiment, the linear interpolation calculation process for the sampled data based on the sample point time is as follows:
searching an interpolated sampling point moment in a time scale buffer area;
reading sampling data corresponding to the time scale in the data cache region, and further performing linear interpolation calculation on the sampling data;
and if the time of the interpolated sampling point is not searched, resetting the digital sampling value and setting the sampling quality as invalid.
Outputting multi-sampling data at a corresponding transmission rate arrival time according to the state of the transmission register:
if the state of the sending register is normal, judging whether the data sending time reaches the current sending rate reaching time or not, if so, sending the sampling data, and if not, not sending the sampling data;
if the state of the sending register is abnormal, resetting the optical fiber sending module; no sample data is sent out.
The invention solves the problem of fixed speed of the digital sampling signal output by the same equipment through the receiving and decoding module, the digital filtering module, the linear interpolation module and the merging and sending module, further calculates and processes the sampling data received by the optical fiber module through the multi-core processor plug-in, and then forwards the sampling data at different speeds through the data sending plug-in to simultaneously meet different requirements of different interaction equipment on the sampling speed, and can provide digital signals at different sampling speeds for different equipment; other output equipment in the external transformer substation is connected through the human-computer interface plug-in unit, so that the human-computer interface plug-in unit can efficiently display and output acquired data in real time, or an acquisition process is controlled through input equipment definition.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.
Claims (9)
1. A method of multi-rate digital acquisition, comprising the steps of:
receiving different types of digital signals, determining the format of a sampling data frame according to the sampling rate configured when the digital signals are accessed, analyzing the data frame confirmed by the CRC, obtaining sampling data at different sampling rates and storing the sampling data in a data cache region;
carrying out digital filtering processing on the sampled data in the data cache region, and filtering high-frequency interference data;
reading sampling point time of the filtered sampling data, performing linear interpolation calculation on the sampling data based on the sampling point time to obtain a digital sampling value of a sending rate, and updating the sampling data according to the sampling value;
acquiring sending rate parameters of the sampled data with different sampling rates, correspondingly updating the sampled data in the sending buffer area based on the different sending rate parameters, sending the multi-type sampled data to a sending register, and outputting the multi-sampled data according to the state of the sending register and the time of reaching the corresponding sending rate.
2. A multi-rate digital acquisition method as claimed in claim 1, wherein in determining the sample data frame format:
judging whether a sampling data frame is received or not according to the sampling rate; if not, the frame is considered to be lost and the receiving is continued;
if a sampling data frame is received, judging the frame format of the received sampling data; if the data frame format is judged to be correct, analyzing the data frame receiving time mark, and storing the time mark into a time mark cache region; if the data frame format is judged to be incorrect, the receiving is continued.
3. A method of multirate digital acquisition as claimed in claim 1 wherein parsing the data frame after validation by a CRC check code comprises:
judging a CRC (cyclic redundancy check) code of a data frame for received sampling data;
judging whether the CRC check code is correct, if so, analyzing according to a data frame definition format to obtain sampling data at different sampling rates and storing the sampling data in a data cache region; if not, resetting the optical fiber receiving module and sampling the emptying data.
4. A multi-rate digital acquisition method as claimed in claim 1, wherein the linear interpolation calculation of the sampled data based on the sample point time is as follows:
searching an interpolated sampling point moment in a time scale buffer area;
reading sampling data corresponding to the time scale in the data cache region, and further performing linear interpolation calculation on the sampling data;
and if the time of the interpolated sampling point is not searched, resetting the digital sampling value and setting the sampling quality as invalid.
5. A multi-rate digital acquisition method according to claim 1, wherein the multi-sample data is output at corresponding transmit rate arrival times in accordance with transmit register states:
if the state of the sending register is normal, judging whether the data sending time reaches the current sending rate reaching time or not, if so, sending the sampling data, and if not, not sending the sampling data;
if the state of the sending register is abnormal, resetting the optical fiber sending module; no sample data is sent out.
6. A multi-rate digital acquisition device, comprising: the system comprises a multi-core processor plug-in, a data sending plug-in, a power supply plug-in and a human-computer interface plug-in;
the multi-core processor plug-in is connected with the human-computer interface plug-in, and comprises a Central Processing Unit (CPU) and a Digital Signal Processor (DSP); the digital signal processor DSP comprises: the device comprises a receiving and decoding module, a digital filtering module, a linear interpolation module and a merging and sending module;
the receiving and decoding module is used for receiving, judging and analyzing the sampling data at different rates and storing the sampling data in a data cache region;
the digital filtering module is used for carrying out digital filtering processing on the sampling data of the data cache region and filtering high-frequency interference data;
the linear interpolation module is used for carrying out linear interpolation calculation on the sampling data based on the sampling point moment to obtain a digital sampling value of the sending rate and updating the sampling data according to the sampling value;
the merging and sending module is used for acquiring the sending rate parameter of the sampling data, updating the sampling data in the sending buffer area to the sending register based on the sending rate parameter, and outputting the multi-sampling data according to the state of the sending register and the time of reaching the corresponding sending rate
The central processing unit CPU is accessed to a background monitoring system and is used for managing and recording the running condition of the whole device;
the digital signal processor DSP is used for receiving a plurality of paths of digital sampling signals of different types through optical fibers and processing and merging data;
the data sending plug-in sends digital signal processor DSP to process the merged digital sampling signals with different rates;
the human-computer interface plug-in is used for outputting information of the plug-in of the multi-core processor;
the power supply plug-in is electrically connected with the multi-core processor plug-in, the data sending plug-in, the power supply plug-in and the man-machine interface plug-in through a mainboard power supply loop which is electrically connected with the power supply plug-in; the plug-in unit is used for supplying power to the multi-core processor plug-in unit, the data sending plug-in unit and the human-computer interface plug-in unit.
7. A multi-rate digital acquisition device according to claim 6, wherein said receiving and decoding module performs data classification buffering by dividing a buffer area in a buffer, said buffer area comprising: a timestamp buffer and a data buffer.
8. A multirate digital acquisition device as claimed in claim 6, characterized in that said digital signal processor DSP is connected to a data transmission card via an I/O bus, and the data transmission card transmits and processes the combined digital sampling signals at different transmission rates; the I/O bus includes: and the data bus and the CAN bus are connected with the multi-core processor plug-in, the data sending plug-in and the man-machine interface plug-in through the I/O bus for data interaction.
9. The multi-rate digital acquisition device according to claim 8, wherein the human interface plug-in is used for inputting instructions to the multi-core processor plug-in or outputting data processed by the multi-core processor plug-in and monitoring information of the monitoring background through other input devices in the external substation.
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Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5357249A (en) * | 1991-10-21 | 1994-10-18 | Trw Inc. | Apparatus and method for high speed flexible multiplexing for fiber optic data transmissions |
| CN102394719A (en) * | 2011-09-21 | 2012-03-28 | 浙江铭道通信技术有限公司 | Multichannel HDLC data processing method based on FPGA |
| CN103116096A (en) * | 2013-01-24 | 2013-05-22 | 广东电网公司电力科学研究院 | A Merging Unit for Power Quality Monitoring and Its Synchronous Sampling Method |
| CN203773266U (en) * | 2013-12-26 | 2014-08-13 | 国家电网公司 | Digital measurement and control device |
| CN104362744A (en) * | 2014-10-24 | 2015-02-18 | 南京南瑞继保工程技术有限公司 | Integrated measurement and control device |
| CN105959143A (en) * | 2016-05-18 | 2016-09-21 | 中国电子科技集团公司第四十研究所 | FlexRay bus protocol analysis system and method based on digital fluorescent oscilloscope |
| CN108429707A (en) * | 2018-02-05 | 2018-08-21 | 西安电子科技大学 | A time-triggered service forwarder adapting to different transmission rates and its method |
| CN110890790A (en) * | 2019-12-09 | 2020-03-17 | 国网上海市电力公司 | Multi-interval integrated digital measurement and control device and main/standby machine switching method thereof |
| CN110940855A (en) * | 2019-11-11 | 2020-03-31 | 国网安徽省电力有限公司电力科学研究院 | Electric energy measurement method and device suitable for three-half wiring of intelligent substation |
| US20200133256A1 (en) * | 2018-05-07 | 2020-04-30 | Strong Force Iot Portfolio 2016, Llc | Methods and systems for sampling and storing machine signals for analytics and maintenance using the industrial internet of things |
| CN112925230A (en) * | 2019-12-06 | 2021-06-08 | 南京南瑞继保电气有限公司 | Multifunctional analog quantity unified acquisition module for transformer substation |
-
2021
- 2021-11-15 CN CN202111345046.3A patent/CN114143628B/en active Active
Patent Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5357249A (en) * | 1991-10-21 | 1994-10-18 | Trw Inc. | Apparatus and method for high speed flexible multiplexing for fiber optic data transmissions |
| CN102394719A (en) * | 2011-09-21 | 2012-03-28 | 浙江铭道通信技术有限公司 | Multichannel HDLC data processing method based on FPGA |
| CN103116096A (en) * | 2013-01-24 | 2013-05-22 | 广东电网公司电力科学研究院 | A Merging Unit for Power Quality Monitoring and Its Synchronous Sampling Method |
| CN203773266U (en) * | 2013-12-26 | 2014-08-13 | 国家电网公司 | Digital measurement and control device |
| CN104362744A (en) * | 2014-10-24 | 2015-02-18 | 南京南瑞继保工程技术有限公司 | Integrated measurement and control device |
| CN105959143A (en) * | 2016-05-18 | 2016-09-21 | 中国电子科技集团公司第四十研究所 | FlexRay bus protocol analysis system and method based on digital fluorescent oscilloscope |
| CN108429707A (en) * | 2018-02-05 | 2018-08-21 | 西安电子科技大学 | A time-triggered service forwarder adapting to different transmission rates and its method |
| US20200133256A1 (en) * | 2018-05-07 | 2020-04-30 | Strong Force Iot Portfolio 2016, Llc | Methods and systems for sampling and storing machine signals for analytics and maintenance using the industrial internet of things |
| CN110940855A (en) * | 2019-11-11 | 2020-03-31 | 国网安徽省电力有限公司电力科学研究院 | Electric energy measurement method and device suitable for three-half wiring of intelligent substation |
| CN112925230A (en) * | 2019-12-06 | 2021-06-08 | 南京南瑞继保电气有限公司 | Multifunctional analog quantity unified acquisition module for transformer substation |
| CN110890790A (en) * | 2019-12-09 | 2020-03-17 | 国网上海市电力公司 | Multi-interval integrated digital measurement and control device and main/standby machine switching method thereof |
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