Disclosure of Invention
An object of the embodiments of the present application is to provide a light emitting device driving circuit, a backlight module and a display panel, which can solve the technical problems of more scanning signals and complex time sequence of the existing light emitting driving circuit for compensating the threshold voltage.
The embodiment of the present application provides a light emitting device driving circuit, including:
the light-emitting device is connected in series with a light-emitting loop formed by a first power signal and a second power signal;
the source electrode of the driving transistor and the drain electrode of the driving transistor are connected in series to the light-emitting loop, the grid electrode of the driving transistor is electrically connected to a first node, and the drain electrode of the driving transistor is electrically connected to a second node;
the data signal writing module is accessed to a data signal and a first scanning signal and is electrically connected to a third node, and the data signal writing module is used for transmitting the data signal to the third node under the control of the first scanning signal;
the compensation module is connected to a second scanning signal and is electrically connected to the source electrode of the driving transistor and the first node, and the first compensation module is used for compensating the threshold voltage of the driving transistor under the control of the second scanning signal;
one end of the first storage capacitor is electrically connected to the first node, and the other end of the first storage capacitor is electrically connected to the second node;
and one end of the second storage capacitor is electrically connected to the first node, and the other end of the second storage capacitor is electrically connected to the third node.
In the present application, the light emitting device driving circuit further includes a light emitting control module, the light emitting control module is connected to the light emitting control signal and connected in series to the light emitting loop, and the light emitting control module is used for controlling the light emitting loop to be turned on or turned off based on the light emitting control signal.
In the light emitting device driving circuit, the light emitting control module includes a light emitting control transistor, a gate of the light emitting control transistor is connected to the light emitting control signal, a source of the light emitting control transistor is connected to the first power signal, and a drain of the light emitting control transistor is electrically connected to the source of the driving transistor.
In the light emitting device driving circuit of the present application, the light emitting device driving circuit further includes a reset module, the reset module is connected to a reset signal and the second scan signal, the reset module is electrically connected to the third node, and the reset module is configured to reset the potential of the third node under the control of the second scan signal.
In the light emitting device driving circuit of the present application, the reset module includes a reset transistor, a gate of the reset transistor is connected to the second scan signal, a source of the reset transistor is connected to the reset signal, and a drain of the reset transistor is electrically connected to the third node.
In the light emitting device driving circuit of the present application, the data signal writing module includes a data signal writing transistor, a gate of the data signal writing transistor is connected to the first scan signal, a source of the data signal writing transistor is connected to the data signal, and a drain of the data signal writing transistor is electrically connected to the third node.
In the light emitting device driving circuit of the present application, the compensation module includes a compensation transistor, a gate of the compensation transistor is connected to the second scan signal, a source of the compensation transistor is electrically connected to the first node, and a drain of the compensation transistor is electrically connected to the source of the driving transistor.
In the light emitting device driving circuit described herein, the potential of the first power supply signal is larger than the potential of the second power supply signal.
The embodiment of the present application further provides a backlight module, including:
a data line for providing a data signal;
a light emission control signal line for providing a light emission control signal;
the first scanning line is used for providing a first scanning signal;
a second scan line for providing a second scan signal; and
the light emitting device driving circuit as described above, which is connected to the data line, the light emission control signal line, the first scan line, and the second scan line.
The embodiment of the application further provides a display panel, which comprises a plurality of pixel units arranged in an array, wherein each pixel unit is provided with the light-emitting device driving circuit.
The light emitting device driving circuit, the backlight module and the display panel provided by the embodiment of the application comprise a light emitting device, a driving transistor, a data signal writing module and a compensation module. The threshold voltage of the driving transistor can be compensated through the compensation module. In addition, the light-emitting device driving circuit provided by the application only comprises two scanning signals, so that the problems that the existing light-emitting driving circuit has more scanning signals and complicated time sequence when compensating the threshold voltage can be solved, and the uniformity and the stability of the brightness and the color displayed by the display panel can be improved.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The transistors used in all embodiments of the present application may be thin film transistors or field effect transistors or other devices with the same characteristics, and since the source and drain of the transistors used herein are symmetrical, the source and drain may be interchanged. In the embodiment of the present application, to distinguish two poles of a transistor except for a gate, one of the two poles is referred to as a source, and the other pole is referred to as a drain. The form in the drawing provides that the middle end of the switching transistor is a grid, the signal input end is a source, and the output end is a drain. In addition, the transistors used in the embodiments of the present application are N-type transistors, wherein the N-type transistors are turned on when the gates are at a high level and turned off when the gates are at a low level.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a first implementation manner of a light emitting device driving circuit provided in an embodiment of the present application. As shown in fig. 1, the light emitting device driving circuit 10 according to the embodiment of the present application includes a light emitting device D, a driving transistor T1, a data signal writing block 101, a compensation block 102, a first storage capacitor C1, and a second storage capacitor C2. It should be noted that the light emitting device D may be a mini light emitting diode, a micro light emitting diode or an organic light emitting diode.
The light emitting device D is connected in series to a light emitting loop formed by the first power signal VLED and the second power signal VSS. The source of the driving transistor T1 and the drain of the driving transistor T1 are connected in series to the light emitting circuit. The gate of the driving transistor T1 is electrically connected to the first node Nst. The drain of the driving transistor T1 is electrically connected to the second node S. The DATA signal writing module 101 receives the DATA signal DATA and the first scan signal Gn. The data signal writing module 101 is electrically connected to the third node S. The compensation module 102 accesses the second scan signal Gn-1. The first compensation module 102 is electrically connected to the source of the driving transistor T1 and the first node Nst. One end of the first storage capacitor C1 is electrically connected to the first node Nst, and the other end of the first storage capacitor C1 is electrically connected to the second node S. One end of the second storage capacitor C2 is electrically connected to the first node Nst, and the other end of the second storage capacitor C2 is electrically connected to the third node Q.
It should be noted that, in the embodiment of the present application, it is only necessary to ensure that the light emitting device D is connected in series to the light emitting loop, and the light emitting device driving circuit 10 shown in fig. 1 only illustrates one specific position of the light emitting device D. That is, the light emitting device D may be connected in series at any position on the light emitting loop.
Specifically, the driving transistor T1 is used to control the current flowing through the light emitting loop. The DATA signal writing module 101 is used for transmitting the DATA signal DATA to the third node Q under the control of the first scan signal Gn. The compensation module 102 is used for compensating the threshold voltage Vth _ T1 of the driving transistor T1 under the control of the second scan signal Gn-1.
The light emitting device driving circuit 10 provided by the embodiment of the application can perform internal compensation on the threshold voltage Vth _ T1 of the driving transistor T1 through the compensation module 102, thereby avoiding the threshold voltage Vth _ T1 of the driving transistor T1 from influencing the brightness of the light emitting device D, and the light emitting device driving circuit provided by the application only comprises two scanning signals, thereby solving the problems of more scanning signals and complex time sequence of the circuit of the existing light emitting driving circuit for compensating the threshold voltage, and further being beneficial to improving the brightness displayed by the display panel, the uniformity and the stability of colors.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a light emitting device driving circuit according to a second embodiment of the present disclosure. As shown in fig. 2, the light emitting device driving circuit 10 provided in the embodiment of the present application further includes a light emitting control module 103 and a reset module 104. The light emission control module 103 receives a light emission control signal En. The light emission control module 103 is connected in series to the light emission circuit. The reset module 104 receives the second scan signal Gn-1 and the reset signal Vref. The reset module 104 is electrically connected to the first node S.
Specifically, the light emitting control module 103 is configured to control the light emitting loop to be turned on or off based on the light emitting control signal En. The reset module 104 is used for resetting the potential of the third node S under the control of the second scan signal Gn-1.
Referring to fig. 3, fig. 3 is a circuit diagram illustrating a light emitting device driving circuit according to a second embodiment of the present disclosure. Referring to fig. 2 and 3, the data signal writing module 101 includes a data signal writing transistor T2, a gate of the data signal writing transistor T2 is connected to the first scanning signal Gn, a source of the data signal writing transistor is connected to the data signal Vdata, and a drain of the data signal writing transistor is electrically connected to the third node S. The compensation module 102 includes a compensation transistor T4, a gate of the compensation transistor T4 is connected to the second scan signal Gn-1, a source of the compensation transistor T4 is electrically connected to the first node Nst, and a drain of the compensation transistor T4 is electrically connected to the source of the driving transistor T1. The light emitting control module 103 includes a light emitting control transistor T3, a gate of the light emitting control transistor T3 is connected to the light emitting control signal En, a source of the light emitting control transistor T3 is connected to the first power signal VDD, and a drain of the light emitting control transistor T3 is electrically connected to a source of the driving transistor T1. The reset module 104 includes a reset transistor T5, a gate of the reset transistor T5 is connected to the second scan signal Gn-1, a source of the reset transistor T5 is connected to the reset signal Vref, and a drain of the reset transistor T5 is electrically connected to the third node Q.
It should be noted that the first power signal VDD and the second power signal VSS are both used for outputting a predetermined voltage value. In addition, in the embodiment of the present application, the potential of the first power signal VDD is greater than the potential of the second power signal VSS. Specifically, the potential of the second power signal VSS may be the potential of the ground terminal. Of course, it is understood that the potential of the second power signal VSS may be other.
It should be noted that the driving transistor T1, the data signal writing transistor T2, the light emission controlling transistor T3, the compensating transistor T4, and the reset transistor T5 may be one or more of a low temperature polysilicon thin film transistor, an oxide semiconductor thin film transistor, or an amorphous silicon thin film transistor. Further, the transistors in the light emitting device driving circuit 10 provided in the embodiment of the present application may be set to be the same type of transistors, so as to avoid the influence on the light emitting device driving circuit 10 caused by the difference between different types of transistors.
Referring to fig. 4, fig. 4 is a timing diagram of a light emitting device driving circuit according to an embodiment of the present disclosure. The combination of the emission control signal En, the data signal Vdata, the first scanning signal Gn and the second scanning signal Gn-1 sequentially corresponds to the reset stage t1, the detection stage t2, the write stage t3 and the emission stage t 4; that is, in one frame time, the driving control timing of the light emitting device driving circuit 10 according to the embodiment of the present disclosure includes a reset phase t1, a detection phase t2, a write phase t3, and a light emitting phase t 4.
Note that the light-emitting device D emits light at the light-emission period t 4.
Specifically, in the reset period t1, the first scan signal Gn is at a low potential, the second scan signal Gn-1 is at a high potential, the data signal Vdata is at a low potential, and the emission control signal En is at a high potential.
Specifically, in the detection period t2, the first scan signal Gn is at a low voltage level, the second scan signal Gn-1 is at a high voltage level, the data signal Vdata is at a low voltage level, and the emission control signal En is at a low voltage level.
Specifically, in the write period t3, the first scan signal Gn is at a high potential, the second scan signal Gn-1 is at a low potential, the data signal Vdata is at a high potential, and the emission control signal En is at a low potential.
Specifically, in the light emitting period t4, the first scan signal Gn is at a low potential, the second scan signal Gn-1 is at a low potential, the data signal Vdata is at a low potential, and the light emission control signal En is at a high potential.
Specifically, the first power signal VLED and the second power signal VSS are both dc voltage sources.
Specifically, referring to fig. 4 and 5, fig. 5 is a schematic diagram of a path of a light emitting device driving circuit in a reset stage at the driving timing shown in fig. 4 according to an embodiment of the present application.
In the reset period T1, the second scan signal Gn-1 is high, and the compensation transistor T4 and the reset transistor T5 are turned on under the control of the high potential of the second scan signal Gn-1, so that the potential of the third node Q is reset to the potential of the reset signal Vref. In addition, the light emission control signal En is at a high potential, the light emission control transistor T3 is turned on under the high potential control of the light emission control signal En, and the compensation transistor T4 is also in an on state at this time, so that the potential of the first node Nst is reset to the potential of the first power supply signal VDD.
Meanwhile, in the reset period T1, the first scan signal Gn is at a low potential, so that the data signal write transistor T2 is turned off. The gate voltage and the source voltage of the driving transistor T1 are both the potential of the first power signal VDD, and the driving transistor T1 is turned off.
Specifically, referring to fig. 4 and fig. 6, fig. 6 is a schematic path diagram of a detection stage of the light emitting device driving circuit provided in the embodiment of the present application at the driving timing shown in fig. 4.
In the detecting period T2, the second scan signal Gn-1 is at a high level, the compensating transistor T4 and the reset transistor T5 are turned on under the control of the high level of the second scan signal Gn-1, and the third node Q maintains the level of the reset signal Vref. In addition, since the emission control signal En is at a low potential, the emission control transistor T3 is turned off under the low potential control of the emission control signal En, and the potential of the first node Nst cannot maintain the potential of the first power signal VDD. Due to the existence of the first storage capacitor C1, the potential of the second node S is discharged to VSS + Vth _ oled, and the potential of the first node Nst is discharged to VSS + Vth _ oled + Vth _ T1. Where Vth _ oled is a threshold voltage of the light emitting device D, Vth _ T1 is a threshold voltage of the driving transistor T1, and VSS is a voltage of the second power signal VSS.
Meanwhile, during the detecting period T2, the first scan signal Gn is low, such that the data signal writing transistor T2 is turned off. The gate voltage of the driving transistor T1 is VSS + Vth _ oled + Vth _ T1, and the driving transistor T1 is turned off.
Specifically, referring to fig. 4 and 7, fig. 7 is a schematic path diagram of a writing stage of the light emitting device driving circuit provided in the embodiment of the present application at the driving timing shown in fig. 4.
In the writing period T3, the first scan signal Gn is at a high level, the data signal writing transistor T2 is turned on under the control of the high level of the first scan signal Gn, the voltage of the third node Q is changed from Vref to Vdata, and the voltage change Δ V _ S of the third node Q is Vdata-Vref. Due to the existence of the first storage capacitor C1 and the second storage capacitor C2, the voltage of the first node Nst is changed to VSS + Vth _ oled + Vth _ T1+ C2/(C1+ C2) × Δ V _ S. Since the second node S is electrically connected to the anode terminal of the light emitting device, the voltage of the second node S still maintains VSS + Vth _ oled. Wherein, Vdata is the voltage of the data signal Vdata. Vref is the voltage of the reset signal Vref. C1 is the capacitance of the first storage capacitor C1. C2 is the capacitance of the second storage capacitor C2.
Meanwhile, in the write phase T3, the second scan signal Gn-1 is low, so that the compensation transistor T4 and the reset transistor T5 are turned off. The emission control signal En is at a low potential, so that the emission control transistor T3 is turned off. The gate voltage of the driving transistor T1 is VSS + Vth _ oled + Vth _ T1+ C2/(C1+ C2) × Δ V _ S, and the driving transistor T1 is turned on.
Specifically, referring to fig. 4 and 8, fig. 8 is a schematic path diagram of a light emitting stage of a light emitting device driving circuit provided in the embodiment of the present application at the driving timing shown in fig. 4.
In the light emitting period T4, the light emitting control signal En is at a high level, the light emitting control transistor T3 is turned on under the control of the high level of the light emitting control signal En, the gate voltage of the driving transistor T1 is VSS + Vth _ oled + Vth _ T1+ C2/(C1+ C2) × Δ V _ S, the driving transistor T1 is turned on, and a current flows into the light emitting device D to cause the light emitting device D to emit light.
At this time, the calculation formula of the gate-to-drain voltage difference T1_ Vgs of the driving transistor T1 is as follows:
T1_Vgs=V_Nst-V_S=C2/(C1+C2)*(Vdata-Vref)+Vth_T1
where V _ Nst is a voltage of the first node Nst of the light emitting period t 4. V _ S is the voltage of the second node S in the light emitting period t 4. Vdata is a voltage of the data signal Vdata. Vref is the voltage of the reset signal Vref. C1 is the capacitance of the first storage capacitor C1. C2 is the capacitance of the second storage capacitor C2. Vth _ T1 is the threshold voltage of the driving transistor T1.
As can be seen from the above, I flows through the light emitting device DoledThe calculation formula of (a) is as follows:
Ioled=k*[C2/(C1+C2)*(Vdata-Vref)+Vth_T1-Vth_T1]2=k*[C2/(C1+C2)*(Vd
ata-Vref)]2
where k is the mobility of the light emission driving circuit. By flowing through I of the light-emitting device DoledOf the calculation formula, I flowing through the light emitting device DoledThe threshold voltage Vth _ T1 of the driving transistor T1 is not related to the voltage, so that the threshold voltage Vth _ T1 of the driving transistor T1 is prevented from affecting the brightness of the light emitting device D, and the accuracy and uniformity of the display panel are improved.
Referring to fig. 9, fig. 9 is a schematic structural diagram of a backlight module according to an embodiment of the present disclosure. The embodiment of the present application further provides a backlight module 100, which includes a data line 20, a light-emitting control signal line 30, a first scan line 40, a second scan line 50, and the light-emitting device driving circuit 10. The data line 20 is used for providing a data signal. The light emission control signal line 30 is used to provide a light emission control signal. The first scan line 40 is used for providing a first scan signal. The second scan line 50 is used for providing a second scan signal. The light emitting device driving circuit 10 is connected to the data line 20, the light emission control signal line 30, the first scan line 40, and the second scan line 50. The light emitting device driving circuit 10 may refer to the description of the light emitting device driving circuit, and is not described herein again.
Referring to fig. 10, fig. 10 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure. The embodiment of the present application further provides a display panel 200, which includes a plurality of pixel units 2000 arranged in an array, where each pixel unit 2000 includes the light emitting device driving circuit 10, and specific reference may be made to the description of the light emitting device driving circuit 10 above, which is not repeated herein.
The foregoing describes in detail a light emitting device driving circuit, a backlight module and a display panel provided in an embodiment of the present application, and a specific example is applied in the present application to explain the principle and the implementation manner of the present application, and the description of the foregoing embodiment is only used to help understanding the method and the core concept of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.