CN113571009A - Light emitting device driving circuit, backlight module and display panel - Google Patents
Light emitting device driving circuit, backlight module and display panel Download PDFInfo
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- CN113571009A CN113571009A CN202110831264.1A CN202110831264A CN113571009A CN 113571009 A CN113571009 A CN 113571009A CN 202110831264 A CN202110831264 A CN 202110831264A CN 113571009 A CN113571009 A CN 113571009A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
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Abstract
The application discloses luminescent device drive circuit, backlight unit and display panel. The light emitting device driving circuit comprises a light emitting device, a driving transistor, a data signal writing module, a first initialization module, a second initialization module, a compensation module and a bootstrap module. By arranging the first initialization module, the second initialization module, the compensation module and the bootstrap module, the current flowing through the light-emitting device is irrelevant to the threshold voltage of the driving transistor, the first power supply signal and the second power supply signal, the compensation of the threshold voltage and the voltage drop is realized, and the brightness attenuation of the light-emitting device caused by the threshold voltage offset of the driving transistor and the voltage drop in the driving circuit is avoided.
Description
Technical Field
The application relates to the field of display technology, in particular to a light-emitting device driving circuit, a backlight module and a display panel.
Background
Light emitting devices such as mini light emitting diodes, micro light emitting diodes and organic light emitting diodes have the advantages of high brightness, high contrast, high color gamut and the like, and are widely applied to the field of high-performance display at present. In the conventional light emitting device driving circuit, each light emitting device is generally formed by two transistors (a driving transistor and a switching transistor) and a capacitor, which is commonly referred to as a 2T1C circuit. However, the driving transistor is liable to shift in threshold voltage under long-term current stress, and there is a problem of voltage drop (IR-drop) in the driving circuit, so that the luminance of the light emitting device is deteriorated, resulting in display unevenness.
Disclosure of Invention
The application provides a light-emitting device drive circuit, a backlight module and a display panel, which can solve the problem of brightness attenuation of the light-emitting device caused by threshold voltage offset of a drive transistor and voltage drop in the drive circuit.
The application provides a light emitting device drive circuit, it includes:
the light-emitting device is connected in series with a light-emitting loop formed by a first power signal and a second power signal;
the source electrode and the drain electrode of the driving transistor are connected in series with the light-emitting loop;
the data signal writing module is accessed to a first scanning signal and a data signal and is electrically connected to the grid electrode of the driving transistor, and the data signal writing module is used for writing the data signal into the grid electrode of the driving transistor under the control of the first scanning signal;
the first initialization module is connected to a second scanning signal and the first power supply signal and is electrically connected to the grid of the driving transistor, and the first initialization module is used for initializing the potential of the grid of the driving transistor under the control of the second scanning signal;
a second initialization module, connected to a third scan signal and the second power signal, and electrically connected to one of the source and the drain of the driving transistor, the second initialization module being configured to initialize a potential of the one of the source and the drain of the driving transistor under the control of the third scan signal;
the compensation module is connected to a fourth scanning signal and is electrically connected to the other of the source electrode and the drain electrode of the driving transistor and the grid electrode of the driving transistor, and the compensation module is used for compensating the threshold voltage of the driving transistor under the control of the fourth scanning signal;
the bootstrap module is connected to the fifth scan signal and is electrically connected to one of the source and the drain of the driving transistor and the gate of the driving transistor, and the bootstrap module is configured to pull up a potential of the gate of the driving transistor.
Optionally, in some embodiments of the present application, the light emitting device driving circuit further includes a light emitting control module, where the light emitting control module is connected to the light emitting control signal and is connected in series to the light emitting loop, and the light emitting control module is configured to control the light emitting loop to be turned on or turned off based on the light emitting control signal.
Optionally, in some embodiments of the present application, the data signal writing module includes a first transistor and a first capacitor;
the gate of the first transistor is connected to the first scanning signal, one of the source and the drain of the first transistor is connected to the data signal, the other of the source and the drain of the first transistor is electrically connected to one end of the first capacitor, and the other end of the first capacitor is electrically connected to the gate of the driving transistor.
Optionally, in some embodiments of the present application, the first initialization module includes a second transistor, a gate of the second transistor is connected to the second scan signal, one of a source and a drain of the second transistor is electrically connected to the gate of the driving transistor, and the other of the source and the drain of the second transistor is connected to the first power signal.
Optionally, in some embodiments of the present application, the second initialization module includes a third transistor, a gate of the third transistor is connected to the third scan signal, one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the driving transistor, and the other of the source and the drain of the third transistor is connected to the second power signal.
Optionally, in some embodiments of the present application, the compensation module includes a fourth transistor;
the gate of the fourth transistor is connected to the fourth scan signal, one of the source and the drain of the fourth transistor is electrically connected to the gate of the driving transistor, and the other of the source and the drain of the fourth transistor is electrically connected to the other of the source and the drain of the driving transistor.
Optionally, in some embodiments of the present application, the bootstrap module includes a fifth transistor and a second capacitor;
the gate of the fifth transistor is connected to the fifth scan signal, one of the source and the drain of the fifth transistor is electrically connected to one of the source and the drain of the driving transistor, the other of the source and the drain of the fifth transistor is electrically connected to one end of the second capacitor, and the other end of the second capacitor is electrically connected to the gate of the driving transistor.
Optionally, in some embodiments of the present application, the driving control timing of the light emitting device driving circuit includes a reset phase, a compensation phase, a data writing phase, and a light emitting phase;
in the reset phase, the first scan signal, the second scan signal, and the third scan signal are all at a high potential, and the fourth scan signal, the fifth scan signal, and the emission control signal are all at a low potential;
in the compensation phase, the first scanning signal, the third scanning signal and the fourth scanning signal are all at a high potential, and the second scanning signal, the fifth scanning signal and the light-emitting control signal are all at a low potential;
in the data writing stage, the first scanning signal and the third scanning signal are both high potential, and the second scanning signal, the fourth scanning signal, the fifth scanning signal and the light-emitting control signal are all low potential;
in the light emitting stage, the fifth scan signal and the light emitting control signal are at a high potential, and the first scan signal, the second scan signal, the third scan signal and the fourth scan signal are all at a low potential.
Optionally, in some embodiments of the present application, a potential of the first power signal is greater than a potential of the second power signal.
Correspondingly, this application still provides a backlight unit, and it includes:
a data line for providing a data signal;
the first scanning line is used for providing a first scanning signal;
a second scan line for providing a second scan signal;
a third scan line for providing a third scan signal;
a fourth scan line for providing a fourth scan signal;
a fifth scan line for providing a fifth scan signal;
a light emission control signal line for providing a light emission control signal; and
the light emitting device driving circuit according to any one of the above claims, wherein the light emitting device driving circuit is connected to the data line, the first scan line, the second scan line, the third scan line, the fourth scan line, the fifth scan line, and the light emission control signal line.
Correspondingly, the application also provides a display panel, the display panel comprises a plurality of pixel units arranged in an array, and each pixel unit comprises the light-emitting device driving circuit.
The application provides a light emitting device drive circuit, backlight unit and display panel, through first initialization module, second initialization module, compensation module and bootstrap module for the electric current that flows through light emitting device is all irrelevant with drive transistor's threshold voltage, first power signal and second power signal, offset threshold voltage and voltage drop have been compensated, guarantee that the electric current that flows through light emitting device is unchangeable, thereby there is the light emitting device luminance decay that the voltage drop leads to in avoiding drive transistor threshold voltage skew and the drive circuit.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a light emitting device driving circuit provided in the present application;
fig. 2 is a circuit schematic diagram of a light emitting device driving circuit provided in the present application;
fig. 3 is a timing diagram of a light emitting device driving circuit provided in the present application;
fig. 4 is a schematic diagram of a path of a reset phase of the light emitting device driving circuit provided in the present application at the driving timing shown in fig. 3;
fig. 5 is a schematic path diagram of a compensation stage of the light emitting device driving circuit provided in the present application under the driving timing shown in fig. 3;
fig. 6 is a schematic diagram of a data writing phase of the light emitting device driving circuit provided in the present application at the driving timing shown in fig. 3;
fig. 7 is a schematic diagram of a light emitting stage of the light emitting device driving circuit provided in the present application at the driving timing shown in fig. 3.
Fig. 8 is a schematic structural diagram of a backlight module provided in the present application;
fig. 9 is a schematic structural diagram of a display panel provided in the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application. Furthermore, it should be understood that the detailed description and specific examples, while indicating exemplary embodiments of the invention, are given by way of illustration and explanation only, and are not intended to limit the scope of the invention. In the present application, unless otherwise specified, the use of directional terms such as "upper", "lower", "left" and "right" generally refer to upper, lower, left and right in the actual use or operation of the device, and specifically to the orientation of the drawing figures.
The present application provides a light emitting device driving circuit, a backlight module and a display panel, which are described in detail below. It should be noted that the following description of the embodiments is not intended to limit the preferred order of the embodiments of the present application.
In the transistor of the present invention, the source and the drain are symmetric, and therefore the source and the drain are interchangeable.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a light emitting device driving circuit provided in the present application. The present application provides a light emitting device driving circuit 100, which includes a light emitting device D, a driving transistor TD, a data signal writing module 101, a first initialization module 102, a second power signal writing module 103, a compensation module 104, and a bootstrap module 105.
The light emitting device D is connected in series to a light emitting loop formed by a first power signal VDD and a second power signal VSS. The source and drain of the driving transistor TD are connected in series to the light emitting circuit.
The data signal writing module 101 receives the first scan signal S1 and the data signal DA, and is electrically connected to the gate of the driving transistor TD. The data signal writing module 101 is configured to write a data signal DA into the gate of the driving transistor TD under the control of the first scan signal S1.
The first initialization module 102 receives the second scan signal S2 and the first power signal VDD and is electrically connected to the gate of the driving transistor TD. The first initializing module 102 is configured to initialize a potential of the gate of the driving transistor TD under the control of the second scan signal S2.
The second initialization module 103 receives the third scan signal S3 and the second power signal VSS and is electrically connected to one of the source and the drain of the driving transistor TD. The second power signal VSS writing module 103 is configured to initialize a potential of one of a source and a drain of the driving transistor TD under the control of the third scan signal S3.
The compensation module 104 is connected to the fourth scan signal and is electrically connected to the gate of the driving transistor TD and the other of the source and the drain of the driving transistor TD, and the compensation module 104 is configured to compensate the threshold voltage of the driving transistor TD under the control of the fourth scan signal S4;
the bootstrap module 105 is connected to the fifth scan signal S5, and is electrically connected to one of the source and the drain of the driving transistor TD and the gate of the driving transistor TD. The bootstrap module 105 is used to pull up the potential of the gate of the driving transistor TD.
Further, the light emitting device driving circuit 100 provided by the present application further includes a light emitting control module 106. The light emission control module 106 is connected to the light emission control signal EM and is connected in series to the light emission circuit. The light emission control module 106 is configured to control the light emission circuit to be turned on or off based on the light emission control signal EM.
It should be noted that, in the present application, it is only necessary to ensure that the light-emitting control module 106 and the light-emitting device D are connected in series to the light-emitting loop, and the light-emitting device driving circuit 100 shown in fig. 1 only illustrates a specific position of the light-emitting control module 106 and the light-emitting device D. That is, the light emitting control module 106 and the light emitting device D may be connected in series at any position on the light emitting circuit.
In the light emitting device driving circuit 100 provided in the present application, the first initialization module 102, the second initialization module 103, the compensation module 104 and the bootstrap module are arranged, so that the current flowing through the light emitting device D is independent of the threshold voltage of the driving transistor DT, the first power signal VDD and the second power signal VSS. Therefore, threshold voltage deviation and voltage drop of the first power supply signal VDD and the second power supply signal VSS are compensated, current flowing through the light-emitting device D is guaranteed to be unchanged, and brightness attenuation of the light-emitting device D caused by threshold voltage deviation of the driving transistor DT and voltage drop in a driving circuit is avoided.
In some embodiments, referring to fig. 2, fig. 2 is a circuit schematic diagram of a light emitting device driving circuit provided in the present application. As shown in fig. 1 and 2, the data signal writing module 101 includes a first transistor T1 and a first capacitor C1.
The gate of the first transistor T1 is switched on the first scan signal S1. One of the source and the drain of the first transistor T1 switches in the data signal DA. The other of the source and the drain of the first transistor T1 is electrically connected to one end of the first capacitor C1. The other end of the first capacitor C1 is electrically connected to the gate of the driving transistor TD. Of course, it is understood that the data signal writing module 101 may also be formed by connecting a plurality of transistors and a capacitor in series.
In some embodiments, the first initialization module 102 includes a second transistor T2. The gate of the second transistor T2 is turned on by the second scan signal S2. One of the source and the drain of the second transistor T2 is electrically connected to the gate of the driving transistor TD. The other of the source and the drain of the second transistor T2 is connected to the first power supply signal VDD. Of course, it is understood that the first initialization module 102 may also be formed by connecting a plurality of transistors in series.
In some embodiments, the second initialization module 103 includes a third transistor T3. The gate of the third transistor T3 is turned on the third scan signal S3. One of the source and the drain of the third transistor T3 is electrically connected to one of the source and the drain of the driving transistor TD. The other of the source and the drain of the third transistor T3 is switched in the first power signal VDD. Of course, it is understood that the second initialization module 103 may also be formed by connecting a plurality of transistors in series.
In some embodiments, the compensation module 104 includes a fourth transistor T4. The gate of the fourth transistor T4 is turned on the fourth scan signal S4. One of the source and the drain of the fourth transistor T4 is electrically connected to the gate of the driving transistor TD. The other of the source and the drain of the fourth transistor T4 is electrically connected to the other of the source and the drain of the driving transistor TD. Of course, it is understood that the compensation module 104 may also be formed using a plurality of transistors connected in series.
In some embodiments, the bootstrap module 105 includes a fifth transistor T5 and a second capacitor C2. The gate of the fifth transistor T5 is turned on the fifth scan signal S5. One of the source and the drain of the fifth transistor T5 is electrically connected to one of the source and the drain of the driving transistor TD. The other of the source and the drain of the fifth transistor T5 is electrically connected to one end of the second capacitor C2. The other end of the second capacitor C2 is electrically connected to the gate of the driving transistor TD. Of course, it is understood that the bootstrap module 105 can also be formed by connecting a plurality of transistors and a capacitor in series.
In some embodiments, the light emitting control module 106 includes a sixth transistor T6. The gate of the sixth transistor T6 is connected to the emission control signal EM. One of the source and the drain of the sixth transistor T6 is electrically connected to one of the source and the drain of the driving transistor TD. The other of the source and the drain of the sixth transistor T6 is electrically connected to one end of the second capacitor C2.
Of course, it is understood that, in the light emitting device driving circuit 100 provided in the present application, the light emission control module 106 may be provided in one, two or more. Each light emitting control module 106 is connected in series to the light emitting loop. The plurality of light emission control modules 106 may be connected to the same light emission control signal EM or different light emission control signals EM. Further, it is understood that the light emission control module 106 may also be formed using a plurality of transistors connected in series.
The light-emitting device driving circuit 100 provided by the application adopts the light-emitting device driving circuit with the 7T2C (7 transistors and 2 capacitors) structure to control the light-emitting device D, uses fewer components, has a simple and stable structure, and saves the cost.
In some embodiments, the first power signal VDD and the second power signal VSS are both used for outputting a predetermined voltage value. In addition, in the embodiment of the present application, the potential of the first power signal VDD is greater than the potential of the second power signal VSS. Specifically, the potential of the second power signal VSS may be the potential of the ground terminal. Of course, it is understood that the potential of the second power signal VSS may be other.
In some embodiments, the driving transistor TD, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 may be one or more of a low temperature polysilicon thin film transistor, an oxide semiconductor thin film transistor, or an amorphous silicon thin film transistor. In addition, the transistors in the light emitting device driving circuit 100 provided in the present application may also be P-type transistors or N-type transistors. Further, the transistors in the light emitting device driving circuit 100 provided by the present application may be set to be the same type of transistors, so as to avoid the influence of the difference between different types of transistors on the light emitting device driving circuit 100.
Referring to fig. 3, fig. 3 is a timing diagram of a driving circuit of a light emitting device according to the present application. The emission control signal EM, the first scan signal S1, the second scan signal S2, the third scan signal S3, the fourth scan signal S4, and the fifth scan signal S5 are combined to correspond to the reset phase t1, the compensation phase t2, the data write phase t3, and the emission phase t4 in sequence. That is, the driving control timing of the light emitting device driving circuit 100 provided in the present application includes a reset phase t1, a compensation phase t2, a data write phase t3, and a light emitting phase t4 during one frame time.
In some embodiments, during the reset phase t1, the first scan signal S1, the second scan signal S2 and the third scan signal S3 are all high. The fourth scan signal S4, the fifth scan signal S5, and the emission control signal EM are all low. At this time, the potential of the data signal DA is low.
In some embodiments, during the compensation phase t2, the first scan signal S1, the third scan signal S3 and the fourth scan signal S4 are all high. The second scan signal S2, the fifth scan signal S5, and the emission control signal EM are all low. At this time, the potential of the data signal DA is low.
In some embodiments, during the data writing phase t3, the first scan signal S1 and the third scan signal S3 are both high. The second scan signal S2, the fourth scan signal S4, the fifth scan signal S5, and the emission control signal EM are all low. At this time, the potential of the data signal DA is high.
In some embodiments, during the light emitting period t4, the fifth scan signal S5 and the light emitting control signal EM are high, and the first scan signal S1, the second scan signal S2, the third scan signal S3 and the fourth scan signal S4 are all low. At this time, the potential of the data signal DA is low.
Specifically, referring to fig. 3 and 4, fig. 4 is a schematic diagram of a path of a reset stage of the light emitting device driving circuit provided by the present application at the driving timing shown in fig. 3. In the reset phase T1, the second scan signal S2 is high, so that the second transistor T2 is turned on. The potential of the first power supply signal VDD is written to the gate electrode of the driving transistor TD through the fifth transistor T5 to initialize the gate electrode of the driving transistor TD. The third scan signal S3 is high, so that the third transistor T3 is turned on. The potential of the second power supply signal VSS is written to one of the source and the drain of the driving transistor TD through the third transistor T3 to enable initialization of one of the source and the drain of the driving transistor TD. The first scan signal S1 is high, so that the first transistor T1 is turned on. The first transistor T1 and the capacitor C1 form a path, and the capacitor C1 is used to stabilize the potential of the gate of the driving transistor TD. At this time, the data signal DA is at a low potential.
Meanwhile, in the reset period T1, the fourth transistor T4, the fifth transistor T5 and the sixth transistor T6 are turned off because the fourth scan signal S4, the fifth scan signal S5 and the emission control signal EM are all low.
Referring to fig. 3 and 5, fig. 5 is a schematic path diagram of a compensation stage of the light emitting device driving circuit provided in the present application at the driving timing shown in fig. 3. In the compensation phase T2, the third scan signal S3 and the fourth scan signal S4 are both high, so that the fourth transistor T4 and the third transistor T3 are turned on. Due to VGVDD (where G represents the gate of the driving transistor TD), the driving transistor TD is turned on. Then, the fourth transistor T4 connects one of the source and the drain of the driving transistor TD and the gate of the driving transistor TD. One of the source and the drain of the driving transistor TD and the gate of the driving transistor TD form a diode structure. The gate voltage Vgs of the driving transistor TD decreases gradually as the voltage of the first power signal VDD decreases. When driving the transistor TDWhen the gate-source voltage Vgs is lowered to the threshold voltage Vth of the driving transistor TD, the driving transistor TD is turned off. At this time, VG=VSS+Vth,VSVSS. (wherein S represents one of the source and drain of the driving transistor TD). Also, the first scan signal S1 is high, so that the first transistor T1 is turned on. The potential of the gate electrode of the driving transistor TD is maintained at the sum of the second power signal VSS and the threshold voltage of the driving transistor TD due to the presence of the storage capacitor C1.
Meanwhile, in the compensation period T2, the second scan signal S2, the fifth scan signal S5 and the emission control signal EM are all low, such that the second transistor T2, the fifth transistor T5 and the sixth transistor T6 are turned off.
Referring to fig. 3 and fig. 6, fig. 6 is a schematic diagram of a data writing phase of a light emitting device driving circuit according to an embodiment of the present application at the driving timing shown in fig. 3. In the data writing phase t3, the first scan signal S1 is at a high level, so that the driving transistor TD is turned on. At this time, the data signal DA changes from a low potential to a high potential. The potential of the gate of the driving transistor TD becomes VGVSS + Vth + DATA _ H-DATA _ L (where DATA _ H represents a high level of the DATA signal DA and DATA _ L represents a low level of the DATA signal DA). At this time, the driving transistor TD is turned on. The third scan signal S3 is high, so that the third transistor T3 is turned on, VS=VSS。
Meanwhile, since the second scan signal S2, the fourth scan signal S4, the fifth scan signal S5, and the emission control signal EM are all low, the second transistor T2, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are all turned off.
Referring to fig. 3 and 7, fig. 7 is a schematic diagram of a path of a light emitting stage of a light emitting device driving circuit according to an embodiment of the present application at the driving timing shown in fig. 3. In the light emitting period T4, the fifth scan signal S5 and the light emission control signal EM are high potential, so that the fifth transistor T5 and the sixth transistor T6 are turned on. At this time, the potential of the data signal DA is high. Since the fifth transistor T5 is turned on, the fifth transistor T5 and the second capacitor C2 form a path such that the S-point potential is opposite to the G-point potentialHas the function of promoting. The potential of the gate of the driving transistor TD becomes VG=VSS+Vth+DATA_H-DATA_L+V_LED,VSFrom VSS to VSS + V _ LED (where V _ LED represents the LED turn-on voltage).
Further, the formula for calculating the current flowing through the light emitting device D is:
IOLED=1/2Cox(μ1W1/L1)(Vgs-Vth)2in which IOLEDTo the current flowing through the light emitting device D, μ 1 is the carrier mobility of the driving transistor TD, W1 and L1 are the width and length of the channel of the driving transistor TD, Vgs is the voltage difference between the gate and one of the source and drain of the driving transistor TD, and Vth is the threshold voltage of the driving transistor TD, respectively.
That is, the current flowing through the light emitting device D: i isOLED=1/2Cox(μ1W1/L1)(Vgs-Vth)2=1/2Cox(μ1W1/L1)(DATA_H-DATA_L)2。
It can be seen that the current flowing through the light emitting device D is independent of the threshold voltage Vth of the driving transistor DT, the first power signal VDD, and the second power signal VSS, so as to compensate for the threshold voltage and the voltage drop, and to avoid the luminance degradation of the light emitting device D caused by the threshold voltage shift of the driving transistor DT and the voltage drop in the driving circuit.
Meanwhile, the first scan signal S1, the second scan signal S2, the third scan signal S3, and the fourth scan signal S4 are all low, so that the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are turned off.
Referring to fig. 8, fig. 8 is a schematic structural diagram of a backlight module according to an embodiment of the present disclosure. The embodiment of the present application further provides a backlight module 200, which includes a first scan line 10, a second scan line 20, a third scan line 30, a fourth scan line 40, a fifth scan line 50, a light-emitting control signal line 60, a data line 70, and the light-emitting device driving circuit 100 according to any of the above embodiments. The first scan line 10 is used for providing a first scan signal. The second scan line 20 is used for providing a second scan signal. The third scan line 30 is used to provide a third scan signal. The fourth scan line 40 is used for providing a fourth scan signal. The fifth scan line 50 is used for providing a fifth scan signal. The light emission control signal line 60 is used to supply a light emission control signal. The data line 70 is used to provide a data signal. The light emitting device driving circuit 100 is connected to the data line 70, the second scanning line 20, the third scanning line 30, the fourth scanning line 40, the fifth scanning line 50, and the light emission control signal line 60. The light emitting device driving circuit 100 may specifically refer to the description of the light emitting device driving circuit, and is not described herein again.
Referring to fig. 9, fig. 9 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure. The embodiment of the present application further provides a display panel 300, which includes a plurality of pixel units 301 arranged in an array, where each pixel unit 301 includes the light emitting device driving circuit 100 described above, and specific reference may be made to the description of the light emitting device driving circuit 100 above, which is not repeated herein.
The light emitting device driving circuit, the backlight module and the display panel provided by the present application are introduced in detail, and a specific example is applied in the present application to explain the principle and the implementation manner of the present application, and the description of the above embodiment is only used to help understanding the method and the core idea of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (11)
1. A light emitting device driving circuit, comprising:
the light-emitting device is connected in series with a light-emitting loop formed by a first power signal and a second power signal;
the source electrode and the drain electrode of the driving transistor are connected in series with the light-emitting loop;
the data signal writing module is accessed to a first scanning signal and a data signal and is electrically connected to the grid electrode of the driving transistor, and the data signal writing module is used for writing the data signal into the grid electrode of the driving transistor under the control of the first scanning signal;
the first initialization module is connected to a second scanning signal and the first power supply signal and is electrically connected to the grid of the driving transistor, and the first initialization module is used for initializing the potential of the grid of the driving transistor under the control of the second scanning signal;
a second initialization module, connected to a third scan signal and the second power signal, and electrically connected to one of the source and the drain of the driving transistor, the second initialization module being configured to initialize a potential of the one of the source and the drain of the driving transistor under the control of the third scan signal;
the compensation module is connected to a fourth scanning signal and is electrically connected to the other of the source electrode and the drain electrode of the driving transistor and the grid electrode of the driving transistor, and the compensation module is used for compensating the threshold voltage of the driving transistor under the control of the fourth scanning signal;
the bootstrap module is connected to the fifth scan signal and is electrically connected to one of the source and the drain of the driving transistor and the gate of the driving transistor, and the bootstrap module is configured to pull up a potential of the gate of the driving transistor.
2. The circuit of claim 1, further comprising a light-emitting control module, wherein the light-emitting control module is connected to a light-emitting control signal and is connected to the light-emitting circuit in series, and the light-emitting control module is configured to control the light-emitting circuit to be turned on or off based on the light-emitting control signal.
3. The light-emitting device driving circuit according to claim 1, wherein the data signal writing module includes a first transistor and a first capacitor;
the gate of the first transistor is connected to the first scanning signal, one of the source and the drain of the first transistor is connected to the data signal, the other of the source and the drain of the first transistor is electrically connected to one end of the first capacitor, and the other end of the first capacitor is electrically connected to the gate of the driving transistor.
4. The light emitting device driving circuit according to claim 1, wherein the first initialization module comprises a second transistor, a gate of the second transistor is connected to the second scan signal, one of a source and a drain of the second transistor is electrically connected to the gate of the driving transistor, and the other of the source and the drain of the second transistor is connected to the first power signal.
5. The light emitting device driving circuit according to claim 1, wherein the second initialization module comprises a third transistor, a gate of the third transistor is connected to the third scan signal, one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the driving transistor, and the other of the source and the drain of the third transistor is connected to the second power signal.
6. The light emitting device driving circuit according to claim 1, wherein the compensation module includes a fourth transistor;
the gate of the fourth transistor is connected to the fourth scan signal, one of the source and the drain of the fourth transistor is electrically connected to the gate of the driving transistor, and the other of the source and the drain of the fourth transistor is electrically connected to the other of the source and the drain of the driving transistor.
7. The light-emitting device driving circuit according to claim 1, wherein the bootstrap module includes a fifth transistor and a second capacitor;
the gate of the fifth transistor is connected to the fifth scan signal, one of the source and the drain of the fifth transistor is electrically connected to one of the source and the drain of the driving transistor, the other of the source and the drain of the fifth transistor is electrically connected to one end of the second capacitor, and the other end of the second capacitor is electrically connected to the gate of the driving transistor.
8. The light-emitting device driving circuit according to claim 1, wherein a driving control timing of the light-emitting device driving circuit includes a reset phase, a compensation phase, a data write phase, and a light-emitting phase;
in the reset phase, the first scan signal, the second scan signal, and the third scan signal are all at a high potential, and the fourth scan signal, the fifth scan signal, and the emission control signal are all at a low potential;
in the compensation phase, the first scanning signal, the third scanning signal and the fourth scanning signal are all at a high potential, and the second scanning signal, the fifth scanning signal and the light-emitting control signal are all at a low potential;
in the data writing stage, the first scanning signal and the third scanning signal are both high potential, and the second scanning signal, the fourth scanning signal, the fifth scanning signal and the light-emitting control signal are all low potential;
in the light emitting stage, the fifth scan signal and the light emitting control signal are at a high potential, and the first scan signal, the second scan signal, the third scan signal and the fourth scan signal are all at a low potential.
9. The light-emitting device driving circuit according to claim 1, wherein a potential of the first power supply signal is larger than a potential of the second power supply signal.
10. A backlight module, comprising:
a data line for providing a data signal;
the first scanning line is used for providing a first scanning signal;
a second scan line for providing a second scan signal;
a third scan line for providing a third scan signal;
a fourth scan line for providing a fourth scan signal;
a fifth scan line for providing a fifth scan signal;
a light emission control signal line for providing a light emission control signal; and
the light-emitting device driving circuit according to any one of claims 1 to 9, which is connected to the data line, the first scan line, the second scan line, the third scan line, the fourth scan line, the fifth scan line, and the light-emission control signal line.
11. A display panel comprising a plurality of pixel units arranged in an array, each of the pixel units comprising the light emitting device driving circuit according to any one of claims 1 to 9.
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