CN113964649A

CN113964649A - Epitaxial structure of a high power vertical cavity surface emitting laser

Info

Publication number: CN113964649A
Application number: CN202111285439.XA
Authority: CN
Inventors: 鄢静舟; 薛婷; 杨奕; 糜东林
Original assignee: Fujian Huixin Laser Technology Co ltd
Current assignee: Fujian Huixin Laser Technology Co ltd
Priority date: 2021-11-02
Filing date: 2021-11-02
Publication date: 2022-01-21

Abstract

The invention provides an epitaxial structure of a high-power vertical cavity surface emitting laser, which belongs to the technical field of novel semiconductor lasers and comprises a substrate (1), an MOCVD (metal organic chemical vapor deposition) buffer layer (2), a first N-type doped distributed Bragg reflection layer (3), a multi-level connected active region (4), a second tunneling junction (5), a second N-type doped distributed Bragg reflection layer (6) and an ohmic contact layer (7); the substrate is a GaAs or InP substrate; the first N-type doped distributed Bragg reflection layer (3) and the second N-type doped distributed Bragg reflection layer (6) are formed by stacking at least two semiconductor materials. According to the invention, the output power of the VCSEL is improved, and meanwhile, the top P-type doped distributed Bragg reflection layer is replaced by the N-type doped distributed Bragg reflection layer through the second tunneling junction (5), so that the slope efficiency and the photoelectric conversion efficiency of the device are improved, and the technical problem of how to improve the epitaxial uniformity and the yield is solved.

Description

Epitaxial structure of high-power vertical-cavity surface-emitting laser

Technical Field

The invention belongs to the technical field of novel semiconductor lasers, and particularly relates to an epitaxial structure of a high-power vertical-cavity surface-emitting laser.

Background

With the gradual maturation of Artificial Intelligence (AI) technology, the trend of intelligent hardware has penetrated many aspects of the photovoltaic industry. The 3D sensing is one of AI sensing core technologies, can capture three-dimensional information of real world space, human body and object, and can endow the terminal equipment with the capability of being similar to human eye sensing environment. LiDAR (LiDAR) and time-of-flight (ToF) sensors are devices that use the time difference between the transmission and reception of a laser pulse signal to achieve a range measurement of a target under test. High power pulsed VCSELs (vertical cavity surface emitting lasers) are core devices of TOF technology and LiDAR. At present, the VCSEL chip applied to 3D sensing is facing the challenges of output optical power and conversion efficiency.

Chinese invention patent CN112003124B proposes a vertical cavity surface emitting laser with a non-cylindrical mesa and a method for making the same, wherein the laser includes a substrate, a first mirror layer located above the substrate, an active layer located above the first mirror layer, and a second mirror layer located above the active layer, and the second mirror layer, the active layer, and a portion of the first mirror layer near the active layer are etched to form a non-cylindrical active region mesa. The invention comprehensively considers the influence of crystal face types and different directions of the active region platform on the oxidation speed, improves the shape of the common cylindrical active region platform aiming at different crystal face types, further realizes the shape regularization of the oxidation aperture, and makes the shape of the oxidation aperture approximate to a circular or regular polygon, so that the light emitted by the VCSEL is more regular.

Chinese invention patent CN111181001B proposes a vertical cavity surface emitting laser and its manufacturing method and application, including a substrate; a first reflective layer formed on a first surface of the substrate; at least two light emitting units formed on the first reflective layer, each of the light emitting units including at least two light emitting sub-units; an insulating layer formed between the at least two light emitting cells; at least two second electrodes formed on the at least two light emitting units, wherein the light emitting sub-units in each light emitting unit are connected through the second electrodes; a first electrode formed on a second surface of the substrate; wherein each of the light emitting sub-units includes a light emitting hole, and the second electrode surrounds the light emitting hole. The vertical cavity surface emitting laser provided by the invention has high application frequency.

Most of the conventional VCSEL chips adopt an oxide confinement structure, i.e., a layer of AlGaAs or AlAs with a certain thickness is respectively inserted between the quantum well and the upper DBR (distributed bragg reflector). In which AlGaAs layer of high Al content is reacted with H at high temperature₂The O reaction is converted to native alumina, which can achieve good electrical confinement due to the fact that alumina is an insulator, while the high refractive index difference between alumina (refractive index of about 1.7) and semiconductor (refractive index of about 3.0) can also provide good optical confinement, enabling VCSEL to achieve very low threshold continuous emission.

Both 850 nm and 940 nm VCSEL products used in the industry are based on the oxidized aperture technology platform. While the oxide aperture technique provides acceptable optical and electrical characteristics for VCSELs, several disadvantages associated with oxide apertures severely impact and limit the performance and yield of VCSEL chips.

First, the thermal conductivity of the aluminum oxide layer (0.7W/(m.k)) is lower than that of the semiconductor (about 20-50W/(m.k)), reducing the thermal conduction inside the chip, resulting in an increase in thermal resistance. Therefore, the maximum output power of an oxide aperture VCSEL as well as the modulation bandwidth is fundamentally limited due to early thermally induced power roll-off.

Secondly, during the oxidation process, point-like defects and dislocations are generated at the interface of the oxide layer and the semiconductor, and the thermal expansion coefficients of the oxide layer and the semiconductor are different, so that the oxidation process is usually very difficult to control, the process window is ultra-narrow, and the oxide layer-semiconductor interface is easy to crack or strip after the oxidation process. In addition, the oxide layer is closely adjacent to the active region, internal strain is formed when the chip works due to the difference of thermal expansion coefficients, the internal temperature rises, and a strain field can push point defects and dislocation to migrate to the active region, so that the chip is finally failed, and the reliability of the chip is reduced.

Furthermore, the formation of alumina is a diffusion process that is strongly dependent on process conditions such as Al content in AlGaAs layers, water vapor content, furnace temperature and crystal structure. This makes the lateral geometry and size of the oxide aperture difficult to control and leads to uncertainty in the intra-and inter-wafer oxide aperture size. In the current state of the art commercial fabrication processes, such on-chip and off-chip oxide aperture absolute variations are at least 1 μm, which limits the fabrication yield, especially for small aperture chips.

Therefore, conventional VCSEL chips are facing a number of challenges: the application end has high power requirement on the VCSEL chip; performance and yield issues of lasers associated with oxidized confinement layers.

Disclosure of Invention

In order to solve the technical problem, the invention provides an epitaxial structure of a high-power vertical cavity surface emitting laser, which comprises an MOCVD deposition buffer layer, a first N-type doped distributed Bragg reflection layer, a multi-level connected active region, a second tunneling junction, a second N-type doped distributed Bragg reflection layer and an ohmic contact layer, wherein the MOCVD deposition buffer layer, the first N-type doped distributed Bragg reflection layer, the multi-level connected active region, the second tunneling junction, the second N-type doped distributed Bragg reflection layer and the ohmic contact layer are sequentially arranged on a substrate; the substrate is a GaAs or InP substrate; GaAs or InP is N-type doped, and the doping concentration is in an order of magnitude; the first N-type doped distributed Bragg reflection layer and the second N-type doped distributed Bragg reflection layer are formed by stacking at least two semiconductor materials.

In the invention, the distributed Bragg reflection layer is called DBR for short; the vertical cavity surface emitting laser is abbreviated as VCSEL; the P _ DBR is called P type doping distributed Bragg reflection layer, and the N _ DBR is called N type doping distributed Bragg reflection layer.

According to the invention, the output power of the VCSEL is improved by increasing the gain through the active region in the stacked cavity, and meanwhile, the top P _ DBR (P-type doped DBR) is replaced by the N _ DBR (N-type doped DBR), so that the epitaxial uniformity and yield are greatly improved.

Compared with the prior art, the invention has the outstanding difference that the light cavity is introduced with a tunneling junction to form a multi-level connected active region; the buried tunnel junction replaces a traditional oxidation limiting layer to realize electrical and optical limitation.

Specifically, the invention provides a non-oxidized aperture high-power vertical cavity surface emitting laser epitaxial structure.

The buffer layer can adopt GaAs or InP, and is consistent with the substrate material;

preferably, the buffer layer is N-type doped with a thickness of 200-300 nm and a doping concentration of several orders of magnitude.

On a specific material arrangement, the first/second N-type doped DBR layer is formed by overlapping at least two semiconductor materials with certain thicknesses.

Preferably, the material of the first/second N-type doped DBR layer may be, but is not limited to, AlGaAs/GaAs, AlAs/GaAs, InGaAlAs/InP, InGaAsP/InP, AlGaInAs/AlInAs, and the lattice constant of the semiconductor material is kept matched with that of the substrate material.

The multi-level connected active region is used for cascading the active regions through the first tunneling junction.

The first/second tunneling junction is composed of a first/second P-type heavily doped layer and a first/second N-type heavily doped layer.

The doping concentration of the P-type heavily doped layer and the N-type heavily doped layer is in the order of magnitude.

The first/second P-type heavily doped layer material may be, but is not limited to, InGaAsP, InGaAlAs, AlInAs, GaAs, AlGaAs, GaAsSb, the first/second N-type heavily doped layer material may be, but is not limited to, AlGaAs, GaAs, GaInAs, InP, InGaAsP, InGaAlAs, InAlAs, GaAsSb, and the lattice constant of the semiconductor material is kept matched with that of the substrate material.

The first/second P-type heavily doped layer doping atoms can Be, but are not limited to, C, Mg, Zn, Be, and the first/second N-type heavily doped layer doping atoms can Be, but are not limited to, Te, Se, Si, S.

Preferably, the thickness range of the P-type heavily doped layer is 8-50 nm, the thickness range of the N-type heavily doped layer is 10-50 nm, and the thickness of the depletion layer is 5-50 nm; the thickness range of the ohmic contact layer is 10-300 nm; the pore size range of the second tunneling junction is 4-500 mu m.

Compared with the prior art, the high-power VCSEL laser epitaxial structure has the following beneficial effects:

1. the multi-level active region increases the gain amount through the active region in the stacked cavity, improves the output power of the VCSEL, and the introduction of the first tunneling junction enables carriers to be regenerated, so that the slope efficiency and the net efficiency of the VCSEL are improved.

2. The second tunneling junction reverses the polarity of the P _ DBR, so the configuration of the N _ DBR-resonant cavity (located in the multi-cascaded active region) -tunneling junction-N _ DBR will greatly reduce the higher free carrier absorption in the P _ DBR, thus greatly reducing the loss; and because the P _ DBR is removed, the series resistance is greatly reduced, and the slope efficiency and high-speed operation are improved.

3. And the top P _ DBR is replaced by the N _ DBR by utilizing the second tunneling junction platform, so that the epitaxial uniformity and the yield are greatly improved.

4. The second tunneling junction is used for replacing an oxidation aperture, the buried tunneling junction aperture has excellent electrical limitation and optical limitation, and the elimination of the oxidation process is equivalent to the elimination of the largest yield killer in VCSEL production.

The VCSEL aperture is defined by a lithography machine or more precise method, so aperture size control and uniformity can be within +/-0.1 microns or better.

Further advantages of the invention will be apparent in the detailed description section in conjunction with the drawings attached hereto.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

FIG. 1 is a schematic diagram of the main structure of the epitaxial structure of a high power VCSEL according to an embodiment of the invention

FIG. 2 is a schematic view of a layered structure of multiple cascaded active regions in an epitaxial structure of the high power VCSEL of FIG. 1

FIG. 3 is a schematic diagram of the internal layer structure of the first tunneling junction in the epitaxial structure of the high power VCSEL of FIG. 1

FIG. 4 is a schematic view of a layer structure of the Nth active region in the multi-level active region in the epitaxial structure of the high power VCSEL shown in FIG. 1

FIG. 5 is a schematic diagram of the inner layer structure of the second tunneling junction in the epitaxial structure of the high power VCSEL of FIG. 1

Illustration of the drawings:

substrate 1 buffer layer 2

First N-type doped DBR 3 multi-level active region 4

Second tunnel junction 5 second N-doped DBR 6

Ohmic contact layer 7

First active region 41 first tunnel junction 42

Second active region 43 Nth active region 44

First P-type heavily doped layer 421 and first N-type heavily doped layer 422

Confinement layer 441 waveguide layer 442

Quantum well layer 443 symmetric waveguide layer 444

Symmetric confinement layer 445

Second P-type heavily doped layer 51 and second N-type heavily doped layer 52

Detailed Description

The invention is further described with reference to the following drawings and detailed description.

It should be noted that the description of the drawings given in the various embodiments of the present invention is illustrative only and does not represent all the specific structures;

the structures, proportions, sizes, and other dimensions shown in the drawings and described in the specification are for understanding and reading the present disclosure, and are not intended to limit the scope of the present disclosure, which is defined in the claims, and are not essential to the art, and any structural modifications, changes in proportions, or adjustments in size, which do not affect the efficacy and attainment of the same are intended to fall within the scope of the present disclosure.

The following description of the embodiments of the present invention is provided for illustrative purposes, and other advantages and effects of the present invention will become apparent to those skilled in the art from the present disclosure.

FIG. 1 first generally illustrates the bulk layer structure of the epitaxial structure of a high power VCSEL in accordance with one embodiment of the present invention.

In fig. 1, the epitaxial structure includes a substrate 1, and an MOCVD deposition buffer layer 2, a first N-type doped distributed bragg reflector layer 3, a multi-level active region 4, a second tunneling junction 5, a second N-type doped distributed bragg reflector layer 6, and an ohmic contact layer 7 are sequentially disposed on the substrate 1;

the substrate 1 is a GaAs or InP substrate;

the buffer layer 2 can adopt GaAs or InP, and is consistent with the material of the substrate 1;

the GaAs or InP is N-type doped, and the doping concentration is in an order of magnitude;

the N-type doping atoms of the GaAs substrate are Si, and the N-type doping atoms of the InP substrate are S;

the first N-type doped distributed Bragg reflection layer 3 and the second N-type doped distributed Bragg reflection layer 6 are formed by stacking at least two semiconductor materials.

As a more preferred embodiment, the substrate 1 is a Si-doped GaAs substrate, with a doping concentration in the order of magnitude. The buffer layer 2 is a GaAs layer doped with Si, with a doping concentration of the order of magnitude. The first N-doped DBR is an alternating mechanism of first/second refractive indices, the first refractive index value being greater than the second refractive index value;

preferably, the first refractive index is a high refractive index and the second refractive index is a low refractive index, such that the first N-doped DBR is a high refractive index/low refractive index/high refractive index/low refractive index … …/high refractive index structure.

Preferably, the material of the high refractive index structure is Si-doped Al_0.1Ga_0.9As layer, the material of low refractive index structure is Si-doped Al_0.9Ga_0.1And an As layer.

Specifically, in this embodiment, the Si-doped Al_0.1Ga_0.9The high refractive index (i.e., first refractive index) of the As layer is 3.4437, and the Si-doped Al_0.9Ga_0.1Low refractive index of As layer (i.e. second refraction)Rate) was 3.0094. Si-doped Al_0.1Ga_0.9As layer with thickness of 77 nm and doping concentration of several orders of magnitude, doped with Si Al_0.9Ga_0.1The As layer is 88 nm thick and the doping concentration is of the order of magnitude.

On the basis of fig. 1, referring to fig. 2, fig. 2 is a schematic diagram of a layered structure of a multi-cascaded active region in an epitaxial structure of the high-power vertical cavity surface emitting laser shown in fig. 1.

In fig. 2, the multi-cascaded active region cascades active regions through a first tunneling junction.

Specifically, the multi-level connected active region adopts a manner that N active regions and a first tunnel junction are alternately cascaded, for example, a first active region 41, a first tunnel junction 42, a second active region 43, and a first tunnel junction 42 … …, an nth active region 44 are sequentially adopted. In fig. 4, the confinement layer 441, the waveguide layer 442, the quantum well layer 443, the symmetric waveguide layer 444, and the symmetric confinement layer 445 are provided for each active region from bottom to top.

The quantum well layers in the nth active areas 44 of the first active area 41 and the second active area 43 … … are located at an antinode of a standing wave in the cavity, and the first tunneling junction 42 is located at a trough of the standing wave in the cavity.

Specifically, the multi-cascade active region is preferably composed of a first active region 41, a first tunnel junction 42, and a second active region 43. The first/second active region comprises Si-doped Al from bottom to top_0.6Ga_0.4As confinement layer, Al_0.3Ga_0.7As waveguide layer, GaAs_0.8P_0.2Base and In_0.28Ga_0.72Barrier/trap/barrier quantum well layer with As As well, Al_0.3Ga_0.7As symmetric waveguide layer, C doped Al_0.6Ga_0.4An As symmetric confinement layer. The first tunneling junction comprises a GaAs heavily doped Be layer and a GaAs heavily doped Si layer from bottom to top. In which Si is doped Al_0.6Ga_0.4The As limiting layer has a thickness of 70 nm and a doping concentration of 10¹⁷Order of magnitude, Al_0.3Ga_0.7The thickness of As waveguide layer is 160 nm, GaAs_0.8P_0.2The thickness of the barrier layer is 15 nm, In_0.28Ga_0.72As thickness of 9 nm and Al_0.3Ga_0.7As symmetrical waveguide layer thickness of 160nm, C-doped Al_0.6Ga_0.4The As symmetrical confining layer is 70 nm and the doping concentration is 10¹⁷An order of magnitude. The thickness of the GaAs heavily doped Be layer is 50nm, the thickness of the GaAs heavily doped Si layer is 50nm, and the doping concentration of the GaAs heavily doped Be layer is 10¹⁹The doping concentration of the GaAs heavily doped Si layer is 10¹⁸An order of magnitude.

In the embodiments of fig. 1-2, the first/second tunneling junctions are each composed of a first/second P-type heavily doped layer and a first/second N-type heavily doped layer.

Preferably, the doping concentration of the P-type heavily doped layer and the N-type heavily doped layer is in the order of magnitude.

Preferably, referring to fig. 4, a schematic diagram of a specific internal layer structure of the nth active region in the multilevel link active region shown in fig. 2 is shown.

In fig. 3, the first tunnel junction is composed of a first P-type heavily doped layer 421 and a first N-type heavily doped layer 422.

In fig. 5, the second tunnel junction is composed of a second P-type heavily doped layer 51 and a second N-type heavily doped layer 52.

Preferably, the second tunneling junction comprises a GaAs heavily doped C layer In from bottom to top_0.16Ga_0.84The thickness of the As heavily-doped Si layer and the thickness of the GaAs heavily-doped C layer are 50nm, and the doping concentration is 10²⁰Order of magnitude, In_0.16Ga_0.84The thickness of the As heavily doped Si layer is 12.5 nm, and the doping concentration is 10¹⁹An order of magnitude. The pore size of the second tunneling junction is 5 [ mu ] m.

On the basis of fig. 1-3, reference is next made to fig. 4. Fig. 4 is a schematic view of a layer structure of an nth active region of the multiple cascaded active regions in the epitaxial structure of the high power vcsel of fig. 1.

In fig. 4, the nth active region includes a confinement layer 441, a waveguide layer 442, a quantum well layer 443, a symmetric waveguide layer 444, and a symmetric confinement layer 445 in this order.

Based on the basis of fig. 1-5, the following are various embodiments for implementing the corresponding structure:

in one embodiment, the second N-doped DBR is a first/second/first/second … …/first refractive index structure, the first refractive index value being greater than the second refractive index value;

preferably, the first refractive index is a high refractive index and the second refractive index is a low refractive index;

preferably, the high refractive index structural material is Si-doped Al_0.1Ga_0.9As layer, the material of low refractive index structure is Si-doped Al_0.9Ga_0.1And an As layer.

In this embodiment, the Si-doped Al_0.1Ga_0.9The high refractive index value of As layer is 3.4437, and the Si-doped Al layer_0.9Ga_0.1The low refractive index of the As layer has a value of 3.0094. Si-doped Al_0.1Ga_0.9The thickness of As layer is 77 nm, the doping concentration is 10¹⁸Order of magnitude, Si-doped Al_0.9Ga_0.1The thickness of the As layer is 88 nm, and the doping concentration is 10¹⁸An order of magnitude.

As a preferable mode, the first/second N-type DBR has a first/second/… …/first refractive index structure.

The first refractive index value is greater than the second refractive index value;

preferably, the material of the high refractive index structure is Al with a gradually changed Si-doped aluminum component_xGa_1-xThe gradient range of the Al component of the As layer is 10 to 30 percent; the material of the low refractive index structure is Al with Si-doped aluminum components gradually changed_xGa_1-xThe gradient range of the Al component of the As layer is 90-60%. The doping concentration of Si doped in the high/low refractive index material is 10¹⁸An order of magnitude.

In this embodiment, the high index material has a value of 3.392 and the low index material has a value of 3.093.

With Al of gradually varying composition_xGa_1-xAs material can reduce potential barrier at heterojunction interface and is helpful forThe series resistance of the DBR is reduced, and therefore the conversion efficiency of the chip is improved.

In one embodiment, the multi-level active region comprises a first active region, a first tunneling junction and a second active region from bottom to top.

The first/second active region comprises Si-doped Al from bottom to top_0.6Ga_0.4As confinement layer, Al_0.3Ga_0.7As waveguide layer, GaAs_0.8P_0.2Base and In_0.28Ga_0.72Barrier/trap/barrier quantum well layer with As As well, Al_0.3Ga_0.7As symmetric waveguide layer, C doped Al_0.6Ga_0.4An As symmetric confinement layer. In which Si is doped Al_0.6Ga_0.4The As limiting layer has a thickness of 70 nm and a doping concentration of 10¹⁷Order of magnitude, Al_0.3Ga_0.7The thickness of As waveguide layer is 160 nm, GaAs_0.8P_0.2The thickness of the barrier layer is 15 nm, In_0.28Ga_0.72As thickness of 9 nm and Al_0.3Ga_0.7The thickness of the As symmetrical waveguide layer is 160 nm, and the C-doped Al_0.6Ga_0.4The As symmetrical confining layer is 70 nm and the doping concentration is 10¹⁷An order of magnitude. The first tunneling junction comprises a GaAs heavily doped Be layer and a GaAs heavily doped Si layer from bottom to top. The thickness of the GaAs heavily doped Be layer is 50nm, and the thickness of the GaAs heavily doped Si layer is 50 nm. The doping concentration of the GaAs heavily doped Be layer is 10¹⁹The doping concentration of the GaAs heavily doped Si layer is 10¹⁸An order of magnitude.

The first tunnel junction cascades 2 active areas to form a multiple quantum well active area. The gain of the multi-level active region is increased by the active region in the stacked cavity, and the output power of the VCSEL is improved; and the introduction of the first tunneling junction enables carriers to be regenerated, so that the slope efficiency and the net efficiency of the VCSEL are improved.

In one embodiment, the second tunnel junction comprises a GaAs heavily doped C layer, In from bottom to top_0.16Ga_0.84The thickness of the As heavily-doped Si layer and the thickness of the GaAs heavily-doped C layer are 50nm, and the doping concentration is 10²⁰Order of magnitude, In_0.16Ga_0.84The thickness of the As heavily doped Si layer is 12.5 nm, and the doping concentration is 10¹⁹An order of magnitude. The pore size of the second tunneling junction is 5 [ mu ] m.

The polarity of the P _ DBR is reversed by the second tunneling junction, so that the high free carrier absorption in the P _ DBR is greatly reduced by the configuration of the NDBR-resonant cavity-tunneling junction-NDBR, and the loss is greatly reduced; and because the P _ DBR is removed, the series resistance is greatly reduced, and the slope efficiency and high-speed operation are improved. The current epitaxial non-uniformity of VCSELs (one of the major epitaxial yield losses) is mainly introduced by the high C doping required in the P _ DBR growth. Therefore, replacing the top P _ DBR with the N _ DBR using the second tunnel junction platform will greatly improve the epitaxial uniformity and yield. In addition, the aperture of the tunnel junction is defined by a photolithography machine or more precise method, so aperture size control and uniformity can be within +/-0.1 microns or better, which is critical for higher yield and future high speed VCSEL applications.

Preferably, the second tunneling junction comprises GaAs from bottom to top_0.88Sb_0.12Heavily doped C layer, In_0.16Ga_0.84As heavily doped Si layer, GaAs_0.88Sb_0.12The thickness of the heavily doped C layer is 9.5 nm, and the doping concentration is 10²⁰Order of magnitude, In_0.16Ga_0.84The thickness of the As heavily doped Si layer is 12.5 nm, and the doping concentration is 10¹⁹An order of magnitude. The pore size of the second tunneling junction is 5 [ mu ] m.

In summary, the present invention provides a novel electrical and optical confinement structure for a non-oxide aperture high power vertical cavity surface emitting laser epitaxial structure of a 3D sensor, the structure includes a substrate, on which an MOCVD deposition buffer layer, a first N-type doped DBR (distributed bragg reflector layer), a multi-level coupled active region, a second tunneling junction, a second N-type doped DBR and an ohmic contact layer are sequentially disposed.

And the N-type doping atoms for the GaAs substrate are Si, and the N-type doping atoms for the InP substrate are S.

The buffer layer is N-type doped with a thickness of 200-300 nm and a doping concentration of 10¹⁸An order of magnitude.

The first/second N-type doped DBR layer is formed by overlapping at least two semiconductor materials with certain thicknesses. The material of the first/second N-type doped DBR layer can be, but is not limited to, AlGaAs/GaAs, AlAs/GaAs, InGaAlAs/InP, InGaAsP/InP, AlGaInAs/AlInAs.

The growth logarithm of the first/second N-type doped DBR is 10-30 half integer pairs.

The doping atoms of the first/second N-type doped DBR can be Si and Te, and the doping concentration is 10¹⁸An order of magnitude.

The first/second P-type heavily doped layer material may be, but is not limited to, InGaAsP, InGaAlAs, AlInAs, GaAs, AlGaAs, GaAsSb, and the first/second N-type heavily doped layer material may be, but is not limited to, AlGaAs, GaAs, GaInAs, InP, InGaAsP, InGaAlAs, AlInAs, GaAsSb.

Preferably, the doping concentration of the first/second P-type heavily doped layers and the first/second N-type heavily doped layers is 10¹⁹-10²⁰An order of magnitude.

Preferably, the thickness of the first/second P-type heavily doped layer ranges from 8 nm to 50nm, and the thickness of the first/second N-type heavily doped layer ranges from 10 nm to 50 nm.

The refractive index of the material in the light emitting region should be higher than the refractive index of the material on both sides of the light emitting region for optical confinement.

Refractive index of light emitting region material: 3.857, respectively; refractive index of material on both sides of the light emitting region: 3.290.

preferably, the second tunneling junction pore size is 4-500 μm.

Preferably, the material of the ohmic contact layer may be GaAs, InGaAs or InP.

Preferably, the ohmic contact layer is doped with P, and the doping concentration is 10¹⁹-10²⁰An order of magnitude.

Preferably, the thickness of the ohmic contact layer ranges from 10 nm to 300 nm.

The high-power VCSEL laser epitaxial structure has the following beneficial effects:

2. The second tunneling junction reverses the polarity of the P _ DBR, so the configuration of the N _ DBR-resonant cavity-tunneling junction-N _ DBR will greatly reduce the higher free carrier absorption in the P _ DBR, thereby greatly reducing the loss; and because the P _ DBR is removed, the series resistance is greatly reduced, and the slope efficiency and high-speed operation are improved.

3. The current epitaxial non-uniformity of VCSELs (one of the major epitaxial yield losses) is mainly introduced by the high C doping required in the P _ DBR growth. Therefore, replacing the top P _ DBR with the N _ DBR using the second tunnel junction platform will greatly improve the epitaxial uniformity and yield.

4. The second tunnel junction is used for replacing the oxidation aperture, the buried tunnel junction aperture has excellent electrical limitation and optical limitation effects at the same time, and the elimination of the oxidation process is equivalent to the elimination of the largest yield killer in VCSEL production.

5. The VCSEL aperture is defined by a photolithography machine or more precise method, so aperture size control and uniformity can be within +/-0.1 microns or better, which is critical for higher yield and future high speed VCSEL applications.

The present invention is not limited to the specific module structure described in the prior art. The prior art mentioned in the background section can be used as part of the invention to understand the meaning of some technical features or parameters. The scope of the present invention is defined by the claims. .

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims

1. An epitaxial structure of a high power vertical cavity surface emitting laser, the epitaxial structure comprising a substrate, characterized in that:

sequentially arranging an MOCVD deposition buffer layer, a first N-type doped distributed Bragg reflection layer, a multi-level active region, a second tunneling junction, a second N-type doped distributed Bragg reflection layer and an ohmic contact layer on the substrate;

the substrate is a GaAs or InP substrate;

the GaAs or InP is N-type doped, and the doping concentration is in the order of magnitude;

the first N-type doped distributed Bragg reflection layer and the second N-type doped distributed Bragg reflection layer are formed by overlapping at least two semiconductor materials.

2. An epitaxial structure for a high power vertical cavity surface emitting laser according to claim 1 wherein:

3. An epitaxial structure for a high power vertical cavity surface emitting laser according to claim 1 wherein:

the first tunneling junction and the second tunneling junction are both formed by a P-type heavily-doped layer and an N-type heavily-doped layer.

4. An epitaxial structure for a high power vertical cavity surface emitting laser according to claim 3 wherein:

5. An epitaxial structure for a high power vertical cavity surface emitting laser according to claim 3 wherein:

the thickness range of the P-type heavily doped layer is 8-50 nm, and the thickness range of the N-type heavily doped layer is 10-50 nm.

6. An epitaxial structure for a high power vertical cavity surface emitting laser according to any of claims 1 to 5 wherein:

the refractive index value of the material in the light emitting area of the epitaxial structure is larger than the refractive index values of the materials at two sides of the light emitting area.

7. An epitaxial structure for a high power vertical cavity surface emitting laser according to any of claims 1 to 5 wherein:

the ohmic contact layer material comprises GaAs, InGaAs, or InP.

8. An epitaxial structure for a high power vertical cavity surface emitting laser according to any of claims 1 to 5 wherein:

the ohmic contact layer is doped with P, and the doping concentration is in the order of magnitude.

9. An epitaxial structure for a high power vertical cavity surface emitting laser according to claim 8, wherein:

the thickness range of the ohmic contact layer is 10-300 nm.

10. An epitaxial structure for a high power vertical cavity surface emitting laser according to any of claims 1 or 3 to 5 wherein:

the pore size range of the second tunneling junction is 4-500 mu m.