CN113900293B - Array substrate, manufacturing method thereof, liquid crystal display panel and display device - Google Patents
Array substrate, manufacturing method thereof, liquid crystal display panel and display device Download PDFInfo
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- CN113900293B CN113900293B CN202010575268.3A CN202010575268A CN113900293B CN 113900293 B CN113900293 B CN 113900293B CN 202010575268 A CN202010575268 A CN 202010575268A CN 113900293 B CN113900293 B CN 113900293B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
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- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/133345—Insulating layers
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
- G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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Abstract
The invention provides an array substrate, a manufacturing method thereof, a liquid crystal display panel and a display device. The array substrate includes: a substrate base; a thin film transistor array layer disposed on one surface of the substrate base plate; an organic layer disposed on a portion of the surface of the thin film transistor array layer remote from the substrate base plate, and at least one ventilation hole is provided in the organic layer; and the passivation layer is arranged on the surface of the organic layer, which is far away from the substrate base plate, and covers the inner wall of the air vent. The gas in the organic layer of the array substrate can be well discharged in the manufacturing process, the stress in the organic layer can be well released, so that the surface of the organic layer is not easy to bulge or crack, the black matrix in the array substrate has a good shading effect, and the display device is not easy to cross color; the bending resistance is better, and the flexible display device is particularly suitable for being used in flexible display devices.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a manufacturing method thereof, a liquid crystal display panel and a display device.
Background
In the related art, after a long period of use, the surface of the array substrate therein is easily swelled or broken, resulting in a malfunction of the display device.
Thus, the related art of the existing liquid crystal display panel has yet to be improved.
Disclosure of Invention
The present invention has been completed based on the following findings by the inventors:
after a great deal of intensive investigation and experimental verification, the invention finds that the surface of the array substrate in the related technology is easy to bulge or crack because: in the process of manufacturing the array substrate, referring to fig. 1a, after the high temperature or baking process, the decomposed product in the organic layer 1 is generally not completely discharged, and a large amount of solvent remains in the organic layer 1. The decomposition products and the solvent can form gas micromolecules 5 in the subsequent high-temperature process; after the pixel electrode 2 is continuously formed on a part of the surface of the organic layer 1 (the schematic structural view is shown in fig. 1 b), the passivation layer 3 in the array substrate is formed on the surface of the pixel electrode 2 far from the organic layer 1 and on the surface of the organic layer 1 not covered by the pixel electrode 2, because the passivation layer 3 is usually an inorganic material such as silicon nitride and the like, and because the passivation layer 3 has good moisture-isolating effect, a large amount of small gas molecules 5 can be accumulated along the edge of the pixel electrode 2 during the subsequent annealing process (the schematic structural view is shown in fig. 1 c), in addition, because the adhesiveness between the passivation layer 3 and the pixel electrode 2 is poor, and the stress of the organic layer 1 is relatively large at the position where the edge of the pixel electrode 2 contacts the passivation layer 3, in the related art, the small gas molecules 5 enter between the pixel electrode 2 and the passivation layer 3 from the position where the organic layer 1, the pixel electrode 2 and the passivation layer 3 contact each other, and when the small gas molecules 5 are accumulated to a certain amount, the passivation layer 2 is bulged on the edge of the pixel electrode 2, and the passivation layer 3, the defect is formed on the top of the passivation layer 3, and the defect is even caused when the passivation layer 1 is formed, and the defect is shown in the schematic structural view is shown.
Based on this, the present invention aims to solve at least one of the technical problems in the related art to some extent. Therefore, an object of the present invention is to provide an array substrate which is not prone to bulge, cracking or shading effect of a black matrix, and which is suitable for a flexible display device.
In one aspect of the invention, an array substrate is provided. According to an embodiment of the present invention, the array substrate includes: a substrate base; a thin film transistor array layer disposed on one surface of the substrate base plate; an organic layer disposed on a portion of the surface of the thin film transistor array layer remote from the substrate base plate, and having at least one ventilation hole disposed therein; and the passivation layer is arranged on the surface, away from the substrate, of the organic layer, and covers the inner wall of the air vent. The gas in the organic layer of the array substrate can be well discharged in the manufacturing process, the stress in the organic layer can be well released, so that the surface of the organic layer is not easy to bulge or crack, the black matrix in the array substrate has a good shading effect, and the display device is not easy to cross color; the bending resistance is better, and the flexible display device is particularly suitable for being used in flexible display devices.
According to the embodiment of the invention, the thin film transistor array layer is provided with a plurality of thin film transistors arranged at intervals and a plurality of common electrode wires arranged at intervals, and the orthographic projection of the air holes on the substrate is at least partially overlapped with at least one of the orthographic projection of the thin film transistors on the substrate and the orthographic projection of the common electrode wires on the substrate.
According to an embodiment of the present invention, the ventilation hole includes a first hole and a second hole, the orthographic projection of the first hole on the substrate and the orthographic projection of the thin film transistor on the substrate overlap at least partially, and the orthographic projection of the second hole on the substrate and the orthographic projection of the common electrode line on the substrate overlap at least partially.
According to an embodiment of the present invention, at least one of the following conditions is satisfied: the width of the bottom of the first hole is smaller than the width of the gate electrode in the thin film transistor; the width of the bottom of the second hole is smaller than the width of the common electrode line.
According to an embodiment of the present invention, at least one of the following conditions is satisfied: the orthographic projection of each thin film transistor on the substrate is at least partially overlapped with the orthographic projection of one first hole on the substrate; each three thin film transistors corresponds to a pixel unit, and the orthographic projection of the common electrode line corresponding to each pixel unit on the substrate is at least partially overlapped with the orthographic projection of one second hole on the substrate.
According to an embodiment of the present invention, the array substrate further includes: a pixel electrode layer disposed on a portion of surfaces of the thin film transistor array layer and the organic layer remote from the substrate base plate; and a common electrode layer disposed on a portion of a surface of the passivation layer remote from the substrate base plate.
In another aspect of the present invention, a method of fabricating the array substrate described above is provided. According to an embodiment of the invention, the method comprises: forming a thin film transistor array layer on one surface of a substrate base plate; forming a prefabricated film layer on the surface of the thin film transistor array layer far away from the substrate base plate; forming at least one ventilation hole in the prefabricated film layer to obtain an organic layer; a passivation layer is formed on a surface of the organic layer remote from the substrate base plate. The method is simple and convenient to operate, easy to realize industrial production, and capable of effectively manufacturing the array substrate.
According to an embodiment of the invention, the method further comprises: forming a pixel electrode layer on a portion of surfaces of the thin film transistor array layer and the organic layer remote from the substrate base plate before forming the passivation layer; a common electrode layer is formed on a portion of the surface of the passivation layer remote from the substrate base plate.
In yet another aspect of the present invention, a liquid crystal display panel is provided. According to an embodiment of the present invention, the liquid crystal display panel includes the array substrate described above. The liquid crystal display panel has long service life, is not easy to generate cross color, has good display effect, has all the characteristics and advantages of the array substrate, and is not repeated here.
In yet another aspect, the present invention provides a display device. According to an embodiment of the present invention, the display device includes the liquid crystal display panel described above. The display device has long service life, is not easy to generate cross color, has good display effect, has all the characteristics and advantages of the liquid crystal display panel, and is not repeated here.
Drawings
Fig. 1a, 1b, 1c and 1d are schematic diagrams illustrating the principle of bulge or fracture of the surface of the array substrate in the related art.
Fig. 2 is a schematic cross-sectional view of an array substrate according to an embodiment of the invention.
Fig. 3 is a schematic cross-sectional view of an array substrate according to another embodiment of the invention.
Fig. 4 is a schematic cross-sectional view of an array substrate according to another embodiment of the invention.
Fig. 5 is a schematic cross-sectional view illustrating an array substrate according to still another embodiment of the present invention.
Fig. 6 is a schematic plan view illustrating the structure of the array substrate according to the embodiment of fig. 5.
Fig. 7 is a schematic cross-sectional view illustrating an array substrate according to still another embodiment of the present invention.
Fig. 8 is a schematic cross-sectional view illustrating an array substrate according to still another embodiment of the present invention.
Fig. 9 is a flowchart illustrating a method for fabricating an array substrate according to an embodiment of the invention.
Fig. 10a, 10b, 10c and 10d are schematic flow diagrams illustrating a method for fabricating an array substrate according to another embodiment of the invention.
Fig. 11 is a flowchart illustrating a method for fabricating an array substrate according to another embodiment of the invention.
Fig. 12a, 12b and 12c are schematic flow diagrams illustrating a method for fabricating an array substrate according to still another embodiment of the invention.
Reference numerals:
100: substrate 200: thin film transistor array layer 210: gate 220: gate insulating layer 230: active layer 240: source 250: drain electrode 260: common electrode line 270: source or drain lines 399: prefabricated film layer 1, 400: organic layer 500: ventilation holes 510: first bore 520: second hole 2, 600: pixel electrode 3, 700: passivation layer 4, 800: common electrode 5: gas small molecules
Detailed Description
Embodiments of the present invention are described in detail below. The following examples are illustrative only and are not to be construed as limiting the invention. The examples are not to be construed as limiting the specific techniques or conditions described in the literature in this field or as per the specifications of the product. The reagents or apparatus used were conventional products commercially available without the manufacturer's attention.
In one aspect of the invention, an array substrate is provided. According to an embodiment of the present invention, referring to fig. 2, the array substrate includes: a substrate base 100; a thin film transistor array layer 200, the thin film transistor array layer 200 being disposed on one surface of the substrate base 100; and an organic layer 400, the organic layer 400 being disposed on a portion of the surface of the thin film transistor array layer 200 remote from the substrate base plate 100, and at least one ventilation hole 500 being provided in the organic layer 400; and a passivation layer 700, the passivation layer 700 being disposed on a surface of the organic layer 400 remote from the substrate base plate 100, and the passivation layer 700 covering an inner wall of the ventilation hole 500. The gas in the organic layer 400 of the array substrate can be well discharged in the manufacturing process, the stress in the organic layer 400 can be well released, so that the surface of the organic layer is not easy to bulge or crack, and the surface of the organic layer 400 is still provided with the passivation layer 700 of the whole layer while the air holes 500 are formed in the array substrate, so that a black matrix with enough quantity, enough density and enough area can be formed on one side of the passivation layer 700 far away from the substrate 100, and the formed black matrix has good shading effect, so that the display device is not easy to generate cross color; in addition, the passivation layer 700 covers the inner wall of the entire air vent 500, so that the entire array substrate has better bending resistance, and is more suitable for flexible display devices. According to the embodiment of the present invention, in the process of manufacturing the array substrate of the present invention, when the organic layer 400 in the array substrate is subjected to a high temperature or a baking process, the surface of the organic layer 400 is not covered with a layer structure which can completely isolate water vapor, and because the air holes 500 are formed in the organic layer 400, on one hand, the inside of the organic layer 400 is more exposed to the outside, and the contact area with the outside is larger than that of the organic layer in the related art, so that more gas small molecules can escape from the inside of the organic layer 400 in the process of manufacturing the array substrate, and after the pixel electrode of the array substrate is formed, only a small amount of gas small molecules exist in the organic layer 400, even no gas small molecules exist, and after the pixel electrode and the passivation layer 700 are formed, even if a small amount of gas small molecules partially enter between the pixel electrode and the passivation layer 700, the bulge is not formed therebetween, and the breakage of the passivation layer 700 cannot be caused; on the other hand, due to the large difference between the thermal expansion coefficients of the organic layer and the passivation layer 700 to be formed later, the arrangement of the ventilation holes 500 can better release the stress in the organic layer 400 in the subsequent heating process, so as to avoid cracking at the position where the stress is large.
In the thin film transistor array layer described above with reference to fig. 3, 4 or 5, it should be understood by those skilled in the art that the structures in the conventional thin film transistor array layer, such as the gate electrode 210, the active layer 230, the source electrode 240 and the drain electrode 250, the gate insulating layer 220, the source line or the drain line 270, etc., may be included, and the relative positional relationship between the above structures may be the same as that of the structures in the thin film transistor array layer in the related art, which will not be repeated herein.
According to the embodiment of the present invention, regarding the above-mentioned position of the vent 500, the positioning principle is to perform the above-mentioned function of exposing the inside of the organic layer 400 to the external surface more and not to adversely affect the structure of the array substrate itself, and for this reason, the inventor has made extensive studies to find that the position of the vent 500 may be at least partially overlapped with at least one of the front projection of the vent 500 on the substrate 100 and the front projection of the thin film transistor on the substrate 100 and the front projection of the common electrode line 260 on the substrate 100. That is, in some embodiments of the present invention, the orthographic projection of the vent 500 on the substrate 100 may only overlap with the orthographic projection of the thin film transistor on the substrate 100 (see fig. 3 for a schematic structural diagram); in other embodiments of the present invention, the orthographic projection of the vent 500 on the substrate 100 may also at least partially overlap with the orthographic projection of the common electrode line 260 on the substrate 100 (the schematic structure is shown in fig. 4); in still other embodiments of the present invention, the ventilation hole may further include a first hole 510 and a second hole 520, where the front projection of the first hole 510 on the substrate 100 at least partially overlaps with the front projection of the thin film transistor on the substrate 100, and the front projection of the second hole 520 on the substrate 100 at least partially overlaps with the front projection of the common electrode line 26 on the substrate 100 (refer to fig. 5 for a schematic structure). As described above, the organic layers 400 of the first and second embodiments have similar effect on the discharge of small molecules of gas, and the third embodiment has better effect on the discharge of small molecules of gas because of the larger number of ventilation holes and larger total area.
According to the embodiment of the present invention, the type of the ventilation hole 500 is not particularly limited, and may be a through hole or a blind hole. When the ventilation holes 500 are through holes or blind holes, the effect of exhausting the small molecules is better, the formation process is simpler and the industrialization is easy, the schematic structure when the ventilation holes are through holes is shown in fig. 3, 4 and 5, and the schematic structure when the first holes 510 and the second holes 520 are blind holes is shown in fig. 7. Of course, it will be understood by those skilled in the art that, in the organic layer 400 of the array substrate of the present invention, the first holes 510 may be configured as through holes and the second holes 520 may be configured as blind holes; or the first holes 510 are provided as blind holes and the second holes 520 are provided as through holes; in addition, one or a plurality of first holes 510 in the array substrate may be through holes, and other first holes 510 may be blind holes; one or a plurality of second holes 520 are blind holes, and other second holes 520 are through holes, that is, any ventilation holes can be arranged as through holes in the array substrate of the invention; in the same way, any ventilation holes can be arranged as blind holes, and the specific structure of the blind holes is not repeated here.
According to an embodiment of the present invention, further, referring to fig. 5, the array substrate may satisfy at least one of the following conditions: width d of the bottom of the first hole 1 Less than the width D of the gate electrode in the thin film transistor 1 The method comprises the steps of carrying out a first treatment on the surface of the Width d of the bottom of the second hole 2 Is smaller than the width D of the common electrode line 2 . Thus, the ventilation holes can better function to expose the inside of the organic layer 400 to the external surface more as described above, and do not adversely affect the structure of the array substrate itself.
According to an embodiment of the present invention, referring still further to fig. 5 and 6, the array substrate may further satisfy at least one of the following conditions: the front projection of each thin film transistor on the substrate 100 at least partially overlaps with the front projection of one of the first holes 510 on the substrate 100 (see fig. 5 for a schematic structure); each three of the thin film transistors corresponds to one pixel unit (one pixel unit is shown by a dashed box in fig. 6), and the orthographic projection of the common electrode line corresponding to each pixel unit on the substrate is at least partially overlapped with the orthographic projection of one second hole 520 on the substrate (the schematic structural diagram refers to fig. 6). It should be noted that, in fig. 6, for convenience of illustration, only the positions of the first hole 510 and the second hole 520 are shown, and other structures are not shown, because the front projection of the first hole 510 on the substrate and the front projection of the thin film transistor on the substrate at least partially overlap; the front projection of the second hole 520 on the substrate and the front projection of the common electrode line on the substrate at least partially overlap, and a person skilled in the art can understand the positional relationship between the thin film transistor and the common electrode line according to the positional relationship between the first hole 510 and the second hole 520, and in addition, other structures in the conventional array substrate, such as the common electrode, are not shown in fig. 6, and will not be repeated here.
According to an embodiment of the present invention, referring still further to fig. 8, the array substrate may further include: a pixel electrode layer 600, the pixel electrode layer 600 being disposed on a portion of the thin film transistor array layer and the organic layer 400 remote from the substrate base 100 plate; and a common electrode layer 800, the common electrode layer 800 being disposed on a portion of the surface of the passivation layer 700 remote from the substrate base plate 100. Therefore, in the organic layer 400 of the array substrate, since the gas small molecules are well removed in the manufacturing process, even if a small amount of gas small molecules partially enter between the pixel electrode 600 and the passivation layer 700, the bulge is not formed therebetween, and the passivation layer 700 is not broken; in addition, since the ventilation holes are formed, the stress in the organic layer 400 can be well released, and the surface thereof is not easily bulged or broken.
According to the embodiments of the present invention, in addition, in the array substrate according to the present invention, those skilled in the art will understand that other conventional structures in the conventional array substrate may be further included, for example, in other embodiments of the present invention, an insulating layer may be provided between the thin film transistor array layer and the organic layer, and the structure and function of the insulating layer are the same as those of the insulating layer in the conventional array substrate, which will not be repeated herein.
In another aspect of the present invention, a method of fabricating the array substrate described above is provided. According to an embodiment of the invention, referring to fig. 9 and 10a, 10b, 10c, 10d, the method may comprise the steps of:
s100: a thin film transistor array layer is formed on one surface of the base substrate 100 (a schematic structure view is shown in fig. 10 a).
According to an embodiment of the present invention, each structure in the thin film transistor array layer, for example, the gate electrode 210, the active layer 230, the source electrode 240, the drain electrode 250, the gate insulating layer 220, the source line or the drain line 270, is formed on one surface of the substrate 100, and the specific process of the common electrode line 270 may be a conventional process, for example, the gate electrode 210, the source electrode 240, the drain electrode 250, the gate insulating layer 220, the source line or the drain line 270 may be formed by evaporation or deposition, the active layer 230 may be formed by a patterning process, and specific process conditions and parameters thereof may be flexibly selected according to actual needs by those skilled in the art, and will not be repeated here. Therefore, the method is simple and convenient to operate, easy to realize and easy for industrial production.
S200: a pre-formed film layer 399 is formed on the surface of the thin film transistor array layer 200 remote from the substrate base plate 100 (for a schematic structural view, see fig. 10 b).
The specific process for forming the prefabricated film layer 399 according to the embodiment of the present invention may be a conventional process, for example, it may be formed by evaporation or deposition, and specific process conditions and parameters thereof may be flexibly selected by those skilled in the art according to actual needs, which will not be described herein in detail. Therefore, the method is simple and convenient to operate, easy to realize and easy for industrial production.
S300: at least one ventilation hole (specifically, including the first hole 510 and the second hole 520) is formed in the prefabricated film layer 399, resulting in the organic layer 400 (for a schematic structural view, refer to fig. 10 c).
According to the embodiment of the present invention, the specific process for forming the ventilation holes in the prefabricated film 399 may be a conventional process, for example, it may be formed by setting a mask and then etching, or may be formed by directly hole digging, where specific process conditions and parameters are not particularly limited, and those skilled in the art may flexibly select according to actual needs, and will not be repeated here. Therefore, the method is simple and convenient to operate, easy to realize and easy for industrial production.
S400: a passivation layer 700 is formed on a surface of the organic layer 400 remote from the base substrate 100 (for a schematic structure, refer to fig. 10 d).
According to an embodiment of the present invention, the specific process for forming the passivation layer 700 on the surface of the organic layer 400 away from the substrate 100 may be a conventional process, for example, it may be formed by evaporation or deposition, and specific process conditions and parameters thereof may be flexibly selected by those skilled in the art according to actual needs, which will not be repeated herein. Therefore, the method is simple and convenient to operate, easy to realize and easy for industrial production.
In other embodiments of the present invention, referring to fig. 11 and 12a, 12b, 12c, the method may further comprise the steps of:
according to an embodiment of the present invention, before forming the passivation layer, the method may further include:
s500: a pixel electrode layer 600 is formed on a portion of the thin film transistor array layer and the organic layer 400 remote from the substrate base plate 100 (a schematic structure view referring to fig. 12 a).
According to the embodiment of the present invention, the specific process for forming the pixel electrode layer 600 on the surface of the thin film transistor array layer and the organic layer 400, which is away from the substrate 100, may be a conventional process, for example, it may be formed by evaporation or deposition, and specific process conditions and parameters thereof may be flexibly selected by those skilled in the art according to actual needs, and will not be repeated herein. Therefore, the method is simple and convenient to operate, easy to realize and easy for industrial production.
S600: a common electrode layer 800 is formed on a portion of the surface of the passivation layer 700 remote from the base substrate 100 (for a schematic structure, refer to fig. 12 c).
According to an embodiment of the present invention, since before this step, the method further includes S400: a passivation layer 700 is formed on the surface of the organic layer 400 remote from the substrate 100, so that after the pixel electrode layer 600 is formed as described above and then the passivation layer 700 is formed, the structure is schematically shown in fig. 12b.
According to an embodiment of the present invention, the specific process for forming the common electrode layer 800 on the surface of the passivation layer 700, which is away from the substrate 100, may be a conventional process, for example, it may be formed by evaporation or deposition, and specific process conditions and parameters thereof may be flexibly selected by those skilled in the art according to actual needs, and will not be described herein again. Therefore, the method is simple and convenient to operate, easy to realize and easy for industrial production.
In yet another aspect of the present invention, a liquid crystal display panel is provided. According to an embodiment of the present invention, the liquid crystal display panel includes the array substrate described above. The liquid crystal display panel has long service life, is not easy to generate cross color, has good display effect, has all the characteristics and advantages of the array substrate, and is not repeated here.
According to the embodiments of the present invention, the lcd panel includes other necessary structures and components besides the above-mentioned array substrate, such as color film substrates, etc., and those skilled in the art can make up and design according to the specific types and usage requirements of the lcd panel, which will not be repeated here.
In yet another aspect, the present invention provides a display device. According to an embodiment of the present invention, the display device includes the liquid crystal display panel described above. The display device has long service life, is not easy to generate cross color, has good display effect, has all the characteristics and advantages of the liquid crystal display panel, and is not repeated here.
According to the embodiments of the present invention, the display device includes other necessary structures and components besides the aforementioned lcd panel, and those skilled in the art can make up and design according to the specific type and use requirements of the display device, which will not be repeated here.
The specific kind of the display device according to the embodiment of the present invention is not particularly limited, and includes, for example, but not limited to, a mobile phone, a tablet computer, a wearable device, a game console, a television, a car-mounted display, or the like.
In the description of the present invention, it should be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.
Claims (10)
1. An array substrate, characterized by comprising:
a substrate base;
a thin film transistor array layer disposed on one surface of the substrate base plate;
an organic layer disposed on a portion of the surface of the thin film transistor array layer remote from the substrate base plate, and having at least one ventilation hole disposed therein; and
the passivation layer is arranged on the surface of the organic layer, which is far away from the substrate, and the whole passivation layer covers the inner wall of the air vent;
the thin film transistor array layer is provided with a plurality of thin film transistors which are arranged at intervals, and the orthographic projection of the air holes on the substrate is at least partially overlapped with the orthographic projection of the grid electrodes of the thin film transistors on the substrate.
2. The array substrate according to claim 1, wherein the thin film transistor array layer further has a plurality of common electrode lines disposed therein at intervals, and the orthographic projection of the vent holes on the substrate overlaps at least part of the orthographic projection of the common electrode lines on the substrate.
3. The array substrate of claim 2, wherein the vent holes comprise a first hole and a second hole, the orthographic projection of the first hole on the substrate at least partially overlaps with the orthographic projection of the thin film transistor on the substrate, and the orthographic projection of the second hole on the substrate at least partially overlaps with the orthographic projection of the common electrode line on the substrate.
4. The array substrate of claim 3, wherein at least one of the following conditions is satisfied:
the width of the bottom of the first hole is smaller than the width of the gate electrode in the thin film transistor;
the width of the bottom of the second hole is smaller than the width of the common electrode line.
5. The array substrate of claim 3, wherein at least one of the following conditions is satisfied:
the orthographic projection of each thin film transistor on the substrate is at least partially overlapped with the orthographic projection of one first hole on the substrate;
each three thin film transistors corresponds to a pixel unit, and the orthographic projection of the common electrode line corresponding to each pixel unit on the substrate is at least partially overlapped with the orthographic projection of one second hole on the substrate.
6. The array substrate of claim 1, further comprising:
a pixel electrode layer disposed on a portion of surfaces of the thin film transistor array layer and the organic layer remote from the substrate base plate; and
and a common electrode layer disposed on a portion of the passivation layer remote from the substrate base plate.
7. A method of manufacturing the array substrate of any one of claims 1 to 6, comprising:
forming a thin film transistor array layer on one surface of a substrate base plate;
forming a prefabricated film layer on the surface of the thin film transistor array layer far away from the substrate base plate;
forming at least one ventilation hole in the prefabricated film layer to obtain an organic layer;
a passivation layer is formed on a surface of the organic layer remote from the substrate base plate.
8. The method as recited in claim 7, further comprising:
forming a pixel electrode layer on a portion of surfaces of the thin film transistor array layer and the organic layer remote from the substrate base plate before forming the passivation layer;
a common electrode layer is formed on a portion of the surface of the passivation layer remote from the substrate base plate.
9. A liquid crystal display panel comprising the array substrate of any one of claims 1 to 6.
10. A display device comprising the liquid crystal display panel according to claim 9.
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| CN202010575268.3A CN113900293B (en) | 2020-06-22 | 2020-06-22 | Array substrate, manufacturing method thereof, liquid crystal display panel and display device |
| PCT/CN2021/093417 WO2021258893A1 (en) | 2020-06-22 | 2021-05-12 | Array substrate and manufacturing method therefor, liquid crystal display panel, and display device |
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| JP2002237594A (en) * | 2001-02-02 | 2002-08-23 | Internatl Business Mach Corp <Ibm> | Thin film transistor, method of manufacturing thin film transistor, and display device including thin film transistor |
| TWI228313B (en) * | 2003-11-21 | 2005-02-21 | Hannstar Display Corp | Pixel and repairing method thereof |
| WO2013057766A1 (en) * | 2011-10-20 | 2013-04-25 | パナソニック株式会社 | Thin-film transistor device and method for producing same |
| CN103296030B (en) * | 2012-07-25 | 2015-12-09 | 上海天马微电子有限公司 | TFT-LCD array substrate |
| KR20150011231A (en) * | 2013-07-22 | 2015-01-30 | 삼성디스플레이 주식회사 | Organic light emitting display apparatus and the manufacturing method thereof |
| KR102169034B1 (en) * | 2014-07-25 | 2020-10-23 | 엘지디스플레이 주식회사 | Display device and manufacturing for method of the same |
| JP2016045979A (en) * | 2014-08-19 | 2016-04-04 | ソニー株式会社 | Display device and electronic device |
| CN105161512B (en) * | 2015-08-03 | 2019-02-19 | 京东方科技集团股份有限公司 | Display substrate and method of making the same, display panel and method of making the same |
| CN106324933B (en) * | 2016-10-12 | 2019-08-13 | 深圳市华星光电技术有限公司 | Thin-film transistor array base-plate and preparation method thereof and liquid crystal display panel |
| CN106898617B (en) * | 2017-03-20 | 2020-06-30 | 合肥京东方光电科技有限公司 | Substrate, preparation method thereof, display panel and display device |
| CN107505762B (en) * | 2017-09-20 | 2021-04-06 | 京东方科技集团股份有限公司 | A COA substrate, display panel and display device |
| CN108461506A (en) * | 2018-03-27 | 2018-08-28 | 京东方科技集团股份有限公司 | A kind of array substrate and preparation method thereof, display device |
| CN109085713A (en) * | 2018-07-25 | 2018-12-25 | 深圳市华星光电半导体显示技术有限公司 | A kind of display panel and preparation method thereof |
| KR102643634B1 (en) * | 2018-12-04 | 2024-03-06 | 삼성디스플레이 주식회사 | Display panel |
| CN110718639A (en) * | 2019-09-25 | 2020-01-21 | 武汉华星光电半导体显示技术有限公司 | Display panel and display device |
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