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CN113889841A - Etch protection layer structure of metal-semiconductor junction and manufacturing method thereof - Google Patents

Etch protection layer structure of metal-semiconductor junction and manufacturing method thereof Download PDF

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Publication number
CN113889841A
CN113889841A CN202010632979.XA CN202010632979A CN113889841A CN 113889841 A CN113889841 A CN 113889841A CN 202010632979 A CN202010632979 A CN 202010632979A CN 113889841 A CN113889841 A CN 113889841A
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metal
etching
protection layer
layer
semiconductor
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吴侑伦
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LUXNET CORP
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LUXNET CORP
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/028Coatings ; Treatment of the laser facets, e.g. etching, passivation layers or reflecting layers
    • H01S5/0282Passivation layers or treatments
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

本发明公开一种金属半导体结的蚀刻保护层结构及其制造方法,其中该金属半导体结的蚀刻保护层结构,包括一半导体基板以及一金属蚀刻保护层。半导体基板具有一金属半导体接触层。金属蚀刻保护层设置于该金属半导体接触层之上,作为激光元件脊状结构在进行感应耦合等离子体反应离子蚀刻(ICP‑RIE)制作工艺的蚀刻掩模,在完成该蚀刻制作工艺后无需移除该金属蚀刻保护层。

Figure 202010632979

The invention discloses an etching protection layer structure of a metal-semiconductor junction and a manufacturing method thereof, wherein the etching protection layer structure of the metal-semiconductor junction comprises a semiconductor substrate and a metal etching protection layer. The semiconductor substrate has a metal-semiconductor contact layer. The metal etching protection layer is arranged on the metal-semiconductor contact layer, and is used as an etching mask for the ridge structure of the laser element in the inductively coupled plasma reactive ion etching (ICP-RIE) manufacturing process. Remove the metal etch protection layer.

Figure 202010632979

Description

Etching protection layer structure of metal semiconductor junction and manufacturing method thereof
Technical Field
The present invention relates to an etching protection layer of a METAL SEMICONDUCTOR JUNCTION (METAL SEMICONDUCTOR JUNCTION), and more particularly, to an etching protection layer structure of a METAL SEMICONDUCTOR JUNCTION and a method for fabricating the same.
Background
The highly doped contact layer of the metal semiconductor junction is susceptible to physical and chemical damage caused by the cleaning or etching process of the high power plasma during the production process of each fabrication process station. The surface defect density is increased or the surface of the contact layer is seriously damaged, so that the photoelectric characteristic of the element is changed, and even the electrical influence which cannot be remedied by a high-temperature annealing manufacturing process occurs.
Commonly used as etching Hard barrier layer (Hard Mask) material of ridge structure of laser device in inductively coupled plasma reactive ion etching (ICP-RIE) process, such as TiN, SiN, SiO2Etc., must be removed at the end of the fabrication process.
Disclosure of Invention
Titanium (Ti)/platinum (Pt) is used as an etching protective layer (edge metal) of a semiconductor contact layer above the ridge waveguide of the laser element, so that the surface is prevented from being damaged by high-power plasma in the manufacturing process, the photoelectric characteristic of the element is not influenced, and the risk of reliability is reduced.
The invention aims to provide an etching protective layer structure of a metal semiconductor junction and a manufacturing method thereof, wherein the metal etching protective layer can be used as an etching mask of a ridge-shaped structure of a laser element in an inductively coupled plasma reactive ion etching (ICP-RIE) manufacturing process.
The present invention provides an etching protection layer structure of metal semiconductor junction, which includes a semiconductor substrate and a metal etching protection layer. The semiconductor substrate has a metal semiconductor contact layer. The metal etching protective layer is arranged on the metal semiconductor contact layer and is used as an etching mask of the ridge-shaped structure of the laser element in an inductively coupled plasma reactive ion etching (ICP-RIE) manufacturing process, and the metal etching protective layer does not need to be removed after the etching manufacturing process is finished.
Compared with the prior etching Hard barrier layer (Hard Mask), the invention has the following advantages:
1. the metal etching protective layer can be used as an etching mask of a ridge-shaped structure of a laser element in an inductively coupled plasma reactive ion etching (ICP-RIE) manufacturing process, and the metal etching protective layer does not need to be removed after the etching manufacturing process is finished.
2. The etching protection layer (Ridge metal) can replace the material commonly used as the etching Hard barrier layer (Hard Mask) such as dielectric material TiN, SiN, SiO except for protecting the semiconductor contact layer from surface damage and defect formation caused by the influence of high-power plasma2And the like. The etching protection layer (Ridge metal) can satisfy the same blocking function as the etching mask of dielectric material, and can be used for manufacturing Ridge waveguide (laser Ridge waveguide) of laser element in ICP-RIE dry etching process, thereby achieving the effect of integrating the protection layer and the etching mask into a whole and having two purposes, and after the dry etching process is completed, the etching mask is not needed to be etchedThe etch resist (ridge metal) is removed and the dielectric etch mask must be removed at the end of the fabrication process.
Drawings
FIG. 1 is a schematic diagram of an etching protection layer structure of a metal-semiconductor junction according to the present invention;
FIGS. 2 to 5 are schematic views illustrating a method for fabricating an etching protection layer structure of a metal semiconductor junction according to the present invention;
FIG. 6 is a flow chart of a method for fabricating an etching protection layer structure of a metal-semiconductor junction according to the present invention.
Description of the symbols
10: semiconductor substrate
12. 22: metal semiconductor contact layer
20: ridge structure
30: photoresist
32: metal etching protective layer pattern
40: metal protective layer
42: metal etching protective layer
S10-S40: step (ii) of
Detailed Description
The etching protection layer structure of the metal semiconductor junction and the manufacturing method thereof have the etching protection layer which is used as an etching mask of the ridge structure of the laser element in the manufacturing process of inductively coupled plasma reactive ion etching (ICP-RIE), and the metal etching protection layer does not need to be removed after the etching manufacturing process is finished.
Fig. 1 is a schematic view of an etching protection layer structure of a metal-semiconductor junction according to the present invention, as shown in fig. 1, a semiconductor substrate 10 having a metal-semiconductor contact layer 22. The semiconductor substrate 10 may be a silicon, germanium or group III-V semiconductor including GaAs gallium arsenide or GaN gallium nitride or InP indium phosphide.
A metal etching protection layer 42 disposed on the metal semiconductor contact layer 22, which is used as an etching mask for the ridge-shaped structure 20 of the laser device in the inductively coupled plasma reactive ion etching (ICP-RIE) process, and the metal etching protection layer 42 is not required to be removed after the etching process is completed. The metal etch protective layer 42 is a P-type metal of platinum (Pt), titanium (Ti)/platinum (Pt), or titanium (Ti)/platinum (Pt)/gold (Au). Titanium (Ti)/platinum (Pt) metal is used as an etch protection layer (ridge metal) for the semiconductor contact layer 22 over the ridge structure 20 (waveguide).
Fig. 2 to 5 are schematic views illustrating a method for fabricating an etching protection layer structure of a metal semiconductor junction according to the present invention. First, as shown in fig. 2, a semiconductor substrate 10 having a metal semiconductor contact layer 12 is provided.
Then, a photolithography process is used to define a metal etching protection layer pattern 32 on the semiconductor substrate 10. The pretreatment process of the manufacturing process is to remove the surface oxide layer of the semiconductor substrate 10. Then, a photoresist 30 is coated on the semiconductor substrate 10. A photomask is used to expose the photoresist 30 to light to define the metal etching protection layer pattern 32, and the photoresist 30 is developed to form the metal etching protection layer pattern 32, as shown in fig. 3.
Next, as shown in fig. 4, a metal passivation layer 40 is deposited on the metal etching passivation layer pattern 32. The surface contaminants and oxide layer of the semiconductor substrate 10 are removed by dry etching and wet etching processes before deposition, and then the metal passivation layer 40 is deposited by using an electron beam evaporator, wherein the metal passivation layer 40 is a P-type metal of platinum (Pt), titanium (Ti)/platinum (Pt) or titanium (Ti)/platinum (Pt)/gold (Au). The P-type electrode metal is usually selected in consideration of work function of a junction with a semiconductor, and a metal alloy of gold-zinc (Au-Zn)/gold (Au) or titanium (Ti)/platinum (Pt)/gold (Au) is usually used for the P-type electrode metal. Gold-zinc (Au-Zn)/gold (Au) is an alloy ohmic contact (ohmic contact) and each layer is deposited on a cladding layer or a metal contact layer (metal contact layer) by evaporation, and the alloy needs to be heated to 350-400 ℃ for 30 minutes to form a good ohmic contact.
Next, as shown in fig. 5, the metal passivation layer 40 except the metal etching protection layer pattern 32 is removed to form a metal etching protection layer 42. After the metal passivation layer 40 is deposited by an electron beam evaporation machine, a metal lift-off process (lift-off) is used to remove the metal outside the defined region, thereby completing the fabrication of the metal etching passivation layer 42. The metal etching protection layer 42 serves as an etching mask for the ridge-shaped structure 20 of the laser device during the inductively coupled plasma reactive ion etching (ICP-RIE) process, and the metal etching protection layer 42 does not need to be removed after the etching process is completed, as shown in fig. 1.
FIG. 6 is a flow chart of a method for fabricating an etching protection layer structure of a metal-semiconductor junction according to the present invention. First, a semiconductor substrate having a metal-semiconductor contact layer is provided, as shown in step S10. Next, a metal etching protection layer pattern is defined on the semiconductor substrate, as shown in step S20. Next, a metal passivation layer is deposited on the metal etching passivation layer pattern, as shown in step S30. Finally, the metal passivation layer outside the metal etching passivation layer pattern is removed to form a metal etching passivation layer, as shown in step S40.

Claims (7)

1. An etching protection layer structure of a metal semiconductor junction, comprising:
a semiconductor substrate having a metal semiconductor contact layer; and
and the metal etching protective layer is arranged on the metal semiconductor contact layer and is used as an etching mask of the ridge structure of the laser element in the manufacturing process of inductively coupled plasma reactive ion etching (ICP-RIE), and the metal etching protective layer does not need to be removed after the etching manufacturing process is finished.
2. The structure of claim 1, wherein the metal etching passivation layer is formed by defining a metal etching passivation layer pattern on the semiconductor substrate, depositing a metal passivation layer on the metal etching passivation layer pattern, and removing the metal passivation layer except the metal etching passivation layer pattern.
3. The etching protection layer structure of metal-semiconductor junction according to claim 1, wherein the metal etching protection layer is a P-type metal of platinum (Pt), titanium (Ti)/platinum (Pt) or titanium (Ti)/platinum (Pt)/gold (Au).
4. A manufacturing method of an etching protection layer structure of a metal semiconductor junction comprises the following steps:
providing a semiconductor substrate with a metal semiconductor contact layer; defining a metal etching protection layer pattern on the semiconductor substrate;
depositing a metal protection layer on the metal etching protection layer pattern; and
removing the metal protection layer outside the metal etching protection layer pattern to form a metal etching protection layer.
5. The method of claim 4, wherein the step of defining the metal etching protection layer pattern comprises the steps of:
removing the surface oxide layer of the semiconductor substrate;
coating photoresist on the semiconductor substrate;
exposing on the photoresist using a photomask to define the metal etching protection layer pattern; and developing the photoresist to form the metal etching protection layer pattern.
6. The method for fabricating an etching protection layer structure of a metal semiconductor junction according to claim 4, wherein the step of depositing the metal protection layer comprises the steps of:
removing surface contaminants and an oxide layer of the semiconductor substrate by dry etching and wet etching before deposition; and
the metal protection layer is deposited using an electron beam evaporator, and is a P-type metal of platinum (Pt), titanium (Ti)/platinum (Pt), or titanium (Ti)/platinum (Pt)/gold (Au).
7. The method according to claim 4, wherein the metal etching protection layer is used as an etching mask for performing an inductively coupled plasma reactive ion etching (ICP-RIE) process on the ridge structure of the laser device without removing the metal etching protection layer after the etching process is completed.
CN202010632979.XA 2020-07-02 2020-07-02 Etch protection layer structure of metal-semiconductor junction and manufacturing method thereof Withdrawn CN113889841A (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101247022A (en) * 2007-02-14 2008-08-20 陈伟立 Method for manufacturing split mirror surface in gallium nitride semiconductor element
CN101276993A (en) * 2006-10-16 2008-10-01 三菱电机株式会社 Method of manufacturing semiconductor optical element
CN101330131A (en) * 2007-06-20 2008-12-24 中国南玻集团股份有限公司 Organic electroluminescent display device, transparent conductive film substrate and manufacturing method
CN105449521A (en) * 2014-09-10 2016-03-30 中国科学院上海微系统与信息技术研究所 Manufacturing method of semi-insulating surface plasma waveguide Terahertz quantum cascaded laser device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101276993A (en) * 2006-10-16 2008-10-01 三菱电机株式会社 Method of manufacturing semiconductor optical element
CN101247022A (en) * 2007-02-14 2008-08-20 陈伟立 Method for manufacturing split mirror surface in gallium nitride semiconductor element
CN101330131A (en) * 2007-06-20 2008-12-24 中国南玻集团股份有限公司 Organic electroluminescent display device, transparent conductive film substrate and manufacturing method
CN105449521A (en) * 2014-09-10 2016-03-30 中国科学院上海微系统与信息技术研究所 Manufacturing method of semi-insulating surface plasma waveguide Terahertz quantum cascaded laser device

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