CN113866506A - Test fixture contact impedance detection method and device - Google Patents
Test fixture contact impedance detection method and device Download PDFInfo
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- CN113866506A CN113866506A CN202111114114.5A CN202111114114A CN113866506A CN 113866506 A CN113866506 A CN 113866506A CN 202111114114 A CN202111114114 A CN 202111114114A CN 113866506 A CN113866506 A CN 113866506A
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
- G01R27/08—Measuring resistance by measuring both voltage and current
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Abstract
The invention provides a method and a device for detecting contact impedance of a test fixture, wherein the method comprises the following steps: obtaining contact impedance information of the test fixture in a normal yield mass production environment; deriving contact impedance information of the test fixture; and analyzing the contact impedance information of the test fixture, and determining the pins with the contact impedance not meeting the requirements or the platform with the abnormal test environment according to the contact impedance information of the test fixture. According to the test fixture contact impedance information under the normal yield volume production environment, the poor pin name (pin name) of the contact impedance or the abnormal platform of the test environment can be quickly analyzed and positioned, and the equipment engineer can quickly replace/maintain the test fixture conveniently.
Description
Technical Field
The invention belongs to the field of chip testing, and particularly relates to a method and a device for detecting contact impedance of a test fixture.
Background
In mass production tests, poor contact between the Test fixture and the Device Under Test (DUT) is often caused by mounting (setup) and hardware aging, which causes a low yield (low yield) phenomenon in various tests. Certain contact gaps (gaps) often exist among the test devices, and misjudgment is easily brought to a front-end engineer, so that the operation efficiency is influenced. Usually, Automatic Test Equipment (ATE) can only detect the level from the Test head (testhead) to the Test fixture, but the level from the Test fixture to the Device Under Test (DUT) cannot be covered (cover).
Disclosure of Invention
The embodiment of the application provides a method and a device for detecting contact impedance of a test fixture, which can quickly analyze and position a pin name (pin name) with poor contact impedance or a platform with abnormal test environment according to the contact impedance information of the test fixture in a normal yield mass production environment, and are convenient for quick replacement/maintenance of equipment engineers.
In a first aspect, an embodiment of the present application provides a method for detecting contact impedance of a test fixture, including:
obtaining contact impedance information of the test fixture in a normal yield mass production environment;
deriving contact impedance information of the test fixture;
and analyzing the contact impedance information of the test fixture, and determining the pins with the contact impedance not meeting the requirements or the platform with the abnormal test environment according to the contact impedance information of the test fixture.
Wherein, obtain test fixture contact impedance information under normal yield volume production environment, include:
transmitting a first preset current to a tested chip, detecting all test pin voltages of the tested chip, and storing the test pin voltages in a first array;
transmitting a second preset current to the tested chip, detecting all test pin voltages of the tested chip, and storing the test pin voltages in a second array;
subtracting the first test pin voltage in the second array from the first test pin voltage in the first array, and dividing the first test pin voltage by a current difference to obtain the contact impedance of the first test pin, wherein the current difference is obtained by subtracting the first preset current from the second preset current, and the method of the step is used for calculating the contact impedance of all test pins of the tested chip;
and recording the contact impedance of all the test pins of the tested chip into a data log file.
Deriving the test fixture contact impedance information includes:
and deriving the test fixture contact impedance information in an STDF or CSV format.
Wherein, analyze test fixture contact impedance information includes:
and analyzing the contact impedance information of the test fixture by using mini table software.
The first preset current is 1 milliamp, and the second preset current is 10 milliamps.
In a second aspect, the present application provides a test fixture contact impedance detection apparatus, comprising:
the acquisition unit is used for acquiring contact impedance information of the test fixture in a normal yield mass production environment;
the derivation unit is used for deriving the contact impedance information of the test fixture;
and the analysis unit is used for analyzing the contact impedance information of the test fixture and determining the pins with the contact impedance not meeting the requirements or the platform with abnormal test environment according to the contact impedance information of the test fixture.
Wherein the acquisition unit is configured to:
transmitting a first preset current to a tested chip, detecting all test pin voltages of the tested chip, and storing the test pin voltages in a first array;
transmitting a second preset current to the tested chip, detecting all test pin voltages of the tested chip, and storing the test pin voltages in a second array;
subtracting the first test pin voltage in the second array from the first test pin voltage in the first array, and dividing the first test pin voltage by a current difference to obtain the contact impedance of the first test pin, wherein the current difference is obtained by subtracting the first preset current from the second preset current, and the method of the step is used for calculating the contact impedance of all test pins of the tested chip;
and recording the contact impedance of all the test pins of the tested chip into a data log file.
Wherein the deriving unit is configured to:
and deriving the test fixture contact impedance information in an STDF or CSV format.
In a third aspect, the present application provides a computer-readable storage medium, on which a computer program is stored, and the computer program is used for implementing the steps of any one of the above methods when executed by a processor.
In a fourth aspect, an embodiment of the present application provides a testing apparatus, including any one of the testing fixture contact impedance detection devices described above.
The method and the device for detecting the contact impedance of the test fixture have the following beneficial effects:
the contact impedance detection method of the test fixture comprises the following steps: obtaining contact impedance information of the test fixture in a normal yield mass production environment; deriving contact impedance information of the test fixture; and analyzing the contact impedance information of the test fixture, and determining the pins with the contact impedance not meeting the requirements or the platform with the abnormal test environment according to the contact impedance information of the test fixture. According to the test fixture contact impedance information under the normal yield volume production environment, the poor pin name (pin name) of the contact impedance or the abnormal platform of the test environment can be quickly analyzed and positioned, and the equipment engineer can quickly replace/maintain the test fixture conveniently.
Drawings
FIG. 1 is a schematic flow chart illustrating a method for detecting contact impedance of a test fixture according to an embodiment of the present disclosure;
FIG. 2 is a schematic view illustrating another process of the contact impedance detection method of the test fixture according to the embodiment of the present application;
fig. 3 is a schematic structural diagram of a contact impedance detection device of a test fixture according to an embodiment of the present application.
Detailed Description
The present application is further described with reference to the following figures and examples.
In the following description, the terms "first" and "second" are used for descriptive purposes only and are not intended to indicate or imply relative importance. The following description provides embodiments of the invention, which may be combined or substituted for various embodiments, and this application is therefore intended to cover all possible combinations of the same and/or different embodiments described. Thus, if one embodiment includes feature A, B, C and another embodiment includes feature B, D, then this application should also be considered to include an embodiment that includes one or more of all other possible combinations of A, B, C, D, even though this embodiment may not be explicitly recited in text below.
The following description provides examples, and does not limit the scope, applicability, or examples set forth in the claims. Changes may be made in the function and arrangement of elements described without departing from the scope of the disclosure. Various examples may omit, substitute, or add various procedures or components as appropriate. For example, the described methods may be performed in an order different than the order described, and various steps may be added, omitted, or combined. Furthermore, features described with respect to some examples may be combined into other examples.
In mass production tests, poor contact between the Test fixture and the Device Under Test (DUT) is often caused by mounting (setup) and hardware aging, which causes a low yield (low yield) phenomenon in various tests. Certain contact gaps (gaps) often exist among various testing devices (here, the phenomenon that contact impedances are inconsistent exists among different machine stations of the same type), and misjudgment is easily brought to a front-end engineer, so that the operation efficiency is influenced. Usually, Automatic Test Equipment (ATE) can only detect the level from the Test head (testhead) to the Test fixture, but the level from the Test fixture to the Device Under Test (DUT) cannot be covered (cover).
In semiconductor testing, a DUT represents a particular die on a wafer or final package component. The package components are connected to manual or Automatic Test Equipment (ATE) using a connection system that applies power to them, provides analog signals, and measures and evaluates the resulting output of the device in such a way as to determine the quality of a particular device under test.
As shown in fig. 1-2, the method for detecting contact impedance of a test fixture of the present application includes: s101, obtaining contact impedance information of the test fixture in a normal yield mass production environment; s103, deriving contact impedance information of the test fixture; and S105, analyzing the contact impedance information of the test fixture, and determining the pins with the contact impedance not meeting the requirements or the platform with abnormal test environment according to the contact impedance information of the test fixture. Each step is described separately below.
S101, obtaining contact impedance information of the test fixture in a normal yield mass production environment.
The method comprises the following steps: transmitting a first preset current to the tested chip, detecting all test pin voltages of the tested chip, and storing the test pin voltages into a first array; transmitting a second preset current to the tested chip, detecting all test pin voltages of the tested chip, and storing the test pin voltages into a second array; subtracting the first test pin voltage in the second array from the first test pin voltage in the first array, and dividing the first test pin voltage by the current difference to obtain the contact impedance of the first test pin, wherein the current difference is obtained by subtracting the first preset current from the second preset current, and the contact impedance of all test pins of the tested chip is calculated by using the method in the step; and recording the contact impedance of all the test pins of the tested chip into a data log file.
The principle of the application is as follows:
(1) according to ohm's law, I is U/R, and the formula is transformed into R is U/I;
(2) is available from R ═ U/I, R ═ Δ U/Δ I;
(3) according to the formula, the impedance R measurement scheme is as follows:
1. filling (i.e. transmitting) 1 milliampere current into the chip, and testing the voltage of all chip test pins to obtain an array Vout1 mA; the 1ma is merely an example, and the current can be set according to actual needs.
2. Filling 10 milliampere current, and testing the voltage of all chip test pins to obtain an array Vout10 mA; the 10 milliamps are only examples, and the current can be set according to actual needs.
3. Each pins impedance R is then equal to each pin voltage value in array Vout1 mA-each pin in array Vout10mA divided by the current difference 9 mA; for example: pin 1: when the current of 1 milliampere is filled, the voltage of the pin 1 is measured to be 20MV, and when the current of 10 milliampere is filled, the voltage of the pin 1 is measured to be 5MV, and then the contact impedance R is (20-5)/(10-1) to be 1.667 omega;
4. the impedance value of each pin pins is recorded into datalog, and is conveniently derived in the format of STDF/CSV and the like.
And S103, deriving the contact impedance information of the test fixture.
And (4) deriving the contact impedance information of the test fixture in an STDF or CSV format.
Stdf (standard Test Data file), a standard Test Data file, is a storage specification of chip Test Data in the semiconductor industry, and was released by Teradyne in 1985, and has been developed for nearly 40 years so far, and is mature. Because the unified format/specification is adopted to store all types of test data generated by CP or FT chip test, the problem that the test data formats generated by different brands of test machines in the chip test industry are not uniform is solved, so that the standard is regarded as a practical industrial standard in the semiconductor industry, regardless of a test machine supplier, a chip test company or a chip design company, and the standard is accepted by the company.
Comma Separated Values (CSV, sometimes also called character Separated Values because the Separated characters may not be commas) whose file stores table data (numbers and text) in plain text form. Plain text means that the file is a sequence of characters, containing no data that must be interpreted like binary digits. CSV files are composed of any number of records, and the records are separated by a certain linefeed character; each record is made up of fields, and separators between fields are other characters or strings, most commonly commas or tabs. Typically, all records have identical field sequences, typically plain text files.
And S105, analyzing the contact impedance information of the test fixture, and determining the pins with the contact impedance not meeting the requirements or the platform with abnormal test environment according to the contact impedance information of the test fixture.
And analyzing the contact impedance information of the test fixture by using mini table software.
In the application, the contact impedance information of the test fixture in the normal yield mass production environment is obtained, and formats such as STDF or CSV can be derived so as to analyze data by using professional drawing software such as mini table; can be according to the data of deriving, quick analysis fixes a position out the relatively poor pin (pin) name of contact impedance or the unusual platform of test environment, and the equipment engineer's quick replacement/maintenance of being convenient for improves the accuracy of operating efficiency and test.
As shown in fig. 3, the contact impedance detecting device of the testing fixture of the present application includes: an obtaining unit 201, configured to obtain contact impedance information of a test fixture in a normal yield mass production environment; a deriving unit 202, configured to derive test fixture contact impedance information; the analysis unit 203 is configured to analyze the contact impedance information of the test fixture, and determine a pin with a contact impedance that does not meet the requirement or a platform with an abnormal test environment according to the contact impedance information of the test fixture.
Wherein the acquisition unit is configured to:
transmitting a first preset current to the tested chip, detecting all test pin voltages of the tested chip, and storing the test pin voltages into a first array;
transmitting a second preset current to the tested chip, detecting all test pin voltages of the tested chip, and storing the test pin voltages into a second array;
subtracting the first test pin voltage in the second array from the first test pin voltage in the first array, and dividing the first test pin voltage by the current difference to obtain the contact impedance of the first test pin, wherein the current difference is obtained by subtracting the first preset current from the second preset current, and the contact impedance of all test pins of the tested chip is calculated by using the method in the step;
and recording the contact impedance of all the test pins of the tested chip into a data log file.
Wherein the deriving unit is configured to:
and (4) deriving the contact impedance information of the test fixture in an STDF or CSV format.
In the present application, the embodiment of the testing fixture contact impedance detection apparatus is basically similar to the embodiment of the testing fixture contact impedance detection method, and reference is made to the description of the embodiment of the testing fixture contact impedance detection method for related points.
The application also provides a test device which comprises any one test fixture contact impedance detection device.
It is clear to a person skilled in the art that the solution according to the embodiments of the invention can be implemented by means of software and/or hardware. The "unit" and "module" in this specification refer to software and/or hardware that can perform a specific function independently or in cooperation with other components, where the hardware may be, for example, an FPGA (Field-Programmable Gate Array), an IC (Integrated Circuit), or the like.
The embodiment of the invention also provides a computer readable storage medium, which stores a computer program, and the program realizes the steps of the contact impedance detection method of the test fixture when being executed by a processor. The computer-readable storage medium may include, but is not limited to, any type of disk including floppy disks, optical disks, DVD, CD-ROMs, microdrive, and magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, DRAMs, VRAMs, flash memory devices, magnetic or optical cards, nanosystems (including molecular memory ICs), or any type of media or device suitable for storing instructions and/or data.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described device embodiments are merely illustrative, for example, the division of the unit is only a logical functional division, and there may be other division ways in actual implementation, such as: multiple units or components may be combined, or may be integrated into another system, or some features may be omitted, or not implemented. In addition, the coupling, direct coupling or communication connection between the components shown or discussed may be through some interfaces, and the indirect coupling or communication connection between the devices or units may be electrical, mechanical or other forms.
All functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may be separately used as one unit, or two or more units may be integrated into one unit; the integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A method for detecting contact impedance of a test fixture is characterized by comprising the following steps:
obtaining contact impedance information of the test fixture in a normal yield mass production environment;
deriving contact impedance information of the test fixture;
and analyzing the contact impedance information of the test fixture, and determining the pins with the contact impedance not meeting the requirements or the platform with the abnormal test environment according to the contact impedance information of the test fixture.
2. The method as claimed in claim 1, wherein the obtaining of the contact impedance information of the test fixture in a normal yield mass production environment comprises:
transmitting a first preset current to a tested chip, detecting all test pin voltages of the tested chip, and storing the test pin voltages in a first array;
transmitting a second preset current to the tested chip, detecting all test pin voltages of the tested chip, and storing the test pin voltages in a second array;
subtracting the first test pin voltage in the second array from the first test pin voltage in the first array, and dividing the first test pin voltage by a current difference to obtain the contact impedance of the first test pin, wherein the current difference is obtained by subtracting the first preset current from the second preset current, and the method of the step is used for calculating the contact impedance of all test pins of the tested chip;
and recording the contact impedance of all the test pins of the tested chip into a data log file.
3. The method for detecting contact impedance of test fixture according to claim 1 or 2, wherein deriving the contact impedance information of test fixture comprises:
and deriving the test fixture contact impedance information in an STDF or CSV format.
4. The method as claimed in any one of claims 1 to 3, wherein analyzing the contact impedance information of the test fixture comprises:
and analyzing the contact impedance information of the test fixture by using mini table software.
5. The method as claimed in any one of claims 1 to 3, wherein the first predetermined current is 1mA and the second predetermined current is 10 mA.
6. The utility model provides a test fixture contact impedance detection device which characterized in that includes:
the acquisition unit is used for acquiring contact impedance information of the test fixture in a normal yield mass production environment;
the derivation unit is used for deriving the contact impedance information of the test fixture;
and the analysis unit is used for analyzing the contact impedance information of the test fixture and determining the pins with the contact impedance not meeting the requirements or the platform with abnormal test environment according to the contact impedance information of the test fixture.
7. The device for detecting the contact impedance of the test fixture according to claim 6, wherein the obtaining unit is configured to:
transmitting a first preset current to a tested chip, detecting all test pin voltages of the tested chip, and storing the test pin voltages in a first array;
transmitting a second preset current to the tested chip, detecting all test pin voltages of the tested chip, and storing the test pin voltages in a second array;
subtracting the first test pin voltage in the second array from the first test pin voltage in the first array, and dividing the first test pin voltage by a current difference to obtain the contact impedance of the first test pin, wherein the current difference is obtained by subtracting the first preset current from the second preset current, and the method of the step is used for calculating the contact impedance of all test pins of the tested chip;
and recording the contact impedance of all the test pins of the tested chip into a data log file.
8. The device for detecting the contact impedance of the test fixture according to claim 7, wherein the deriving unit is configured to:
and deriving the test fixture contact impedance information in an STDF or CSV format.
9. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 5.
10. A test apparatus comprising the test fixture contact impedance detection device of any one of claims 6-8.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5365180A (en) * | 1993-04-16 | 1994-11-15 | National Semiconductor Corporation | Method for measuring contact resistance |
| CN109142876A (en) * | 2018-10-31 | 2019-01-04 | 于创宇 | Resistance measuring circuit and resistivity-measuring devices |
| CN110568340A (en) * | 2019-08-22 | 2019-12-13 | 苏州浪潮智能科技有限公司 | Impedance test structure, device and method |
| CN111007319A (en) * | 2019-12-05 | 2020-04-14 | 上海华力集成电路制造有限公司 | Detection circuit and method for socket probe yield |
-
2021
- 2021-09-23 CN CN202111114114.5A patent/CN113866506A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5365180A (en) * | 1993-04-16 | 1994-11-15 | National Semiconductor Corporation | Method for measuring contact resistance |
| CN109142876A (en) * | 2018-10-31 | 2019-01-04 | 于创宇 | Resistance measuring circuit and resistivity-measuring devices |
| CN110568340A (en) * | 2019-08-22 | 2019-12-13 | 苏州浪潮智能科技有限公司 | Impedance test structure, device and method |
| CN111007319A (en) * | 2019-12-05 | 2020-04-14 | 上海华力集成电路制造有限公司 | Detection circuit and method for socket probe yield |
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