CN113823637A

CN113823637A - electronic device

Info

Publication number: CN113823637A
Application number: CN202010563199.4A
Authority: CN
Inventors: 林冠峄; 卢俊宇
Original assignee: E Ink Holdings Inc
Current assignee: E Ink Holdings Inc
Priority date: 2020-06-19
Filing date: 2020-06-19
Publication date: 2021-12-21
Anticipated expiration: 2040-06-19
Also published as: CN113823637B

Abstract

The invention discloses an electronic device, comprising a flexible substrate, anisotropic conductive adhesive and electronic components. The flexible substrate includes an active region, bonding pads, and a plurality of protrusions on the bonding pads. The anisotropic conductive adhesive includes a plurality of conductive particles, wherein the conductive particles contact the protrusions. The anisotropic conductive adhesive is located between the bonding pads of the flexible substrate and the electronic components. By arranging the protrusions on the bonding pads of the flexible substrate, the contact area between the conductive particles of the anisotropic conductive adhesive and the flexible substrate can be increased. By contacting the conductive particles with the protrusions, the deformation amount of the conductive particles can be increased, thereby improving the bonding stability between the electronic device and the flexible substrate. In addition, in the embodiment in which the conductive particles have an insulating layer, the provision of protrusions is also beneficial to break through the insulating layer. In this way, during the bonding process, the external force required to achieve effective contact between the electronic component and the flexible substrate can be reduced, thus avoiding the collapse of the bonding pads of the flexible substrate.

Description

Electronic device

Technical Field

The present invention relates to an electronic device, and more particularly, to an electronic device having a protrusion on a bonding pad.

Background

In order to make the conductive particles in the anisotropic conductive adhesive effectively deformable and contact with the conductive layer of the bonding pad, the surface of the bonding pad in the conventional electronic device is flat, and the conductive particles and the bonding pad must have a sufficient contact area to achieve effective contact. To ensure effective contact between the conductive particles and the bond pads, a large bonding pressure is required. In electronic devices employing flexible substrates, the large bonding pressure may cause the bonding pad region of the flexible substrate to sag.

In view of the above, it is still one of the objectives of the present invention to provide a flexible substrate that can prevent the flexible substrate from collapsing due to the bonding pressure.

Disclosure of Invention

The invention aims to provide an electronic device capable of preventing a bonding pad of a flexible substrate from collapsing.

In one embodiment, an electronic device includes a flexible substrate, an anisotropic conductive film, and an electronic component. The flexible substrate comprises an active region, a bonding pad and a plurality of protrusions positioned on the bonding pad. The anisotropic conductive paste includes a plurality of conductive particles, wherein the conductive particles contact the protrusions. The anisotropic conductive adhesive is positioned between the bonding pad of the flexible substrate and the electronic element.

In one embodiment, each protrusion has a width in a range of 1 to 2 microns.

In one embodiment, each protrusion has a height, the height being in a range of 0.1 microns to 1 micron.

In one embodiment, adjacent two of the protrusions have a spacing therebetween, the spacing being in a range of 1.2 microns to 2 microns.

In one embodiment, each protrusion has a width, each conductive particle has a diameter, the width is greater than 20% of the diameter, and the width is less than 3 times the diameter.

In one embodiment, each protrusion has a height, each conductive particle has a diameter, the height is greater than 5% of the diameter, and the height is less than 30% of the diameter.

In one embodiment, adjacent two of the protrusions have a spacing therebetween, each of the conductive particles has a diameter, the spacing is greater than 50% of the diameter of the conductive particle, and the spacing is less than 3 times the diameter of the conductive particle.

In one embodiment, the conductive particles have a deformation amount greater than 15%.

In one embodiment, the protrusion comprises a passivation layer having a thickness in a range of 0.3 to 0.4 microns.

In one embodiment, the passivation layer has a plurality of segments.

In one embodiment, the protrusion comprises a gate insulation layer having a thickness in a range of 0.3 to 0.4 microns.

In one embodiment, the gate insulating layer has a plurality of segments.

In one embodiment, the segments of the gate insulating layer respectively overlap with the segments of the gate insulating layer in a vertical projection of the flexible substrate.

In one embodiment, a portion of the passivation layer is located between two adjacent ones of the segments of the gate insulation layer and extends onto the bond pad.

In one embodiment, the protrusion further includes an amorphous silicon layer between the passivation layer and the gate insulating layer, the amorphous silicon layer having a thickness in a range of 0.05 to 0.15 micrometers.

In one embodiment, the passivation layer has a plurality of segments and the amorphous silicon layer has a plurality of segments.

In an embodiment, a vertical projection of the section of the passivation layer on the flexible substrate at least partially overlaps a vertical projection of the section of the amorphous silicon layer on the flexible substrate.

In one embodiment, the gate insulating layer has a plurality of segments, the segments of the gate insulating layer overlap the segments of the gate insulating layer in a vertical projection of the flexible substrate, and the segments of the gate insulating layer overlap the segments of the amorphous silicon layer in a vertical projection of the flexible substrate.

In one embodiment, the protrusion further includes a gate insulating layer and an amorphous silicon layer between the passivation layer and the gate insulating layer, wherein the gate insulating layer has a plurality of segments and the amorphous silicon layer has a plurality of segments.

In the above embodiments, by disposing the protrusion on the bonding pad of the flexible substrate, the contact area between the conductive particles of the anisotropic conductive paste and the flexible substrate can be increased. In other words, by contacting the conductive particles with the protrusions, the amount of deformation of the conductive particles can be increased, thereby improving the bonding stability between the electronic device and the flexible substrate. Furthermore, in embodiments where the conductive particles have an insulating layer, the provision of the protrusions also facilitates breaching of the insulating layer. Therefore, in the bonding process, the external force required to be applied to achieve effective contact between the electronic element and the flexible substrate can be reduced, so that the bonding pad of the flexible substrate can be prevented from collapsing.

Drawings

Fig. 1 is a cross-sectional view of an electronic device according to an embodiment of the invention.

Fig. 2A is an enlarged view of region a in fig. 1.

Fig. 2B is an enlarged view of region B in fig. 1.

Fig. 3 is a cross-sectional view of a flexible substrate according to an embodiment of the invention.

Fig. 4A is a top view of a flexible substrate according to an embodiment of the invention, wherein a portion of the active region is omitted.

Fig. 4B is a top view of a flexible substrate according to an embodiment of the invention, wherein a portion of the active region is omitted.

Fig. 5 is a partially enlarged view of the protrusion and the bonding pad of fig. 3.

Fig. 6A to 6F are cross-sectional views of a protrusion and a bonding pad according to various embodiments of the invention.

Description of the main reference numerals:

10-an electronic device; 100,100 a-a flexible substrate; 102-a first metal layer; 104,104S, 104D-a second metal layer; 106-a third metal layer; 108-a protective layer; 110,110a,110b,110c,110d,110e,110f,110 g-protrusions; 112, 122-gate insulation layer; 112S — upper surface; 112W-side wall; 1122A, 1122B, 1122C-section; 114, 124-amorphous silicon layer; 114S — upper surface; 114W-side wall; 1142A, 1142B, 1142C-segment; 116, 126-passivation layer; 116S — upper surface; 116W-side wall; 200-anisotropic conductive adhesive; 210-conductive particles; 212-an insulating layer; 214-a metal layer; 216-a resin; 300-an electronic component; 310-electrical connectors; a, B-region; a BP-bond pad; AA-active region; DA-diameter; h-height; w-width; d-spacing; i1-space; i2-space; d1-first direction; d2-second direction; t1-thickness; t2-thickness; t3-thickness.

Detailed Description

In the following description, numerous implementation details are set forth in order to provide a thorough understanding of the present invention. It should be understood, however, that these implementation details are not to be interpreted as limiting the invention. That is, in some embodiments of the invention, such implementation details are not necessary. In addition, for the sake of simplicity, some conventional structures and elements are shown in the drawings in a simple schematic manner. And the thickness of layers and regions in the drawings may be exaggerated for clarity, and the same reference numerals denote the same elements in the description of the drawings.

Fig. 1 is a cross-sectional view of an electronic device 10 according to an embodiment of the invention. The electronic device 10 includes a flexible substrate 100, an anisotropic conductive adhesive 200, and an electronic component 300. Fig. 2A is an enlarged view of region a in fig. 1. Reference is also made to fig. 1 and 2A. The flexible substrate 100 includes a bonding pad BP and a protrusion 110 on the bonding pad BP. The anisotropic conductive paste 200 includes a plurality of conductive particles 210, wherein the conductive particles 210 contact the protrusions 110. The anisotropic conductive adhesive 200 is located between the bonding pad BP of the flexible substrate 100 and the electronic element 300. The flexible substrate 100 and the electronic element 300 are electrically connected and bonded to each other through the anisotropic conductive adhesive 200. The electronic component 300 includes an electrical connector 310. As shown in fig. 2A, after the electronic component 300 is bonded to the flexible substrate 100 through the bonding process, the conductive particles 210 are pressed by the electrical connector 310 and the bonding pads BP, so that the electrical connector 310 and the conductive layer (shown as the metal layer 106 in fig. 3) on the bonding pads BP are electrically connected to the circuit between the electronic component 300 and the flexible substrate 100 through the conductive particles 210.

The flexible substrate 100 is, for example, Polyimide (PI), Polyester (PET), a composite flexible printed circuit board of PI and glass, a composite flexible printed circuit board of PET and glass, or a composite flexible printed circuit board of PI, Optical Clear Adhesive (OCA) and PET. The electronic component 300 may be, for example, an Integrated Circuit (IC) or a Flexible Printed Circuit (FPC).

The electrical connection 310 may be, for example, Gold Bump (Gold Bump), Solder Bump (Solder Bump), conductive stud (pilar), or other element for electrical connection.

The conductive particles 210 include an insulating layer 212, a metal layer 214, and a resin 216. The core of the conductive particle 210 includes a resin 216, and the metal layer 214 coats the resin 216. The metal layer 214 may be, for example, at least one of gold (Au), silver (Ag), copper (Cu), nickel (Ni), and nickel Alloy (Ni Alloy). The insulating layer 212 surrounds the metal layer 214 and the resin 216, but the invention is not limited thereto. In some embodiments, the conductive particles 210 may also not include the insulating layer 212.

As shown in fig. 2A, by disposing the protrusion 110 on the bonding pad BP of the flexible substrate 100, the contact area between the conductive particles 210 and the flexible substrate 100 may be increased. In other words, by contacting the conductive particles 210 with the protrusions 110, the deformation amount of the conductive particles 210 can be increased, thereby improving the bonding stability between the electronic element 300 and the flexible substrate 100. In one embodiment, the deformation amount of the conductive particles 210 is greater than 15%, thereby improving the bonding stability between the electronic element 300 and the flexible substrate 100. Furthermore, in embodiments where the conductive particles 210 have an insulating layer 212, the provision of the protrusions 110 also facilitates breaching of the insulating layer 212. As a result, the external force required to achieve effective contact between the electronic element 300 and the flexible substrate 100 in the bonding process can be reduced, thereby preventing the bonding pads BP of the flexible substrate 100 from collapsing.

As shown in fig. 2A, the protrusion 110 has a width W in the range of about 1 to 2 microns. The protrusions 110 have a height H in the range of about 0.1 microns to 1 micron. After the electronic device 300 is bonded to the flexible substrate 100 through the bonding process, a space I1 is formed between the electrical connector 310 of the electronic device 300 and the bonding pad BP of the flexible substrate 100. The electrical connector 310 of the electronic device 300 has a spacing I2 from the top of the protrusion 110, and the spacing I2 is smaller than the spacing I1. Such a configuration may overcome the problem of conductive particles 210 bouncing back during environmental testing or after long use of the electronic device 10. In other words, since the interval I2 between the electrical connector 310 and the top end of the protrusion 110 is small, even if the interval I1 between the electrical connector 310 and the bonding pad BP increases with time or environmental changes, the contact area between the conductive particles 210 and the flexible substrate 100 can be ensured to be sufficient to maintain the effective contact and the effective electrical connection between the electronic element 300 and the flexible substrate 100.

Fig. 2B is an enlarged view of region B in fig. 1. The conductive particles 210 may also be partially in contact with the protrusions 110, and partially on the bonding pads BP without the protrusions 110. However, the difference in level generated by the protrusion 110 may also have an effect of pressing the protrusion 110. In other words, the protrusions 110 do not need to be completely covered by the conductive particles 210, and the technical effect of increasing the contact area between the conductive particles 210 and the flexible substrate 100 can also be achieved. It can be seen that the size of the protrusion 110 may not be smaller than the size of the conductive particle 210, as long as the protrusion 110 on the bonding pad BP can increase the deformation amount of the conductive particle 210. The relationship between the size of the protrusions 110 and the size of the conductive particles 210 will be described in the subsequent paragraphs.

Fig. 3 is a cross-sectional view of a flexible substrate 100 according to an embodiment of the invention. The flexible substrate 100 further includes an active area AA. In the present embodiment, the flexible substrate 100 includes a plurality of protrusions 110 on the bonding pads BP. Adjacent ones of the protrusions 110 have a spacing D therebetween in a range of about 1.2 to 2 microns.

Referring to fig. 1 and 3, the conductive particles 210 have a diameter DA. In some embodiments, the diameter DA of the conductive particles 210 is approximately in the range of about 3 to 10 microns, but the invention is not limited thereto, and the user can select the appropriate size of the conductive particles 210 according to the requirement. The width W of the conductive particles 210 is greater than 20% of the diameter DA and the width W is less than 3 times the diameter DA. The height H of the conductive particles 210 is greater than 5% of the diameter DA and the height H is less than 30% of the diameter DA. Such a structure design can ensure that the contact area between the conductive particles 210 and the flexible substrate 100 is sufficient to maintain the effective contact and the effective electrical connection between the electronic device 300 and the flexible substrate 100. The pitch D of the conductive particles 210 is greater than 50% of the diameter DA of the conductive particles 210, and the pitch D is less than 3 times the diameter DA of the conductive particles 210. Such a structure design can ensure that the conductive particles 210 can contact the protrusion 110 to generate a larger deformation (see fig. 2A and 2B).

Referring to fig. 3, the protrusion 110 includes a gate insulating layer 112, an amorphous silicon layer 114, and a passivation layer 116. The amorphous silicon layer 114 is located between the gate insulating layer 112 and the passivation layer 116. The amorphous silicon layer 114 contacts the gate insulating layer 112 and the passivation layer 116. The active area AA has an active array 120. The active array 120 has a gate insulating layer 122, an amorphous silicon layer 124, and a passivation layer 126. The gate insulation layer 122 of the active area AA extends to the gate insulation layer 112 above the bonding pad BP. The gate insulation layer 122 of the active area AA and the gate insulation layer 112 above the bonding pad BP may be formed in the same process step. The amorphous silicon layer 124 of the active area AA and the amorphous silicon layer 114 above the bonding pad BP may also be formed in the same process step. The passivation layer 126 of the active area AA and the passivation layer 116 over the bonding pad BP may also be formed in the same process step. A

second metal layer

104S,104D is further disposed between the amorphous silicon layer 124 and the passivation layer 126 in the active area AA, and respectively serves as a Source (Source) and a Drain (Drain) of a Thin Film Transistor (TFT) in the active area AA.

Between the flexible substrate 100 and the gate insulating layer 112, there is a first metal layer 102 located on the active region AA and the bonding pad BP. A third metal layer 106, such as a transparent conductive film, is disposed on the passivation layer 116 of the protrusion 110 and the passivation layer 126 of the active area AA. For example, the third metal layer 106 may be Indium Zinc Oxide (IZO), Indium Tin Oxide (ITO), or other transparent metal oxide films. A protection layer 108 is further disposed between the passivation layer 126 of the active area AA and the third metal layer 106. The active area AA further includes a contact via 130, and the first metal layer 102, the second metal layer 104 and the third metal layer 106 in the contact via 130 are in contact with each other.

As described above, in the process of forming the active array 120, the gate insulating layer 112, the amorphous silicon layer 114 and the passivation layer 116 having different patterns from those of the active area AA may be formed on the bonding pad BP through a patterning process. In other words, the protrusion 110 can be fabricated without adding process steps, and only by adjusting the original mask design.

Fig. 4A is a top view of the flexible substrate 100 according to an embodiment of the invention, which omits a portion of the active area AA (see fig. 3). In the present embodiment, the protrusion 110 is elongated and extends along the first direction D1. The adjacent two protrusions 110 have a distance D therebetween in the second direction D2. The second direction D2 is different from the first direction D1. In the present embodiment, the second direction D2 is substantially perpendicular to the first direction D1.

Fig. 4B is a top view of the flexible substrate 100a according to an embodiment of the invention, which omits a portion of the active area AA (see fig. 3). In the present embodiment, the protrusion 110a has an island shape. The width W of the protrusion 110a is substantially the diameter of the protrusion 110 a. The adjacent two protrusions 110a have a distance D therebetween.

Fig. 5 is a partially enlarged view of the protrusion 110 and the bonding pad BP in fig. 3. In the present embodiment, the gate insulating layer 112 of the protrusion 110 includes the

sections

1122A, 1122B, 1122C. The amorphous silicon layer 114 of the protrusion 110 includes

sections

1142A, 1142B, 1142C. The

sections

1122A, 1122B, 1122C correspond in position to the

sections

1142A, 1142B, 1142C, respectively. In addition, a vertical projection of the amorphous silicon layer 114 on the bonding pad BP overlaps the gate insulating layer 112. A portion of passivation layer 116 is located between adjacent two of the

segments

1122A, 1122B, 1122C of gate insulation layer 112, and this portion of passivation layer 116 extends onto bond pad BP. As shown in fig. 5, the passivation layer 116 extending onto the bonding pad BP contacts the first metal layer 102. In the present embodiment, the passivation layer 116 covers and contacts the amorphous silicon layer 114, the gate insulating layer 112 and the first metal layer 102. The gate insulation layer 112 has a thickness T1 in a range of about 0.3 to 0.4 microns. The amorphous silicon layer 114 has a thickness T2 in the range of about 0.05 microns to 0.15 microns. Passivation layer 116 has a thickness T3 in the range of about 0.3 microns to 0.4 microns. The thickness of the structure may depend on the requirements in the active area AA, and thus the step of depositing the material of the structure may not have to be changed.

Fig. 6A to 6F are cross-sectional views of a protrusion and a bonding pad BP according to different embodiments of the invention. As shown in fig. 6A, the passivation layer 116 of the protrusion 110b has a plurality of sections without the amorphous silicon layer 114 as shown in fig. 5. The gate insulating layer 112 is continuous and covers the first metal layer 102 and the bonding pad BP.

Referring to fig. 6B, the passivation layer 116 and the gate insulating layer 112 of the protrusion 110c respectively have a plurality of segments without the amorphous silicon layer 114 as shown in fig. 5. A perpendicular projection of a section of the passivation layer 116 on the bonding pad BP overlaps a section of the gate insulation layer 112. In addition, the width of the passivation layer 116 is smaller than that of the gate insulating layer 112, and thus the stepped protrusion 110c may be formed. In the present embodiment, the upper surface 116S of the passivation layer 116, the sidewall 116W of the passivation layer 116, a portion of the upper surface 112S of the gate insulating layer 112, and the sidewall 112W of the gate insulating layer 112 form a stepped profile of the protrusion 110 c. The stepped protrusion 110c facilitates breaking through the insulating layer 212 of the conductive particle 210 and increases the bonding stability between the conductive particle 210 (see fig. 2A, which may or may not include the insulating layer 212) and the bonding pad BP.

Referring to fig. 6C, the gate insulating layer 112 and the passivation layer 116 of the protrusion 110d respectively have a plurality of segments. A portion of the section of the passivation layer 116 is located between adjacent two of the sections of the gate insulating layer 112 and extends onto the bonding pad BP. In the present embodiment, the section of the passivation layer 116 extending onto the bonding pad BP contacts the first metal layer 102. In other words, in the present embodiment, two sections of the gate insulating layer 112 and one section of the passivation layer 116 constitute the symmetrically shaped protrusion 110 d. In the present embodiment, the upper surface 116S of the passivation layer 116, the sidewall 116W of the passivation layer 116, a portion of the upper surface 112S of the gate insulating layer 112, and the sidewall 112W of one side of the gate insulating layer 112 form a stepped profile of the protrusion 110 d. The stepped protrusion 110d has the same technical effects as the protrusion 110c shown in fig. 6B, and thus, the description thereof is omitted.

Referring to fig. 6D, the amorphous silicon layer 114 and the passivation layer 116 of the protrusion 110e respectively have a plurality of sections, and the gate insulating layer 112 is continuous and covers the first metal layer 102 and the bonding pad BP. In the present embodiment, the width of the section of the passivation layer 116 is greater than the width of the section of the amorphous silicon layer 114, and the passivation layer 116 and the gate insulating layer 112 surround the amorphous silicon layer 114. The passivation layer 116 forms a stepped section by the pattern of the amorphous silicon layer 114, and thus may form a stepped protrusion 110 e. In the present embodiment, the upper surface 116S and the sidewall 116W of the passivation layer 116 form a stepped profile of the protrusion 110 e. The stepped protrusion 110e has the same technical effects as the protrusion 110c shown in fig. 6B, and thus, the description thereof is omitted.

Referring to fig. 6E, the protrusion 110f is substantially the same as the protrusion 110E shown in fig. 6D, except that the gate insulating layer 112 of the protrusion 110f also has a plurality of segments. A section of the passivation layer 116 overlaps a section of the gate insulating layer 112 in a vertical projection of the bonding pad BP, and a section of the amorphous silicon layer 114 overlaps a section of the gate insulating layer 112 in a vertical projection of the bonding pad BP. In the present embodiment, the width of the gate insulating layer 112 is greater than the width of the amorphous silicon layer 114 and the passivation layer 116, so that the step-shaped protrusion 110f can be formed. In the present embodiment, the upper surface 116S of the passivation layer 116, the sidewall 116W of the passivation layer 116, a portion of the upper surface 112S of the gate insulating layer 112, and the sidewall 112W of one side of the gate insulating layer 112 form a three-layer stepped profile of the protrusion 110f, but the invention is not limited thereto. In other embodiments, a plurality of stepped structures may be formed by different processes. For example, different etching depths can be generated by a half-penetration (half-tone) mask to form the protrusion with more stepped structures. The stepped protrusion 110f has the same technical effects as the protrusion 110e shown in fig. 6D, and thus, the description thereof is omitted.

Referring to fig. 6F, protrusion 110g is substantially the same as protrusion 110e of fig. 6D, except that a vertical projection of a section of passivation layer 116 of protrusion 110g at bonding pad BP at least partially overlaps a vertical projection of a section of amorphous silicon layer 114 at bonding pad BP. For example, the section of the passivation layer 116 on the left side in fig. 6F completely covers the section of the amorphous silicon layer 114 thereunder, but the sections of the passivation layer 116 on the right and in the middle in fig. 6F only cover a portion of the section of the amorphous silicon layer 114, so the passivation layer 116 on the right and in the middle and the amorphous silicon layer 114 together constitute the asymmetrically-shaped stepped protrusion 110 g. The upper surface 116S of the passivation layer 116, the sidewall 116W of the passivation layer 116, a portion of the upper surface 114S of the amorphous silicon layer 114, and the sidewall 114W of one side of the amorphous silicon layer 114 form a three-layer stepped profile of the right and middle protrusions 110g, but the invention is not limited thereto. The stepped protrusion 110g has the same technical effects as the protrusion 110e shown in fig. 6D, and thus, the description thereof is omitted.

In summary, the invention can increase the contact area between the conductive particles and the flexible substrate by disposing the protrusions on the bonding pads of the flexible substrate. In other words, by contacting the conductive particles with the protrusions, the amount of deformation of the conductive particles can be increased, thereby improving the bonding stability between the electronic device and the flexible substrate. Furthermore, in embodiments where the conductive particles have an insulating layer, the provision of the protrusions also facilitates breaching of the insulating layer. Therefore, in the bonding process, the external force required to be applied to achieve effective contact between the electronic element and the flexible substrate can be reduced, so that the bonding pad of the flexible substrate can be prevented from collapsing. In addition, because the interval between the electrical connector and the top end of the protrusion is small, even if the interval between the electrical connector and the bonding pad is increased along with the change of the environment, the contact area between the conductive particles and the flexible substrate can be ensured to be enough to maintain the effective contact and the effective electrical connection between the electronic element and the flexible substrate.

Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications may be made therein by those skilled in the art without departing from the spirit and scope of the invention.

Claims

1. an electronic device, is characterized in that, comprises:

a flexible substrate, comprising an active region, a bonding pad, and a plurality of protrusions on the bonding pad;

an anisotropic conductive adhesive comprising a plurality of conductive particles, wherein the plurality of conductive particles contact the plurality of protrusions; and

The electronic component, wherein the anisotropic conductive adhesive is located between the bonding pad of the flexible substrate and the electronic component.

2. The electronic device of claim 1, wherein each of the plurality of protrusions has a width in the range of 1 to 2 microns.

3. The electronic device of claim 1, wherein each of the protrusions has a height in the range of 0.1 micron to 1 micron.

4 . The electronic device of claim 1 , wherein adjacent two of the plurality of protrusions have a distance between them, and the distance is in the range of 1.2 micrometers to 2 micrometers. 5 .

5. The electronic device of claim 1, wherein each of the protrusions has a width and each of the conductive particles has a diameter, the width is greater than 20% of the diameter, and the width is less than 3 times the stated diameter.

6. The electronic device of claim 1, wherein each of the protrusions has a height, each of the conductive particles has a diameter, the height is greater than 5% of the diameter, and the height is less than 30% of the diameter.

7 . The electronic device of claim 1 , wherein there is a distance between adjacent two of the plurality of protrusions, each of the conductive particles has a diameter, and the distance is greater than the distance of the conductive particles. 8 . 50% of the diameter, and the spacing is less than 3 times the diameter of the conductive particles.

8. The electronic device of claim 1, wherein the plurality of conductive particles have a deformation amount greater than 15%.

9. The electronic device of claim 1, wherein the protrusion comprises a passivation layer having a thickness in the range of 0.3 microns to 0.4 microns.

10. The electronic device of claim 9, wherein the passivation layer has a plurality of segments.

11. The electronic device of claim 10, wherein the protrusion comprises a gate insulating layer having a thickness in the range of 0.3 microns to 0.4 microns.

12. The electronic device of claim 11, wherein the gate insulating layer has a plurality of segments.

13 . The electronic device of claim 12 , wherein the vertical projections of the plurality of sections of the gate insulating layer on the bonding pads are respectively the same as the vertical projections of the plurality of sections of the gate insulating layer. 14 . Segments overlap.

14. The electronic device of claim 12, wherein a portion of the passivation layer is located between adjacent two of the plurality of sections of the gate insulating layer and extends to all on the bonding pads.

15 . The electronic device of claim 10 , wherein the protrusion further comprises an amorphous silicon layer located between the passivation layer and the gate insulating layer, the amorphous silicon layer having Thickness in the range of 0.05 microns to 0.15 microns.

16. The electronic device of claim 15, wherein the passivation layer has a plurality of segments, and the amorphous silicon layer has a plurality of segments.

17 . The electronic device of claim 16 , wherein a vertical projection of the plurality of sections of the passivation layer on the bonding pad is the same as the plurality of sections of the amorphous silicon layer. 18 . The vertical projections on the bond pads overlap at least partially.

18 . The electronic device of claim 16 , wherein the gate insulating layer has a plurality of segments, and a vertical projection of the plurality of segments of the passivation layer on the bonding pads is the same as that of the bonding pads 18 . The plurality of sections of the gate insulating layer overlap, and the vertical projection of the plurality of sections of the amorphous silicon layer on the bonding pads is the same as the plurality of sections of the gate insulating layer overlapping.

19 . The electronic device of claim 10 , wherein the protrusion further comprises a gate insulating layer and an amorphous silicon layer, and the amorphous silicon layer is located in the passivation layer and is insulated from the gate. 20 . between layers, wherein the gate insulating layer has a plurality of segments, and the amorphous silicon layer has a plurality of segments.

20. The electronic device of claim 19, wherein a portion of the passivation layer is located between adjacent two of the plurality of sections of the gate insulating layer and extends to all on the bonding pads.