Disclosure of Invention
In order to meet the above-mentioned defects or improvement demands of the prior art, the invention provides an automatic generation method, an automatic generation device and an automatic generation system of a grain arrangement scheme and a computer readable storage medium, which can solve the problems that a lot of time is consumed for manually drawing the arrangement scheme of grains on a wafer and the drawing result is inaccurate.
In one aspect, an embodiment of the present invention provides a method for automatically generating a grain arrangement scheme, including: obtaining basic information of a target wafer, wherein the basic information comprises: wafer size, die spacing, and edge spacing; automatically generating a UI graph of grain arrangement according to the basic information; acquiring a central offset of grain arrangement, and adjusting the UI graph of the grain arrangement according to the central offset to obtain a grain arrangement scheme; and displaying the grain arrangement scheme on a human-computer interaction interface.
In an embodiment of the present invention, the acquiring basic information of the target wafer specifically includes: acquiring the basic information of the target wafer provided by a supplier; or obtaining a sample of the target wafer provided by a provider, and obtaining the basic information according to the sample measurement.
In one embodiment of the present invention, the obtaining the center offset of the grain arrangement specifically includes: acquiring a numerical value of the center offset input by a user; or automatically detecting and acquiring the center offset in response to the mouse click and drag operation of the user.
In one embodiment of the present invention, the method for automatically generating a die arrangement scheme further includes: and acquiring the modification parameters of the basic information, and updating the generated grain arrangement scheme according to the modification parameters.
On the other hand, an embodiment of the present invention provides an automatic generation device for a grain arrangement scheme, including: the base information acquisition module is used for acquiring base information of the target wafer, and the base information comprises: wafer size, die spacing, and edge spacing; the UI graph generating module is used for automatically generating UI graphs of grain arrangement according to the basic information; the crystal grain arrangement scheme obtaining module is used for obtaining the central offset of crystal grain arrangement and adjusting the crystal grain arrangement UI graph according to the central offset to obtain a crystal grain arrangement scheme; and the crystal grain arrangement scheme display module is used for displaying the crystal grain arrangement scheme on a human-computer interaction interface.
In one embodiment of the present invention, the basic information acquisition module is specifically configured to: acquiring the basic information of the target wafer provided by a supplier; or obtaining a sample of the target wafer provided by a provider, and obtaining the basic information according to the sample measurement.
In one embodiment of the invention, the die arrangement scheme results in a module that is specifically for: acquiring a numerical value of the center offset input by a user; or automatically detecting and acquiring the center offset in response to the mouse click and drag operation of the user.
In one embodiment of the present invention, the automatic generation device for a die arrangement scheme further includes: and the modification parameter acquisition module is used for acquiring modification parameters of the basic information and updating the generated grain arrangement scheme according to the modification parameters.
In still another aspect, an embodiment of the present invention provides an automatic generation system for a grain arrangement scheme, including: a memory and one or more processors coupled to the memory, the memory storing a computer program, the processor configured to execute the computer program to implement the automated die placement scheme generation method as described in any of the embodiments above.
In yet another aspect, an embodiment of the present invention proposes a computer-readable storage medium storing computer-executable instructions for performing the automatic generation method of a die arrangement scheme according to any one of the above embodiments.
As can be seen from the above, compared with the prior art, the above solution contemplated by the present invention may have one or more of the following advantages:
(1) The UI graphics of the grain arrangement are automatically generated according to the basic information by acquiring the wafer size, the grain spacing and the edge spacing of the target wafer, and the center offset of the grain arrangement is acquired to adjust so as to obtain a grain arrangement scheme, so that the grain arrangement scheme on the target wafer can be automatically generated quickly and accurately, and the problems that a great amount of time is consumed for manually drawing the grain arrangement scheme and the drawing result is inaccurate are avoided.
(2) The center offset value input by the user is obtained, or the center offset of the grain arrangement is changed in response to the clicking and dragging operation of the mouse of the user, so that a needed grain arrangement scheme is obtained, the user can conveniently and flexibly adjust the crystal arrangement scheme, and a preferable arrangement scheme with more grain distribution numbers is obtained;
(3) The user can update the generated grain arrangement scheme by inputting the modification parameters of the basic information on the human-computer interaction interface, so that the combination of automatic generation of the grain arrangement scheme and manual adjustment is realized, and the convenience, the rapidness and the manual adjustment flexibility of the automatic generation of the grain arrangement scheme are realized;
(4) The arrangement scheme of the crystal grains can be automatically generated to obtain the row-column arrangement coordinates and the physical position coordinates of each crystal grain on the target wafer, so that the moving range of the camera shooting detection image can be rapidly determined when the crystal grain arrangement scheme is used for subsequent wafer detection, and the overall detection time is shortened.
Other aspects of the features of the invention will become apparent from the following detailed description, which refers to the accompanying drawings. It is to be understood, however, that the drawings are designed solely for the purposes of illustration and not as a definition of the limits of the invention. It should be further understood that the drawings are not necessarily drawn to scale and that, unless otherwise indicated, they are merely intended to conceptually illustrate the structures and procedures described herein.
Detailed Description
It should be noted that, without conflict, the embodiments of the present invention and features of the embodiments may be combined with each other. The invention will be described below with reference to the accompanying drawings in combination with embodiments.
In order to enable those skilled in the art to better understand the technical solutions of the present invention, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, but not all embodiments of the embodiments are all within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the above figures are applicable to distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, it is possible to provide a device for the treatment of a disease. The terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed or inherent to such process, method, article, or apparatus, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It should be further noted that the division of the embodiments in the present invention is only for convenience of description, and should not be construed as a specific limitation, and features in the various embodiments may be combined and mutually referenced without contradiction.
[ First embodiment ]
As shown in fig. 1, a first embodiment of the present invention provides an automatic generation method for a grain arrangement scheme, including the following steps: step S11, basic information of a target wafer is acquired, wherein the basic information comprises the following steps: wafer size, die spacing, and edge spacing; step S12, automatically generating a crystal grain arrangement UI graph according to the basic information; step S13, obtaining a central offset of grain arrangement, and adjusting the UI graph of the grain arrangement according to the central offset to obtain a grain arrangement scheme; step S14 displays the grain arrangement scheme on a man-machine interface.
In step S11, for example, the host computer software acquires the basic information of the target wafer. The target wafer mentioned here is, for example, a wafer provided by a manufacturer, and quality inspection is required. Examples of such a host computer are personal computers, hand-held devices, portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, editable consumer electronics, network PCs, minicomputers, mainframe computers, distributed computing environments that include any of the above systems or devices, and the like. The basic information of the target wafer includes: wafer size, die spacing, and edge spacing. The wafer size is, for example, the diameter of a wafer, the grain size is, for example, the diameter of a grain, the grain spacing is, for example, the spacing between grains in the directions of transverse axis and longitudinal axis arrangement respectively, and the edge spacing is, for example, the spacing between the edge of the grain arrangement area and the edge of the target wafer.
In step S12, a UI pattern of the die arrangement is automatically generated from the obtained basic information, for example, by the upper computer software. Specifically, as shown in fig. 2, UI patterns corresponding to the wafer shape and the die shape are stored in the upper computer software system in advance, for example, after the basic information such as the wafer size, the die spacing and the edge spacing is obtained, the corresponding UI patterns are automatically called to perform parameter configuration, so as to generate a corresponding die arrangement scheme.
Furthermore, the basic information of the target wafer obtained by the upper computer software can be parameter information directly provided by a supplier, or the basic information obtained by measuring the sample wafer of the target wafer provided by the supplier by a user, so that the finally obtained grain arrangement scheme can be mutually verified according to the various modes, and the accuracy of the automatically generated grain arrangement scheme is ensured.
In step S13, for example, the upper computer software obtains the center offset of the die arrangement, as shown in fig. 2, the wafer is in a symmetrical structure, the dies are uniformly distributed in the region where the dies are located, the edge of the region where the dies are located is spaced from the edge of the wafer by a certain edge distance, however, the dies are distributed on the wafer in an asymmetric manner, so that the number of the dies distributed on the target wafer can be changed by arranging the center of the region where the dies are located and the center of the wafer in a manner of offset by a certain distance, and the offset distance is the center offset. Thus, by controlling the amount of center offset and the direction of offset of the grain distribution area, which is generally the lateral axis direction and the longitudinal axis direction, a preferable arrangement of a larger number of grain distributions can be obtained.
Further, the manner in which the upper computer software obtains the center offset may be to obtain a value of the center offset input by the user, or to automatically detect and obtain the center offset in response to clicking and dragging operations performed by a mouse of the user on the generated UI pattern for arranging the crystal grains. Of course, the center offset value input by the user may be obtained by measuring a sample wafer of the target wafer, or may be a plurality of values set by the user in a user-defined manner, and the values are compared with the sample wafer of the target wafer to select the most suitable solution after generating the corresponding grain arrangement solution respectively.
In step S14, for example, the upper computer software displays the automatically generated die arrangement scheme on the man-machine interface for the user to perform subsequent wafer inspection or parameter correction adjustment, so as to generate a new die arrangement scheme.
In this way, the technical scheme of the invention automatically generates the UI graphics of the grain arrangement according to the basic information by acquiring the wafer size, the grain spacing and the edge spacing of the target wafer, and acquires the center offset of the grain arrangement to adjust to obtain the grain arrangement scheme, so that the grain arrangement scheme on the target wafer can be quickly and accurately automatically generated, and the problems that a great amount of time is consumed for manually drawing the grain arrangement scheme and the drawing result is inaccurate are avoided.
Further, as shown in fig. 3, after the grain arrangement scheme is obtained, for example, a software configuration interface may further obtain a modification parameter of the basic information input by the user, and the upper computer software updates the generated grain arrangement scheme according to the modification parameter. Therefore, the combination of automatic generation of the grain arrangement scheme and manual adjustment is realized, and the convenience, the rapidity and the manual adjustment flexibility of the automatic generation of the grain arrangement scheme are realized.
Further, before performing image alignment according to the overlapping area between the plurality of die detection images, for example, the method further includes: and selecting the alignment point and acquiring the detection image in which the alignment point is positioned as a reference image, and aligning other detection images according to the reference image. Because the alignment is carried out between the detection images of the multiple crystal grains according to the overlapping parts, the acquired fixed area images of different crystal grains can directly have position offset, so that the detection image with the reference point is selected as the reference image, the absolute accuracy of the positions of the fixed area images of different crystal grains can be ensured, and the error caused by the position offset during detection is avoided.
It is worth mentioning that the host computer software can acquire data structures such as row and column arrangement coordinates and physical position coordinates of each crystal grain on the target wafer according to an automatically generated crystal grain arrangement scheme, and can quickly determine the moving range of a camera shooting detection image when being used for subsequent wafer detection according to the data structures, so that the overall detection time is reduced. Meanwhile, the crystal grain state (including crystal grain normal, crystal grain dirt, crystal grain damage and the like) of the crystal grain on the detection image can be related to the data structure of the crystal grain, so that the crystal grain can be rapidly positioned in the detection process.
In summary, according to the automatic generation method for the grain arrangement scheme provided by the embodiment of the invention, the UI graph of the grain arrangement is automatically generated according to the basic information by acquiring the wafer size, the grain spacing and the edge spacing of the target wafer, and the grain arrangement scheme is obtained by acquiring the central offset of the grain arrangement and adjusting, so that the grain arrangement scheme on the target wafer can be quickly and accurately automatically generated, and the problems that a great amount of time is required for manually drawing the grain arrangement scheme and the drawing result is inaccurate are avoided; the center offset value input by the user is obtained, or the center offset of the grain arrangement is changed in response to the clicking and dragging operation of the mouse of the user, so that a needed grain arrangement scheme is obtained, the user can conveniently and flexibly adjust the crystal arrangement scheme, and a preferable arrangement scheme with more grain distribution numbers is obtained; the user can update the generated grain arrangement scheme by inputting the modification parameters of the basic information on the human-computer interaction interface, so that the combination of automatic generation of the grain arrangement scheme and manual adjustment is realized, and the convenience, the rapidness and the manual adjustment flexibility of the automatic generation of the grain arrangement scheme are realized; according to the automatically generated grain arrangement scheme, row-column arrangement coordinates and physical position coordinates of each grain on the target wafer can be obtained, and the moving range of a camera shooting detection image can be rapidly determined when the method is used for subsequent wafer detection, so that the overall detection time is shortened.
[ Second embodiment ]
As shown in fig. 4, a second embodiment of the present invention proposes an automatic generation device 20 for a grain arrangement scheme, for example, including: a basic information acquisition module 201, a UI graphic generation module 202, a die arrangement scheme acquisition module 203, and a die arrangement scheme display module 204.
The basic information obtaining module 201 is configured to obtain basic information of a target wafer, where the basic information includes: wafer size, die spacing, and edge spacing. The UI pattern generation module 202 is configured to automatically generate a UI pattern of the die arrangement according to the basic information. The grain arrangement scheme obtaining module 203 is configured to obtain a center offset of grain arrangement, and adjust the grain arrangement UI graph according to the center offset to obtain a grain arrangement scheme; the 204 crystal grain arrangement scheme display module is used for displaying the crystal grain arrangement scheme on a human-computer interaction interface.
Further, the basic information acquisition module 201 is specifically configured to: acquiring the basic information of the target wafer provided by a supplier; or obtaining a sample of the target wafer provided by a provider, and obtaining the basic information according to the sample measurement.
Further, the grain arrangement scheme obtaining module 203 is specifically configured to: acquiring a numerical value of the center offset input by a user; or automatically detecting and acquiring the center offset in response to the mouse click and drag operation of the user.
Further, as shown in fig. 5, the automatic generation device 20 for a die arrangement scheme further includes: and the modification parameter obtaining module 205 is configured to obtain modification parameters of the basic information, and update the generated die arrangement scheme according to the modification parameters.
The automatic generation method of the die arrangement pattern implemented by the automatic generation device 20 of the die arrangement pattern disclosed in the second embodiment of the present invention is as described in the foregoing first embodiment, and thus will not be described in detail herein. Optionally, each module in the second embodiment and the other operations or functions described above are respectively for implementing the method described in the first embodiment, and the beneficial effects of this embodiment are the same as those of the foregoing first embodiment, which are not described herein for brevity.
[ Third embodiment ]
As shown in fig. 6, a third embodiment of the present invention proposes an automatic generation system 30 for a wafer arrangement scheme, for example, including: a memory 32 and one or more processors 31 coupled to the memory 32. The memory 32 stores a computer program for execution by the processor 31 to implement the automatic generation method of the die arrangement scheme as described in the first embodiment. The specific automatic generation method of the die arrangement scheme may refer to the method described in the first embodiment, and is not described herein for brevity, and the advantageous effects of the automatic generation system 30 for a die arrangement scheme provided in the present embodiment are the same as those of the automatic generation method for a die arrangement scheme provided in the first embodiment.
[ Fourth embodiment ]
As shown in fig. 7, a fourth embodiment of the present invention proposes a computer-readable storage medium 40, the computer-readable storage medium 40 being a nonvolatile memory and storing computer-readable instructions that, when executed by one or more processors, for example, cause the one or more processors to perform the automatic generation method of the die arrangement scheme described in the foregoing first embodiment. The specific method may refer to the method described in the first embodiment, and is not described herein for brevity, and the beneficial effects of the computer readable storage medium 40 provided in this embodiment are the same as those of the automatic generation method of the die arrangement scheme provided in the first embodiment.
In addition, it should be understood that the foregoing embodiments are merely exemplary illustrations of the present invention, and the technical solutions of the embodiments may be arbitrarily combined and matched without conflict in technical features, contradiction in structure, and departure from the purpose of the present invention.
In the several embodiments provided herein, it should be understood that the disclosed systems, devices, and/or methods may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and the division of the units/modules is merely a logical function division, and there may be additional divisions when actually implemented, e.g., multiple units or modules may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units/modules described as separate units may or may not be physically separate, and units/modules may or may not be physically units, may be located in one place, or may be distributed on multiple network units. Some or all of the units/modules may be selected according to actual needs to achieve the purpose of the embodiment.
In addition, each functional unit/module in the embodiments of the present invention may be integrated in one processing unit/module, or each unit/module may exist alone physically, or two or more units/modules may be integrated in one unit/module. The integrated units/modules may be implemented in hardware or in hardware plus software functional units/modules.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.