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CN113809050A - Chip anti-irradiation packaging material and anti-irradiation packaging process - Google Patents

Chip anti-irradiation packaging material and anti-irradiation packaging process Download PDF

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CN113809050A
CN113809050A CN202111164960.8A CN202111164960A CN113809050A CN 113809050 A CN113809050 A CN 113809050A CN 202111164960 A CN202111164960 A CN 202111164960A CN 113809050 A CN113809050 A CN 113809050A
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chip
wide bandgap
bandgap semiconductor
packaging material
particles
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钱靖
陈显平
罗厚彩
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Chongqing Pingchuang Semiconductor Research Institute Co ltd
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Chongqing Pingchuang Semiconductor Research Institute Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/298Semiconductor material, e.g. amorphous silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3738Semiconductor materials

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Abstract

本发明属于材料核工业用材料技术领域,尤其涉及一种芯片抗辐照封装材料及抗辐照封装工艺,所述芯片抗辐照封装材料为在塑封料中掺杂宽禁带半导体颗粒,宽禁带半导体颗粒的重量占比在10%‑75%之间。所述芯片抗辐照封装工艺为首先在铜基板背面生长一层抗辐照层,在铜基板正面焊接芯片,同时将芯片和铜基板的引脚键合;然后称量塑封料和掺杂颗粒,将塑封料和掺杂颗粒置入预设好搅拌温度的模具中进行搅拌均匀,待搅拌时间结束后,得到塑封料复合材料;最后将搅拌均匀后的塑封料复合材料进行注塑压封,并将塑封后的芯片进行引脚电镀和去除毛刺与飞边。本发明提升了芯片整体的抗辐照性能和在太空环境下的可靠性,同时提升了芯片器件背部的抗辐照能力。

Figure 202111164960

The invention belongs to the technical field of materials used in the material nuclear industry, and in particular relates to a chip anti-radiation packaging material and an anti-radiation packaging process. The weight ratio of the band gap semiconductor particles is between 10% and 75%. The anti-radiation packaging process of the chip is as follows: firstly, a layer of anti-irradiation layer is grown on the back of the copper substrate, the chip is welded on the front of the copper substrate, and the pins of the chip and the copper substrate are bonded at the same time; then the plastic sealing compound and the doped particles are weighed , put the plastic sealing compound and the doped particles into a mold with a preset stirring temperature for uniform stirring, and after the stirring time is over, the plastic sealing compound composite material is obtained; The plastic-packaged chip is electroplated on the pins and the burrs and flashes are removed. The invention improves the overall anti-radiation performance of the chip and the reliability in the space environment, and at the same time improves the anti-radiation ability of the back of the chip device.

Figure 202111164960

Description

Chip anti-irradiation packaging material and anti-irradiation packaging process
Technical Field
The invention belongs to the technical field of materials for material nuclear industry, and particularly relates to a chip anti-irradiation packaging material and an anti-irradiation packaging process.
Background
With the progress of the times, China has a great development in the field of aviation, from manned spacecrafts to Mars detection, and from Tiangong No. two to Beidou global coverage, more and more power devices are brought to the space for working. But compared with the common working environment, the reliability of the power device in the outer space is very important, wherein the packaging technology of the power device greatly improves the reliability of the power device, the packaging forms of the power device are various, wherein, the plastic package has considerable advantages in the aspects of cost, size, weight and the like, and along with the great improvement of the reliability of the plastic package in recent years, plastic package devices get more and more attention in the aviation field, in space, besides general reliability failure, plastic package devices can also suffer from a series of problems caused by high-energy particle irradiation, for example, when the device is operated in an irradiation environment for a long time, the plastic package device can encounter a single event breakdown effect, a single event upset effect, a single event gate breakdown effect and the like, therefore, the improvement of the radiation resistance of the plastic package device is very necessary for the application of the plastic package device in the aerospace field.
The technical scheme of the prior art for resisting radiation comprises a coating method, an element doping method and a shell wrapping method, wherein the coating method needs to generate an anti-radiation layer on the surface of an object, a patent document with an authorization publication number of CN111118455B proposes that a layer of metal chromium is mixed between zirconia and silicon steel, so that the connection performance between the zirconia layer and the silicon steel is improved on the basis of improving the anti-radiation capability, but a plastic package device mainly comprises a copper substrate at the bottom and back plastic, the existing coating process is mainly metal oxides such as zirconia, strong connection is not easily formed between the metal oxides and the plastic of the plastic package device, and the anti-radiation performance of the plastic part of the device cannot be improved. The element doping method is mainly used for doping rare earth elements and inorganic non-metallic simple substance materials, and has the problems of overhigh price and relatively poor performance. The final shell wrapping method needs to additionally increase a layer of structure on the outer layer of the device, and in the field of low-energy irradiation, although the radiation resistance of the device is greatly improved by shell wrapping, the weight and the volume are increased, so that the requirement of integration and portability of aerospace is not facilitated.
Disclosure of Invention
The invention aims to provide a chip anti-irradiation packaging material and an anti-irradiation packaging process, and the wide-bandgap semiconductor material is doped into plastic as particles, so that the integral anti-irradiation performance of the chip and the reliability of the chip in a space environment are improved.
The basic scheme provided by the invention is as follows: a chip radiation-resistant packaging material is characterized in that: the plastic packaging material is doped with wide bandgap semiconductor particles, and the weight percentage of the wide bandgap semiconductor particles is between 10 and 75 percent.
The principle and the advantages of the invention are as follows: according to the invention, the wide bandgap semiconductor particles are doped in the plastic packaging material, and the radiation resistance of the wide bandgap semiconductor material is utilized, so that the radiation resistance of the plastic packaging material can be effectively improved, and the integral radiation resistance of the chip and the reliability of the chip in a space environment are improved. Therefore, the invention has the advantages that the wide bandgap semiconductor material is doped into the plastic as particles, so that the radiation resistance of the whole chip and the reliability of the chip in the space environment are improved.
Further, the plastic package material is an epoxy plastic package material.
Has the advantages that: the epoxy plastic packaging material has the advantages of low cost, high production efficiency and reasonable reliability, and is a common packaging material.
Further, the wide bandgap semiconductor particles are one of silicon carbide wide bandgap semiconductor particles or gallium nitride wide bandgap semiconductor particles.
Has the advantages that: the silicon carbide wide bandgap semiconductor and the gallium nitride wide bandgap semiconductor have anti-irradiation capability, and meanwhile, the silicon carbide and the gallium nitride are also used as high-thermal-conductivity-coefficient materials and doped into plastic package, so that the overall heat dissipation capability of the chip can be effectively improved.
Furthermore, the particle size of the wide bandgap semiconductor particles is 10nm-50 um.
Has the advantages that: the particle size of the wide bandgap semiconductor particles is controlled to be 10nm-50um, and the overall weight and the shape of the plastic packaging material doped with the wide bandgap semiconductor particles are not obviously influenced.
A chip irradiation-resistant packaging process is characterized in that: the method comprises the following steps:
s1: growing an anti-irradiation layer on the back of the copper substrate, welding a chip on the front of the copper substrate, and bonding the chip and a pin of the copper substrate;
s2: weighing the plastic packaging material and the doping particles, putting the plastic packaging material and the doping particles into a die with a preset stirring temperature, uniformly stirring, and obtaining a plastic packaging material composite material after the stirring time is over;
s3: and (3) carrying out injection molding and press sealing on the chip copper substrate with the anti-radiation layer in S1 by using the uniformly stirred plastic packaging material composite material, and carrying out pin electroplating and burr and flash removal on the chip after plastic packaging.
Principle and advantages: according to the invention, the wide bandgap semiconductor particles are doped in the plastic packaging material, and the radiation resistance of the wide bandgap semiconductor material is utilized, so that the radiation resistance of the plastic packaging material can be effectively improved, and the integral radiation resistance of the chip and the reliability of the chip in a space environment are improved. Meanwhile, an anti-irradiation layer grows on the back of the chip on the surface of the copper substrate, so that the anti-irradiation capability of the back of a chip device can be improved. Therefore, the invention has the advantages that the wide bandgap semiconductor material is doped into the plastic as particles, so that the integral anti-irradiation performance of the chip and the reliability of the chip in the space environment are improved, and meanwhile, the back of the chip device is extended to grow an anti-irradiation layer, so that the anti-irradiation capability of the back of the chip device is improved.
Further, in S1, the irradiation-resistant layer is made of one of metal oxide, metal simple substance or wide bandgap semiconductor material, the thickness of the irradiation-resistant layer is 1um-1mm, and the area of the irradiation-resistant layer is between the area of the chip and the area of the copper substrate.
Has the advantages that: the metal oxide or the metal simple substance or the wide bandgap semiconductor material can improve the radiation resistance of the back of the chip device.
Further, in S2, the molding compound is an epoxy molding compound, the stirring temperature in the mold is 150-220 ℃, and the stirring time is 5-30 min.
Has the advantages that: the epoxy molding compound has the advantages of low cost, high production efficiency and reasonable reliability, is a common packaging material, and can be uniformly stirred by stirring at the temperature of 150-220 ℃ for 5-30 minutes.
Further, the doped particles are one of silicon carbide wide bandgap semiconductor particles or gallium nitride wide bandgap semiconductor particles, the doped particles account for 10% -75% of the total mass, and the particle size of the doped particles is 10nm-50 um.
Has the advantages that: the silicon carbide wide bandgap semiconductor and the gallium nitride wide bandgap semiconductor have anti-irradiation capability, and meanwhile, the silicon carbide and the gallium nitride are also used as high-thermal-conductivity-coefficient materials and doped into plastic package, so that the overall heat dissipation capability of the chip can be effectively improved.
Drawings
FIG. 1 is a flow chart of the present invention.
Detailed Description
The following is further detailed by way of specific embodiments:
as shown in figure 1, the chip anti-irradiation packaging material is prepared by weighing a plastic packaging material and wide bandgap semiconductor particles, doping the wide bandgap semiconductor particles in the plastic packaging material, wherein the plastic packaging material is an epoxy plastic packaging material, the wide bandgap semiconductor particles are silicon carbide wide bandgap semiconductor particles or gallium nitride wide bandgap semiconductor particles, the weight percentage of the wide bandgap semiconductor particles is between 1% and 30%, and the particle size of the wide bandgap semiconductor particles is between 10nm and 50 um.
A chip radiation-resistant packaging process comprises the following steps:
s1: growing an anti-irradiation layer on the back of the copper substrate, welding a chip on the front of the copper substrate, and bonding the chip and a pin of the copper substrate; the irradiation-resistant layer is made of one of metal oxide, metal simple substance or wide bandgap semiconductor material, the thickness of the irradiation-resistant layer is 1um-1mm, and the area of the irradiation-resistant layer is between the area of the chip and the area of the copper substrate;
s2: weighing the plastic packaging material and the doping particles, putting the plastic packaging material and the doping particles into a die with a preset stirring temperature, uniformly stirring, and obtaining a plastic packaging material composite material after the stirring time is over; wherein the plastic package material is epoxy plastic package material, the stirring temperature in the die is 150-220 ℃, and the stirring time is 5-30 min; the doped particles are one of silicon carbide wide bandgap semiconductor particles or gallium nitride wide bandgap semiconductor particles, the doped particles account for 10-75% of the total mass, and the particle size of the doped particles is 10nm-50 um;
s3: and (3) carrying out injection molding and press sealing on the chip copper substrate with the anti-radiation layer in S1 by using the uniformly stirred plastic packaging material composite material, and carrying out pin electroplating and burr and flash removal on the chip after plastic packaging.
The first embodiment is as follows:
2g of plastic packaging material and wide bandgap semiconductor particles are weighed, the wide bandgap semiconductor particles are doped in the plastic packaging material, the plastic packaging material is epoxy plastic packaging material, the wide bandgap semiconductor particles are silicon carbide wide bandgap semiconductor particles, the weight proportion of the silicon carbide wide bandgap semiconductor particles is 20%, namely the weight of the silicon carbide wide bandgap semiconductor particles is 0.4g, and the particle size of the silicon carbide wide bandgap semiconductor particles is 10 nm.
A chip radiation-resistant packaging process comprises the following steps:
s1: growing an anti-irradiation layer on the back of the copper substrate, welding a chip on the front of the copper substrate, and bonding the chip and a pin of the copper substrate; wherein, the material of the anti-irradiation layer is zirconia, the thickness of the anti-irradiation layer is 1um, and the area of the anti-irradiation layer is the area of the copper substrate;
s2: weighing 2g of plastic packaging material and doping particles, placing the plastic packaging material and the doping particles into a die with a preset stirring temperature, uniformly stirring, and obtaining a plastic packaging material composite material after the stirring time is over; wherein the plastic package material is epoxy plastic package material, the stirring temperature in the die is 150 ℃, and the stirring time is 5 min; the doping particles are silicon carbide wide bandgap semiconductor particles, the weight of the silicon carbide wide bandgap semiconductor particles accounts for 20% of the total weight, namely the weight of the silicon carbide wide bandgap semiconductor particles is 0.4g, and the particle size of the silicon carbide wide bandgap semiconductor particles is 10 nm;
s3: performing injection molding and press sealing on the chip copper substrate with the anti-irradiation layer in S1 by using the uniformly stirred plastic packaging material composite material, and performing pin electroplating and burr and flash removal on the chip after plastic packaging;
s4, carrying out irradiation test of 1M rad dose on the device subjected to plastic packaging in S3, wherein the electrical performance of the device is 88% of that of an undoped device.
Example two:
2g of plastic packaging material and wide bandgap semiconductor particles are weighed, the wide bandgap semiconductor particles are doped in the plastic packaging material, the plastic packaging material is epoxy plastic packaging material, the wide bandgap semiconductor particles are silicon carbide wide bandgap semiconductor particles, the weight ratio of the silicon carbide wide bandgap semiconductor particles is 10%, and the particle size of the wide bandgap semiconductor particles is 200 nm.
A chip radiation-resistant packaging process comprises the following steps:
s1: growing an anti-irradiation layer on the back of the copper substrate, welding a chip on the front of the copper substrate, and bonding the chip and a pin of the copper substrate; wherein, the material of the anti-irradiation layer is zirconia, the thickness of the anti-irradiation layer is 100um, and the area of the anti-irradiation layer is the area of the copper substrate;
s2: weighing 2g of plastic packaging material and doping particles, placing the plastic packaging material and the doping particles into a die with a preset stirring temperature, uniformly stirring, and obtaining a plastic packaging material composite material after the stirring time is over; wherein the plastic package material is epoxy plastic package material, the stirring temperature in the die is 200 ℃, and the stirring time is 20 min; the doping particles are silicon carbide wide bandgap semiconductor particles, the weight of the silicon carbide wide bandgap semiconductor particles accounts for 10% of the total weight, and the particle size of the silicon carbide wide bandgap semiconductor particles is 200 nm;
s3: performing injection molding and press sealing on the chip copper substrate with the anti-irradiation layer in S1 by using the uniformly stirred plastic packaging material composite material, and performing pin electroplating and burr and flash removal on the chip after plastic packaging;
s4, carrying out irradiation test of 1M rad dose on the device subjected to plastic packaging in S3, wherein the electrical performance of the device is 95% of that of an undoped device.
Example three:
a chip anti-irradiation packaging material is prepared by weighing 2g of plastic packaging material and wide bandgap semiconductor particles, doping the wide bandgap semiconductor particles in the plastic packaging material, wherein the plastic packaging material is epoxy plastic packaging material, the wide bandgap semiconductor particles are silicon carbide wide bandgap semiconductor particles, the weight ratio of the silicon carbide wide bandgap semiconductor particles is 35%, and the particle size of the wide bandgap semiconductor particles is 5 um.
A chip radiation-resistant packaging process comprises the following steps:
s1: growing an anti-irradiation layer on the back of the copper substrate, welding a chip on the front of the copper substrate, and bonding the chip and a pin of the copper substrate; wherein the material of the anti-irradiation layer is zirconium oxide, the thickness of the anti-irradiation layer is 1mm, and the area of the anti-irradiation layer is the area of the copper substrate;
s2: weighing 2g of plastic packaging material and doping particles, placing the plastic packaging material and the doping particles into a die with a preset stirring temperature, uniformly stirring, and obtaining a plastic packaging material composite material after the stirring time is over; wherein the plastic package material is epoxy plastic package material, the stirring temperature in the die is 220 ℃, and the stirring time is 30 min; the doping particles are silicon carbide wide bandgap semiconductor particles, the weight of the silicon carbide wide bandgap semiconductor particles accounts for 35% of the total weight, and the particle size of the silicon carbide wide bandgap semiconductor particles is 5 um;
s3: performing injection molding and press sealing on the chip copper substrate with the anti-irradiation layer in S1 by using the uniformly stirred plastic packaging material composite material, and performing pin electroplating and burr and flash removal on the chip after plastic packaging;
s4, carrying out irradiation test of 1M rad dose on the device subjected to plastic packaging in S3, wherein the electrical performance of the device is 69% of that of an undoped device.
Example four:
2g of plastic packaging material and wide bandgap semiconductor particles are weighed, the wide bandgap semiconductor particles are doped in the plastic packaging material, the plastic packaging material is epoxy plastic packaging material, the wide bandgap semiconductor particles are gallium nitride wide bandgap semiconductor particles, the weight proportion of the gallium nitride wide bandgap semiconductor particles is 35%, and the particle size of the wide bandgap semiconductor particles is 10 nm.
A chip radiation-resistant packaging process comprises the following steps:
s1: growing an anti-irradiation layer on the back of the copper substrate, welding a chip on the front of the copper substrate, and bonding the chip and a pin of the copper substrate; the irradiation-resistant layer is made of gallium nitride, the thickness of the irradiation-resistant layer is 1um, and the area of the irradiation-resistant layer is the area of the chip;
s2: weighing 2g of plastic packaging material and doping particles, placing the plastic packaging material and the doping particles into a die with a preset stirring temperature, uniformly stirring, and obtaining a plastic packaging material composite material after the stirring time is over; wherein the plastic package material is epoxy plastic package material, the stirring temperature in the die is 150 ℃, and the stirring time is 5 min; the doped particles are gallium nitride wide bandgap semiconductor particles, the weight of the gallium nitride wide bandgap semiconductor particles accounts for 35% of the total weight, and the particle size of the gallium nitride wide bandgap semiconductor particles is 10 nm;
s3: performing injection molding and press sealing on the chip copper substrate with the anti-irradiation layer in S1 by using the uniformly stirred plastic packaging material composite material, and performing pin electroplating and burr and flash removal on the chip after plastic packaging;
s4, carrying out irradiation test of 1M rad dose on the device subjected to plastic packaging in S3, wherein the electrical performance of the device is 67.8% of that of an undoped device, and the degradation amplitude of the device is the latter.
Example five:
2g of plastic packaging material and wide bandgap semiconductor particles are weighed, the wide bandgap semiconductor particles are doped in the plastic packaging material, the plastic packaging material is epoxy plastic packaging material, the wide bandgap semiconductor particles are gallium nitride wide bandgap semiconductor particles, the weight ratio of the gallium nitride wide bandgap semiconductor particles is 15%, and the particle size of the wide bandgap semiconductor particles is 500 nm.
A chip radiation-resistant packaging process comprises the following steps:
s1: growing an anti-irradiation layer on the back of the copper substrate, welding a chip on the front of the copper substrate, and bonding the chip and a pin of the copper substrate; the irradiation-resistant layer is made of gallium nitride, the thickness of the irradiation-resistant layer is 500um, and the area of the irradiation-resistant layer is the area of the chip;
s2: weighing 2g of plastic packaging material and doping particles, placing the plastic packaging material and the doping particles into a die with a preset stirring temperature, uniformly stirring, and obtaining a plastic packaging material composite material after the stirring time is over; wherein the plastic package material is epoxy plastic package material, the stirring temperature in the die is 200 ℃, and the stirring time is 20 min; the doped particles are gallium nitride wide bandgap semiconductor particles, the weight of the gallium nitride wide bandgap semiconductor particles accounts for 15% of the total weight, and the particle size of the gallium nitride wide bandgap semiconductor particles is 500 nm;
s3: performing injection molding and press sealing on the chip copper substrate with the anti-irradiation layer in S1 by using the uniformly stirred plastic packaging material composite material, and performing pin electroplating and burr and flash removal on the chip after plastic packaging;
s4, carrying out irradiation test of 1 Mrad dose on the device subjected to plastic packaging in S3, wherein the degradation amplitude of the electrical performance of the device is 91% of that of an undoped device.
Example six:
2g of plastic packaging material and wide bandgap semiconductor particles are weighed, the wide bandgap semiconductor particles are doped in the plastic packaging material, the plastic packaging material is epoxy plastic packaging material, the wide bandgap semiconductor particles are gallium nitride wide bandgap semiconductor particles, the weight proportion of the gallium nitride wide bandgap semiconductor particles is 30%, and the particle size of the wide bandgap semiconductor particles is 50 nm.
A chip radiation-resistant packaging process comprises the following steps:
s1: growing an anti-irradiation layer on the back of the copper substrate, welding a chip on the front of the copper substrate, and bonding the chip and a pin of the copper substrate; the irradiation-resistant layer is made of gallium nitride, the thickness of the irradiation-resistant layer is 1mm, and the area of the irradiation-resistant layer is the area of the chip;
s2: weighing 2g of plastic packaging material and doping particles, placing the plastic packaging material and the doping particles into a die with a preset stirring temperature, uniformly stirring, and obtaining a plastic packaging material composite material after the stirring time is over; wherein the plastic package material is epoxy plastic package material, the stirring temperature in the die is 220 ℃, and the stirring time is 30 min; the doped particles are gallium nitride wide bandgap semiconductor particles, the weight of the gallium nitride wide bandgap semiconductor particles accounts for 30% of the total weight, and the particle size of the gallium nitride wide bandgap semiconductor particles is 50 um;
s3: performing injection molding and press sealing on the chip copper substrate with the anti-irradiation layer in S1 by using the uniformly stirred plastic packaging material composite material, and performing pin electroplating and burr and flash removal on the chip after plastic packaging;
s4, carrying out irradiation test of 1M rad dose on the device subjected to plastic packaging in S3, wherein the electrical performance of the device is 76.6% of that of an undoped device.
The foregoing are merely exemplary embodiments of the present invention, and no attempt is made to show structural details of the invention in more detail than is necessary for the fundamental understanding of the art, the description taken with the drawings making apparent to those skilled in the art how the several forms of the invention may be embodied in practice with the teachings of the invention. It should be noted that, for those skilled in the art, without departing from the structure of the present invention, several changes and modifications can be made, which should also be regarded as the protection scope of the present invention, and these will not affect the effect of the implementation of the present invention and the practicability of the patent. The scope of the claims of the present application shall be determined by the contents of the claims, and the description of the embodiments and the like in the specification shall be used to explain the contents of the claims.

Claims (8)

1. A chip radiation-resistant packaging material is characterized in that: the plastic packaging material is doped with wide bandgap semiconductor particles, and the weight percentage of the wide bandgap semiconductor particles is between 10 and 75 percent.
2. The chip radiation-resistant packaging material of claim 1, wherein: the plastic package material is epoxy plastic package material.
3. The chip radiation-resistant packaging material of claim 1, wherein: the wide bandgap semiconductor particles are one of silicon carbide wide bandgap semiconductor particles or gallium nitride wide bandgap semiconductor particles.
4. The chip radiation-resistant packaging material of claim 1, wherein: the particle size of the wide bandgap semiconductor particles is 10nm-50 um.
5. A chip irradiation-resistant packaging process is characterized in that: the method comprises the following steps:
s1: growing an anti-irradiation layer on the back of the copper substrate, welding a chip on the front of the copper substrate, and bonding the chip and a pin of the copper substrate;
s2: weighing the plastic packaging material and the doping particles, putting the plastic packaging material and the doping particles into a die with a preset stirring temperature, uniformly stirring, and obtaining a plastic packaging material composite material after the stirring time is over;
s3: and (3) carrying out injection molding and press sealing on the chip copper substrate with the anti-radiation layer in S1 by using the uniformly stirred plastic packaging material composite material, and carrying out pin electroplating and burr and flash removal on the chip after plastic packaging.
6. The chip radiation-resistant packaging process according to claim 5, wherein: in S1, the material of the anti-radiation layer is one of metal oxide or metal simple substance or wide bandgap semiconductor material, the thickness of the anti-radiation layer is 1um-1mm, and the area of the anti-radiation layer is between the area of the chip area and the area of the copper substrate area.
7. The chip radiation-resistant packaging process according to claim 5, wherein: in S2, the molding compound is an epoxy molding compound, the stirring temperature in the mold is 150-220 ℃, and the stirring time is 5-30 min.
8. The chip radiation-resistant packaging process according to claim 5, wherein: the doped particles are one of silicon carbide wide bandgap semiconductor particles or gallium nitride wide bandgap semiconductor particles, the doped particles account for 1% -30% of the total mass, and the particle size of the doped particles is 10nm-50 um.
CN202111164960.8A 2021-09-30 2021-09-30 Chip anti-irradiation packaging material and anti-irradiation packaging process Pending CN113809050A (en)

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JPH11340385A (en) * 1998-05-27 1999-12-10 Furukawa Electric Co Ltd:The Resin-sealed semiconductor device
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US20140027887A1 (en) * 2012-07-26 2014-01-30 Stephen J. Wong Wafer backside doping for thermal neutron shielding
CN110491861A (en) * 2019-08-23 2019-11-22 杭州电子科技大学 A kind of radiation hardening substrat structure
RU2746355C1 (en) * 2020-09-15 2021-04-12 Федеральное государственное бюджетное образовательное учреждение высшего образования "Сибирский государственный университет науки и технологий имени академика М.Ф. Решетнева" (СибГУ им. М.Ф. Решетнева) Power supply system of aerospace aircraft electrodynamic vehicles
JP2021113267A (en) * 2020-01-17 2021-08-05 住友ベークライト株式会社 Thermosetting resin composition, electronic apparatus, method for producing thermally conductive material, and method for producing thermosetting resin composition

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55163864A (en) * 1979-06-06 1980-12-20 Hitachi Ltd Semiconductor device
US5057903A (en) * 1989-07-17 1991-10-15 Microelectronics And Computer Technology Corporation Thermal heat sink encapsulated integrated circuit
JPH11340385A (en) * 1998-05-27 1999-12-10 Furukawa Electric Co Ltd:The Resin-sealed semiconductor device
CN101386710A (en) * 2007-09-12 2009-03-18 住友化学株式会社 Insulating resin composition and its application
US20140027887A1 (en) * 2012-07-26 2014-01-30 Stephen J. Wong Wafer backside doping for thermal neutron shielding
CN110491861A (en) * 2019-08-23 2019-11-22 杭州电子科技大学 A kind of radiation hardening substrat structure
JP2021113267A (en) * 2020-01-17 2021-08-05 住友ベークライト株式会社 Thermosetting resin composition, electronic apparatus, method for producing thermally conductive material, and method for producing thermosetting resin composition
RU2746355C1 (en) * 2020-09-15 2021-04-12 Федеральное государственное бюджетное образовательное учреждение высшего образования "Сибирский государственный университет науки и технологий имени академика М.Ф. Решетнева" (СибГУ им. М.Ф. Решетнева) Power supply system of aerospace aircraft electrodynamic vehicles

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Application publication date: 20211217