Disclosure of Invention
The invention mainly aims to provide a semiconductor circuit, aiming at improving the speed of the semiconductor circuit for driving a power semiconductor device to be switched off so as to reduce the switching loss of the power semiconductor device and improve the operation efficiency and the high-frequency operation anti-interference capability.
In order to achieve the above object, the semiconductor circuit provided by the present invention is used for driving a three-phase inverter bridge, and includes a high-voltage driving circuit, a low-voltage driving circuit and a power circuit, where the power circuit includes a charge pump circuit, the charge pump circuit has a voltage input end and a voltage output end, the voltage input end is used for being electrically connected with a power supply, and the voltage output end is respectively electrically connected with a power supply end of the high-voltage driving circuit and a power supply end of the low-voltage driving circuit; the charge pump circuit is used for boosting the voltage input by the voltage input end and then outputting the boosted voltage from the voltage output end.
Preferably, the output voltage of the voltage output end of the charge pump circuit is 18V, the three paths of high-voltage driving output ends of the high-voltage driving circuit all output 18V driving PWM signals, and the three paths of low-voltage driving output ends of the low-voltage driving circuit all output 18V driving PWM signals.
Preferably, the charge pump circuit includes a voltage boost unit and a voltage stabilization unit, the voltage input terminal is electrically connected to the voltage output terminal through the voltage boost unit, and the voltage stabilization unit is electrically connected to the voltage output terminal; the voltage boosting unit boosts the input voltage of the voltage input end and outputs the boosted input voltage from the voltage output end, and the voltage stabilizing unit is used for stabilizing the output voltage of the voltage output end at a preset value.
Preferably, the boosting unit comprises an oscillating circuit, a first switching tube, a second switching tube, a first capacitor, a second capacitor, a third capacitor, a first diode and a second diode;
the voltage input end is electrically connected with the voltage output end through the first capacitor;
the voltage input end is electrically connected with the first conduction end and the on-off control end of the first switch tube through the first diode, and the voltage input end is electrically connected with the first conduction end and the on-off control end of the second switch tube through the second diode;
the second conducting end of the first switch tube and the second conducting end of the second switch tube are electrically connected with the voltage output end;
the first output end of the oscillating circuit is electrically connected with the on-off control end of the first switch tube through the second capacitor, and the second output end of the oscillating circuit is electrically connected with the on-off control end of the second switch tube through the third capacitor.
Preferably, the voltage stabilizing unit comprises a voltage stabilizing diode with a voltage stabilizing value of 18V, and the voltage output end is grounded through the voltage stabilizing diode.
Preferably, the power circuit further comprises an LDO circuit and a bandgap reference circuit, the LDO circuit is electrically connected to the high voltage driving circuit and the low voltage driving circuit respectively, and provides 5V voltage for the high voltage driving circuit and the voltage driving circuit; the band gap reference circuit is respectively and electrically connected with the high-voltage driving circuit and the low-voltage driving circuit and provides 1.2V voltage reference for the high-voltage driving circuit and the voltage driving circuit.
Preferably, the semiconductor circuit further comprises a power supply undervoltage protection circuit, and the power supply undervoltage protection circuit is electrically connected with the power supply circuit.
Preferably, the semiconductor circuit further comprises an interlock and dead zone circuit, and the high voltage driving circuit is electrically connected to the voltage driving circuit via the interlock and dead zone circuit.
Preferably, the semiconductor circuit further comprises an overcurrent protection circuit, an overvoltage protection circuit and an over-temperature protection circuit, and the high-voltage driving circuit and the low-voltage driving circuit are electrically connected with the overcurrent protection circuit, the overvoltage protection circuit and the over-temperature protection circuit.
Preferably, the semiconductor circuit further comprises an error reporting circuit, and the error reporting circuit is electrically connected with the overcurrent protection circuit, the overvoltage protection circuit and the over-temperature protection circuit respectively; and the error reporting circuit outputs an error reporting signal when the overcurrent protection circuit monitors overcurrent, and/or the overvoltage protection circuit monitors overvoltage, and/or the over-temperature protection circuit monitors over-temperature.
According to the technical scheme, the charge pump circuit is arranged in the power supply circuit, the voltage of the power supply is boosted through the charge pump circuit and then is output to the high-voltage driving circuit and the low-voltage driving circuit, so that the driving voltages output by the three high-voltage driving output ends of the high-voltage driving circuit and the three low-voltage driving output ends of the low-voltage driving circuit are all boosted, the speed of the three-phase inverter bridge driving a power semiconductor device (MOSFET) to be turned off is increased, the overall switching speed of the power semiconductor device is increased, the switching loss of the power semiconductor device is reduced, and the operating efficiency and the high-frequency operation anti-jamming capability are improved.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that all the directional indicators (such as up, down, left, right, front, and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.
It will also be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present.
In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
The semiconductor circuit provided by the invention is a circuit module which integrates a power switch device, a high-voltage driving circuit and the like together and is sealed and packaged on the outer surface, and is widely applied to the field of power electronics, such as the fields of frequency converters of driving motors, various inversion voltages, variable frequency speed regulation, metallurgical machinery, electric traction, variable frequency household appliances and the like. The semiconductor circuit herein may be referred to by various other names, such as Modular Intelligent Power System (MIPS), Intelligent Power Module (IPM), or hybrid integrated circuit, Power semiconductor Module, Power Module, etc. In the following embodiments of the present invention, collectively referred to as a Modular Intelligent Power System (MIPS).
The invention provides a semiconductor circuit for driving a three-phase inverter bridge.
Referring to fig. 1, in the present embodiment, the semiconductor circuit includes a high voltage driving circuit 10, a low voltage driving circuit 20 and a power supply circuit 30, the power supply circuit 30 includes a charge pump circuit 31, the charge pump circuit 31 has a voltage input terminal Vi for electrically connecting with a power supply and a voltage output terminal Vo electrically connecting a power supply terminal of the high voltage driving circuit 10 and a power supply terminal of the low voltage driving circuit 20, respectively; the charge pump circuit 31 is configured to boost the voltage input from the voltage input terminal Vi, and output the boosted voltage from the voltage output terminal Vo.
The high-voltage driving circuit 10 includes three high-voltage driving output ends Ho, the low-voltage driving circuit 20 includes three voltage driving high-voltage output ends Ho, the three high-voltage driving output ends Ho are respectively and correspondingly electrically connected to three upper bridge arms of the three-phase inverter bridge, and the three low-voltage driving output ends Lo are respectively and correspondingly and electrically connected to three lower bridge arms of the three-phase inverter bridge.
In the semiconductor circuit of this embodiment, the charge pump circuit 31 is built in the power circuit 30, and after the voltage of the power supply is boosted by the charge pump circuit 31, the output is supplied to the high-voltage driving circuit 10 and the low-voltage driving circuit 20, so that the driving voltages output by the three high-voltage driving output ends Ho of the high-voltage driving circuit 10 and the three low-voltage driving output ends Lo of the low-voltage driving circuit 20 are all raised, and thus the turn-off speed of the power semiconductor device (MOSFET) driving the three-phase inverter bridge is increased, and the overall switching speed of the power semiconductor device is increased, thereby reducing the switching loss of the power semiconductor device, and improving the operating efficiency and the high-frequency operation anti-interference capability.
In a preferred embodiment, the output voltage of the voltage output Vo of the charge pump circuit 31 is 18V, the three high-voltage driving outputs Ho of the high-voltage driving circuit 10 all output 18V driving PWM signals, and the three low-voltage driving outputs Lo of the low-voltage driving circuit 20 all output 18V driving PWM signals. The voltage of the power supply is raised to 18V output through the charge pump circuit 31 and is supplied to the high-voltage driving circuit 10 and the low-voltage driving circuit 20, the high-voltage driving circuit 10 and the third driving circuit output three paths of 18V driving PWM signals respectively, the driving capability is improved, different semiconductor power devices can be driven, the compatibility is stronger, the 18V driving PWM signals are compared with the existing 15V driving PWM signals, the turn-off speed of the semiconductor devices is greatly accelerated, the switching speed of the semiconductor devices is improved, the switching loss is reduced, and the anti-interference capability of higher efficiency and higher frequency operation can be realized.
It should be noted that, in other embodiments, the voltage output Vo of the charge pump circuit 31 may also output other voltage values (e.g., 17.5V, 18.5V, 19V, etc.) greater than 15V, so that the three high-voltage driving outputs Ho of the high-voltage driving circuit 10 and the three low-voltage driving outputs Lo of the low-voltage driving circuit 20 both output driving PWM signals with corresponding voltage magnitudes.
Further, referring to fig. 2, in the present embodiment, the charge pump circuit 31 includes a voltage boosting unit 311 and a voltage stabilizing unit 312, the voltage input terminal Vi is electrically connected to the voltage output terminal Vo through the voltage boosting unit 311, and the voltage stabilizing unit 312 is electrically connected to the voltage output terminal Vo; the boosting unit 311 boosts the input voltage of the voltage input terminal Vi and outputs the boosted voltage from the voltage output terminal Vo, and the voltage stabilizing unit 312 is configured to stabilize the output voltage of the voltage output terminal Vo at a preset value. The voltage boosting unit 311 boosts and raises the input voltage of the voltage input terminal Vi, and then outputs the boosted voltage from the voltage output terminal Vo, and the voltage stabilizing unit 312 stabilizes the voltage of the voltage output terminal Vo at a preset value (for example, 18V), so that the voltage value of the voltage output terminal Vo is kept stable, the voltage output by the voltage output terminal Vo cannot reach twice the input voltage of the voltage input terminal Vi, and the voltage output terminal Vo is prevented from outputting too high voltage.
Further, referring to fig. 3, in the present embodiment, the voltage boosting unit 311 includes an oscillation circuit, a first switching tube Q1, a second switching tube Q2, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first diode D1, and a second diode D2; wherein:
the voltage input end Vi is electrically connected with the voltage output end Vo through a first capacitor C1;
the voltage input end Vi is electrically connected with the first conduction end and the on-off control end of the first switch tube Q1 through a first diode D1, and the voltage input end Vi is electrically connected with the first conduction end and the on-off control end of the second switch tube Q2 through a second diode D2;
the second conducting end of the first switch tube Q1 and the second conducting end of the second switch tube are both electrically connected with the voltage output end Vo;
the first output end of the oscillating circuit is electrically connected with the on-off control end of the first switch tube Q1 through a second capacitor C2, and the second output end of the oscillating circuit is electrically connected with the on-off control end of the second switch tube Q2 through a third capacitor C3.
The operating principle of the boosting unit 311 in this embodiment is as follows: when the power supply is powered on, the 15V voltage of the power supply charges the first capacitor C1, and the voltage on the first capacitor C1 quickly rises to be close to the 15V voltage of the power supply; when the power supply rises from 0 to 15V, the oscillation circuit starts oscillating to alternately charge the second capacitor C2 and the third capacitor C3, and at the same time, the first switch tube Q1 and the second switch tube Q2 are alternately turned on (i.e. the second switch tube Q2 is turned off when the first switch tube Q1 is turned on, and the first switch tube Q1 is turned off when the second switch tube Q2 is turned on), the negative electrode potential of the first capacitor C1 is raised to be close to the power supply 15V, at this time, the positive electrode potential of the first capacitor C1 already exceeds the voltage of the power supply and is higher than the voltage of the second capacitor C2 and the third capacitor C3, the first capacitor C1 is continuously charged, due to the existence of the voltage stabilizing unit 312, the terminal voltage at the first capacitor C1 is charged to a preset value (for example, 18V), and the voltage stabilizing unit 312 stabilizes the terminal voltage at the first capacitor C1 at the preset value.
In a preferred embodiment, the first switch Q1 and the second switch Q2 both use NPN transistors, and the first conducting terminal, the second conducting terminal, and the on-off control terminal of the first switch Q1 and the second switch Q2 correspond to a collector, an emitter, and a base, respectively. Of course, in other embodiments, the first switching tube Q1 and the second switching tube Q2 may also adopt other switching tubes or devices having the same function, for example, MOS tubes.
Further, in the present embodiment, the voltage stabilizing unit 312 includes a zener diode D3 with a voltage stabilizing value of 18V, and the voltage output terminal Vo is grounded through the zener diode D3. The zener diode D3 stabilizes the voltage of the first capacitor C1 at 18V when the voltage is charged to 18V, thereby stably supplying 18V to the high voltage driving circuit 10 and the low voltage driving circuit 20. Of course, in other embodiments, the voltage regulator unit 312 may also adopt other devices or circuits for achieving the same function as the zener diode D3.
Referring to fig. 4, in the present embodiment, the power circuit 30 further includes an LDO circuit 32 and a bandgap reference circuit 33, where the LDO circuit 32 is electrically connected to the high voltage driving circuit 10 and the low voltage driving circuit 20, respectively, and provides 5V voltage for the high voltage driving circuit 10 and the voltage driving circuit; the bandgap reference circuit 33 is electrically connected to the high voltage driving circuit 10 and the low voltage driving circuit 20, and provides a voltage reference of 1.2V for the high voltage driving circuit 10 and the voltage driving circuit.
Referring to fig. 5, in the present embodiment, the semiconductor circuit further includes an under-voltage power protection circuit 40, and the under-voltage power protection circuit 40 is electrically connected to the power circuit 30 to implement an under-voltage power protection function and improve the safety of the semiconductor circuit. In an embodiment, the semiconductor circuit further comprises an enable circuit, which implements the enabling function.
In some embodiments, the semiconductor circuit further comprises an interlock and dead band circuit 50, and the high voltage driving circuit 10 is electrically connected to the voltage driving circuit via the interlock and dead band circuit 50. The interlock and deadband circuit 50 performs the functions of interlock and deadband. When the upper bridge driving input signal and the lower bridge driving input signal are simultaneously high level, the upper bridge driving output signal and the lower bridge driving output signal are simultaneously high level, so that the MOSFETs of the upper bridge arm and the lower bridge arm are simultaneously conducted to cause overcurrent, an interlocking circuit is introduced, and when the upper bridge driving input signal and the lower bridge driving input signal are simultaneously high level, the upper bridge driving output signal and the lower bridge driving output signal are simultaneously set to be low level.
In some embodiments, the semiconductor circuit further includes an overcurrent protection circuit 60, an overvoltage protection circuit 70, and an over-temperature protection circuit 80, and the high-voltage driving circuit 10 and the low-voltage driving circuit 20 are electrically connected to the overcurrent protection circuit 60, the overvoltage protection circuit 70, and the over-temperature protection circuit 80. The overcurrent protection circuit 60 monitors whether the currents in the high-voltage drive circuit 10 and the low-voltage drive circuit 20 are overcurrent or not, and executes overcurrent protection processing when an overcurrent condition occurs; the overvoltage protection circuit 70 monitors whether the currents in the high voltage driving circuit 10 and the low voltage driving circuit 20 are overvoltage or not, and executes overvoltage protection processing when an overvoltage condition occurs; the over-temperature protection circuit 80 monitors the temperature of the semiconductor circuit and performs an over-temperature protection process when an over-temperature or over-cooling condition occurs. By adding the overcurrent protection circuit 60, the overvoltage protection circuit 70 and the overcurrent protection circuit 60, the safety of the semiconductor circuit is effectively guaranteed.
Further, in the present embodiment, the semiconductor circuit further includes an error reporting circuit 90, and the error reporting circuit 90 is electrically connected to the overcurrent protection circuit 60, the overvoltage protection circuit 70, and the over-temperature protection circuit 80, respectively; the error reporting circuit 90 outputs an error reporting signal when the overcurrent protection circuit 60 detects overcurrent, and/or the overvoltage protection circuit 70 detects overvoltage, and/or the over-temperature protection circuit 80 detects over-temperature. When the abnormal conditions (such as overcurrent, overvoltage and overtemperature) of the semiconductor circuit are monitored, the error reporting circuit 90 outputs an error reporting signal to the outside, so that a user can find and process the abnormal conditions in time, and serious consequences caused by the fact that the abnormal conditions are not found in time are avoided.
The above description is only a part of or preferred embodiments of the present invention, and neither the text nor the drawings should be construed as limiting the scope of the present invention, and all equivalent structural changes, which are made by using the contents of the present specification and the drawings, or any other related technical fields, are included in the scope of the present invention.