CN113555287B - Preparation method of moisture triggered degradation P-type transient thin film transistor - Google Patents

Abstract

The invention discloses a preparation method of a moisture-triggered degradation P-type transient transistor, which comprises the following steps: depositing an insulating layer on the polished side of the iron foil substrate to obtain a first sample; depositing an active layer material on the first sample to obtain a second sample; depositing a source-drain electrode material on the second sample to obtain a third sample, and annealing the third sample to obtain a fourth sample; coating a silk fibroin aqueous solution with the concentration of 6% on the surface of a fourth sample, and drying to obtain a fifth sample; covering a protective layer mask plate on the unpolished substrate of the fifth sample, and depositing a protective layer material to obtain a sixth sample; fixing the sixth sample in a clamp, and immersing the sixth sample in dilute hydrochloric acid to dissolve the iron foil substrate in the sixth sample to obtain a seventh sample; and placing the seventh sample in electron beam evaporation equipment, and evaporating a gate electrode to obtain the p-type thin film transistor triggered and degraded by moisture. Can overcome the limitation of the heat resistance of the substrate material on the preparation temperature of the device.

Description

A kind of preparation method of P-type transient thin film transistor with moisture-triggered degradation

technical field

The invention relates to a preparation method of a P-type transient thin film transistor with moisture-triggered degradation.

Background technique

Traditional silicon-based electronic devices have the advantage of being strong and durable, but everything has two sides. Too strong also limits its application in some special fields, such as the medical field. After traditional devices are implanted into the human body, they are used for treatment or monitoring tasks. Afterwards, a second operation is required to remove the device, destroying the healed tissue, causing great pain to the patient and increasing the risk of postoperative complications; in the military field, once traditional devices fall into the hands of the enemy, they can be easily cracked, causing Confidential disclosure. In recent years, the emergence of degradable transient electronic devices can solve the above problems well. Transient electronic devices are generally composed of degradable substrate materials, semiconductor functional materials and electrode materials. After the function, the physical form and function of the transient electronic device can be completely or partially disappeared under the trigger of external stimuli. This emerging electronic device will have very broad application prospects in biomedical, information security, environmental protection and so on. The methods of triggering transient device degradation include moisture triggering, thermal triggering, light triggering, acid/base triggering, and biodegradation. Among them, transient electronic devices triggered by moisture have unique advantages in the field of implantable degradable medical electronic devices because they can be dissolved in human body fluids.

There are many types of electronic devices, and transistors are one of the most important core devices. At present, some researchers have fabricated transient transistor devices on degradable polymer substrates or protein substrates. Although there have been some successful precedents, it is still challenging to fabricate electronic devices on protein substrates. First, protein substrates generally have poor thermal resistance, and the decomposition temperature generally does not exceed 200 °C, while for the growth of semiconductor materials , a higher temperature is beneficial to improve the crystalline quality of the material, reduce defects, and thus improve device performance. Limited by the heat resistance of the base material, the fabrication temperature of the degradable transient device is lower than the decomposition temperature of the base material, which seriously affects the performance of the semiconductor device. Secondly, protein substrates have poor resistance to acid/alkali and organic solvents. During the preparation of semiconductor devices, acid/alkali, organic solvents or plasma are usually used for treatment. These harsh processing conditions will damage the protein substrate and then damage the semiconductor device. . Therefore, the fabrication process conditions of semiconductor devices need to make concessions to the heat resistance and acid/alkali resistance of protein substrates. Some material systems can achieve better performance at lower preparation temperature, such as n-type AZO-TFT, TZO-TFT, AZTO-TFT, etc., but some materials still require high temperature process to achieve ideal performance, such as p-type Oxides, in which SnO-TFT needs to be annealed at 200-300 °C, and Cu _x O-TFT needs to be annealed at 500 °C. Therefore, the poor thermal resistance of degradable base materials severely limits the application of semiconductor materials and devices that require high-temperature processes in the field of degradable devices. In addition, for transient devices with moisture-triggered degradation, how to keep water-soluble protein substrates away from acids/bases and solvents during device fabrication is another thorny issue.

SUMMARY OF THE INVENTION

The invention designs and develops a P-type transient thin film transistor preparation method with moisture-triggered degradation. The transistor device is prepared on a single-sided polished iron foil substrate, which overcomes the limitation of the heat resistance of the substrate material on the preparation temperature of the device, and is beneficial to improving the The device performance is also avoided from the damage of the water-soluble protein substrate by the aqueous solution during the device preparation process.

The technical scheme provided by the present invention is:

A method for preparing a P-type transient thin film transistor with moisture-triggered degradation, comprising:

Step 1, placing the iron foil substrate polished on one side in a plasma enhanced chemical vapor deposition device, and depositing an insulating layer on the polished side of the iron foil substrate to obtain a first sample;

Step 2, covering the active layer template on the first sample, and depositing the active layer material in the radio frequency magnetron sputtering equipment to obtain the second sample;

Step 3: Cover the source-drain electrode mask on the second sample, and place it in a thermal evaporation stage for source-drain electrode material deposition to obtain a third sample, which is placed in a rapid annealing furnace for Annealing to obtain a fourth sample;

Step 4, coating the surface of the fourth sample with an aqueous solution of silk fibroin with a concentration of 6%, and drying to obtain the fifth sample;

Step 5, covering the protective layer mask on the unpolished substrate of the fifth sample, and depositing the protective layer material in the radio frequency magnetron sputtering equipment to obtain the sixth sample;

Step 6, fixing the sixth sample in the fixture, and immersing it in dilute hydrochloric acid to dissolve the iron foil substrate in the sixth sample to obtain the seventh sample;

Wherein, in the sixth sample, the polished side of the iron foil base faces the lower plate of the fixture, and the unpolished side faces the upper plate of the fixture;

Step 7: The seventh sample is placed in the electron beam evaporation equipment, and the gate electrode is evaporated to obtain a p-type thin film transistor with moisture-triggered degradation.

Preferably, the step 1 includes:

Deposit _SiO2 insulating layer material on the polished side of iron foil substrate;

Among them, the radio frequency power is 50-100W, the deposition temperature is 150-250°C, the pressure is 0.2-0.6torr, the _SiH4 flow rate is 20-40sccm, the _N2O flow rate is 80-150sccm, and the _SiO2 film thickness is 150-250nm.

Preferably, the second step includes:

The active layer material is SnO, and a metal Sn target is used to deposit the active layer material;

Among them, the sputtering power is 25-35 W, the temperature is room temperature, the pressure is 5-7 mtorr, the Ar/O ₂ is 9:1-2:1, the deposition time is 10-20 min, and the film thickness is 45-70 nm.

Preferably, the step 3 includes:

The electrode material used is Au, with a thickness of 50-100 nm;

The distance between adjacent source and drain electrodes is 10 μm to 1 mm;

The annealing temperature is 250～350℃, and the annealing time is 25～40min.

Preferably, the step 4 includes:

The protective layer material is HfO ₂ , the sputtering power is 100-250W, the temperature is 25-200° C., the pressure is 8-20mtorr, the Ar/O ₂ is 9:1-2:1, and the deposition time is 50-150min, The film thickness is 50 to 200 nm.

Preferably, the step 6 includes:

The clamp includes an upper clamp plate and a lower clamp plate, the clamp upper plate and the clamp lower plate are both rectangular, the center of the clamp lower plate is provided with a rectangular groove, and the center of the clamp upper plate is provided with a through hole ;

The concentration of the dilute hydrochloric acid is: 1-30wt%.

Preferably, the step 7 includes:

The electrode material is Al, and the electrode thickness is 50-200 nm.

Preferably,

In the first step, the radio frequency power is 50W, the deposition temperature is 200°C, the pressure is 0.2torr, the flow rate of _SiH4 is 20sccm, the flow rate of _N2O is 80sccm, and the thickness of the _SiO2 film is 150nm;

In the second step, the sputtering power is 25W, the temperature is room temperature, the pressure is 5mtorr, the Ar/O is 9: ₁ , the deposition time is 10min, and the film thickness is 45nm;

In the third step, the electrode material used is Au, and the thickness is 50 nm;

The distance between adjacent source and drain electrodes is: 10 μm;

The annealing temperature is: 250℃, and the annealing time is 25min;

In the fourth step, the sputtering power is 100W, the temperature is 25°C, the pressure is 8mtorr, the Ar/O ₂ is 2:1, the deposition time is 50min, and the film thickness is 50nm;

In the step 6, the concentration of the dilute hydrochloric acid is: 1wt%;

In the seventh step, the thickness of the electrode is 50 nm.

The beneficial effects of the present invention:

In the method for preparing a p-type transient thin film transistor with moisture-triggered degradation provided by the present invention, the semiconductor device is first prepared on a single-sided polished iron foil substrate with good heat resistance, and then a solution of degradable substrate material is drop-coated on the device. , after the solvent evaporates, the unpolished side of the iron foil is exposed to dilute hydrochloric acid solution, and the iron foil is dissolved. Due to the isolation effect of the insulating layer, the damage of the hydrochloric acid solution to the protein substrate is effectively prevented, and finally the gate electrode is prepared to obtain moisture. The p-type transient thin film transistor device that triggers degradation can prepare devices that need to undergo high-temperature treatment on a substrate with poor heat resistance, overcomes the limitation of the heat resistance of the substrate material on the preparation temperature of the device, and is conducive to improving device performance. At the same time, it also avoids the damage of the water-soluble protein substrate by the aqueous solution during the device preparation process, making it possible to prepare transient electronic devices that are degraded by moisture and require high temperature treatment.

Description of drawings

FIG. 1 is a schematic structural diagram of the insulating layer deposition according to the present invention.

FIG. 2 is a schematic structural diagram of the active layer mask according to the present invention.

FIG. 3 is a schematic structural diagram of the active layer deposition according to the present invention.

FIG. 4 is a schematic structural diagram of the source-drain electrode mask according to the present invention.

FIG. 5 is a schematic structural diagram of the deposition of Au source-drain electrodes according to the present invention.

FIG. 6 is a schematic structural diagram of the protein film according to the present invention.

FIG. 7 is a schematic structural diagram of the protective layer mask according to the present invention.

FIG. 8 is a schematic structural diagram of the protective layer mask covering the unpolished side of the iron foil substrate according to the present invention.

FIG. 9 is a schematic structural diagram of the HfO ₂ protective layer according to the present invention.

FIG. 10 is a schematic structural diagram of the clamp and the HfO ₂ protective layer according to the present invention.

FIG. 11 is a schematic diagram of the structure of removing the iron foil substrate.

FIG. 12 is a schematic structural diagram of a p-type SnO thin film transistor with moisture-triggered degradation obtained after gate electrode deposition.

Detailed ways

The present invention will be further described in detail below with reference to the accompanying drawings, so that those skilled in the art can implement it with reference to the description.

As shown in Figures 1-12, the present invention provides a method for preparing a P-type transient thin film transistor with moisture-triggered degradation. First, the semiconductor device is prepared on a single-sided polished iron foil substrate with good heat resistance, and then the degradable substrate is The solution of the material is dripped on the device. After the solvent evaporates, the unpolished side of the iron foil is exposed to dilute hydrochloric acid solution to dissolve the iron foil. Due to the isolation effect of the insulating layer, the hydrochloric acid solution can effectively prevent the protein substrate. Finally, the gate electrode is prepared to obtain a p-type transient thin film transistor device with moisture-triggered degradation, including: iron foil substrate 100, SiO ₂ insulating layer 200, active layer mask 310, SnO active layer 320, source-drain electrode mask Template 410, Au source-drain electrodes 420, silk fibroin film substrate 500, protective layer mask 610, HfO ₂ protective layer 620, fixture upper plate 710, fixture lower plate 720, Al gate electrode 800, specifically including:

Step 1, placing the iron foil substrate polished on one side in a plasma enhanced chemical vapor deposition device, and depositing an insulating layer on the polished side of the iron foil substrate to obtain a first sample;

Step 2, covering the active layer template on the first sample, and depositing the active layer material in the radio frequency magnetron sputtering equipment to obtain the second sample;

Step 3: Cover the source-drain electrode mask on the second sample, and place it in a thermal evaporation stage for source-drain electrode material deposition to obtain a third sample, which is placed in a rapid annealing furnace for Annealing to obtain a fourth sample;

Step 4, coating the surface of the fourth sample with an aqueous solution of silk fibroin with a concentration of 6%, and drying to obtain the fifth sample;

Step 5, covering the protective layer mask on the unpolished substrate of the fifth sample, and depositing the protective layer material in the radio frequency magnetron sputtering equipment to obtain the sixth sample;

Step 6: Fix the sixth sample in the fixture, and immerse it in dilute hydrochloric acid to dissolve the iron foil substrate in the sixth sample to obtain the seventh sample;

Wherein, in the sixth sample, the polished side of the iron foil base faces the lower plate of the fixture, and the unpolished side faces the upper plate of the fixture;

Step 7. The seventh sample is placed in the electron beam evaporation equipment, and the gate electrode 800 is evaporated to obtain a p-type thin film transistor with moisture-triggered degradation, including:

1. Deposition of insulating layer

The single-side polished iron foil substrate 100 is placed in a plasma enhanced chemical vapor deposition (PECVD) equipment, and a SiO ₂ insulating layer 200 material is deposited on the polished side, wherein the radio frequency power range is 50-100W, and the temperature range is 150- 250°C, pressure range 0.2~0.6torr, _SiH4 flow range 20~40sccm, _N2O flow range 80~150sccm, _SiO2 film thickness range 150~250nm to obtain the first sample, as shown in Figure 1.

2. Active layer deposition

As shown in FIG. 2, an active layer mask 310 with an active pattern is covered on the first sample, and it is placed in a radio frequency magnetron sputtering equipment to deposit the active layer material. In the present invention As a preference, the active layer material is SnO, a metal Sn target is used, and the SnO active layer 320 is obtained by reactive sputtering, wherein the sputtering power range is 25-35W, the temperature is room temperature, and the pressure range is 5-7mtorr , the Ar/O ₂ range is 9:1 to 2:1, the deposition time range is 10 to 20 min, and the film thickness is 45 to 70 nm to obtain a second sample, as shown in FIG. 3 .

3. Source-drain electrode deposition

As shown in FIG. 4 , a source-drain mask 410 with a source-drain electrode pattern is covered on the second sample, and it is placed in a thermal evaporation stage to perform source-drain electrode material deposition. In the present invention, as a kind of Preferably, the electrode material used is Au, and the thickness is 50-100 nm to obtain a third sample, as shown in FIG. 5 . The distance between the source and drain electrodes defines the channel length of the transistor device. According to different requirements, the channel length can be different, ranging from 10 μm to 1 mm.

4. Active layer annealing

The obtained third sample is placed in a rapid annealing furnace, and annealed at 250-350° C. for 25-40 min to obtain a fourth sample.

5. Preparation of protein films

A silk fibroin aqueous solution with a concentration of 6 wt % is coated on the surface of the fourth sample, and is prevented from being dried in a drying oven. After the solvent in the protein solution is evaporated, a silk fibroin film is formed on the surface of the fourth sample, and This can be used as a silk fibroin membrane substrate 500 to obtain a fifth sample, as shown in FIG. 6 .

6. Preparation of iron foil protective layer

As shown in FIGS. 7 and 8 , the mask plate 610 with the protective layer pattern is covered on the unpolished surface of the iron foil substrate 100 in the fifth sample, and placed in a radio frequency magnetron sputtering equipment to deposit the protective layer material , the function of the protective layer is to prevent the position where the edge of the iron foil plays a fixed role from being corroded in the subsequent process of removing the iron foil substrate. In the present invention, as a preference, the protective layer material is HfO ₂ , and a ceramic HfO ₂ target is used The HfO ₂ protective layer 620 is obtained by sputtering, the sputtering power range is 100-250W, the temperature is 25-200°C, the pressure range is 8-20mtorr, the Ar/O ₂ range is 9:1-2:1, and the deposition time range is 50- 150min, the film thickness is 50-200nm, and the sixth sample is obtained, as shown in FIG. 9 .

7. Remove the iron foil base

As shown in FIG. 10, the sixth sample is placed in a fixture, the fixture includes: a fixture upper plate 710 and a fixture lower plate 720, the fixture lower plate 710 is a rectangular structure, and a rectangular groove is opened in the center position for accommodating the protein substrate and semiconductor devices; the upper plate 710 of the fixture is of a rectangular structure and is matched with the lower plate 720 of the fixture, and the size is the same as that of the lower plate 720 of the fixture. In the subsequent process, the solution reacts with the iron foil through the through hole. In the present invention, as a preference, the upper clamp plate 710 and the lower clamp plate 720 are made of acid-resistant materials.

In the sixth sample, the polished side of the iron foil faces the lower jig plate 710, and the unpolished side faces the upper jig plate 710. The upper jig plate 710 and the lower jig plate 720 are tightly fixed around to prevent the solution from entering the recess of the jig in the subsequent process. The groove portion in turn destroys the protein substrate. Immerse the fixed fixture in a dilute hydrochloric acid solution with a concentration of 1-30wt% to etch the iron foil substrate. Since _SiO2 is insoluble in dilute hydrochloric acid, it can effectively prevent the silk fibroin film substrate from being dissolved. At the same time, the silk fibroin substrate is The transistor device provides support to prevent rupture under the action of external force. After the iron foil substrate 100 is dissolved, the fixture is cleaned with deionized water, and dried at room temperature. The fixture is removed, and the surrounding HfO ₂ protective layer is removed. The corroded iron foil area, a seventh sample was obtained, as shown in FIG. 11 . The p-type thin film transistor device is about to be transferred onto the silk fibroin substrate 500 .

The seventh sample is placed in an electron beam evaporation (EB) device, and a gate electrode 800 is evaporated on the surface of the _SiO2 insulating layer 200, as shown in FIG. 12, in the present invention, as a preferred, the electrode material is Al, The electrode thickness ranges from 50 to 200 nm, and finally a p-type SnO thin film transistor with moisture-triggered degradation is obtained on the silk fibroin substrate. The switching ratio of p-type thin film transistors can reach the 4th power of 10. The transient device is placed in water, and the silk fibroin substrate can be hydrolyzed within 30 minutes, while the semiconductor functional layer is broken due to the loss of support, achieving degradation.

Example 1

1. Deposition of insulating layer

The single-side polished iron foil substrate 100 is placed in a plasma-enhanced chemical vapor deposition (PECVD) equipment, and a SiO ₂ insulating layer 200 material is deposited on the polished side, wherein the radio frequency power range is 50W, the temperature is 200 ° C, and the pressure is 0.2torr, _SiH4 flow rate is 20sccm, _N2O flow rate is 80sccm, _SiO2 film thickness is 150nm, and the first sample is obtained, as shown in Figure 1.

2. Active layer deposition

As shown in FIG. 2, an active layer mask 310 with an active pattern is covered on the first sample, and it is placed in a radio frequency magnetron sputtering equipment to deposit the active layer material. In the present invention As a preference, the active layer material is SnO, a metal Sn target is used, and the SnO active layer 320 is obtained by reactive sputtering, wherein the sputtering power is 25W, the temperature is room temperature, the pressure is 5mtorr, and the Ar/O ₂ is 9:1, the deposition time was 10 min, and the film thickness was 45 nm to obtain the second sample, as shown in Figure 3.

3. Source-drain electrode deposition

As shown in FIG. 4 , a source-drain mask 410 with a source-drain electrode pattern is covered on the second sample, and it is placed in a thermal evaporation stage to perform source-drain electrode material deposition. In the present invention, as a kind of Preferably, the electrode material used is Au, and the thickness is 50 nm to obtain a third sample, as shown in FIG. 5 . The distance between the source and drain electrodes defines the channel length of the transistor device. In this embodiment, as a preference, the channel length is 10 μm.

4. Active layer annealing

The obtained third sample was placed in a rapid annealing furnace, and annealed at 250° C. for 25 minutes to obtain a fourth sample.

5. Preparation of protein films

A silk fibroin aqueous solution with a concentration of 6 wt % is coated on the surface of the fourth sample, and is prevented from being dried in a drying oven. After the solvent in the protein solution is evaporated, a silk fibroin film is formed on the surface of the fourth sample, and This can be used as a silk fibroin membrane substrate 500 to obtain a fifth sample, as shown in FIG. 6 .

6. Preparation of iron foil protective layer

As shown in FIGS. 7 and 8 , the mask plate 610 with the protective layer pattern is covered on the unpolished surface of the iron foil substrate 100 in the fifth sample, and placed in a radio frequency magnetron sputtering equipment to deposit the protective layer material , the function of the protective layer is to prevent the position where the edge of the iron foil plays a fixed role from being corroded in the subsequent process of removing the iron foil substrate. In the present invention, as a preference, the protective layer material is HfO ₂ , and a ceramic HfO ₂ target is used The _HfO2 protective layer 620 was obtained by sputtering, the sputtering power was 100W, the temperature was 25°C, the pressure was 8mtorr, the Ar/ _O2 was 2:1, the deposition time was 50min, and the film thickness was 50nm, and the sixth sample was obtained, as shown in the figure 9 shown.

7. Remove the iron foil base

As shown in FIG. 10, the sixth sample is placed in a fixture, the fixture includes: a fixture upper plate 710 and a fixture lower plate 720, the fixture lower plate 710 is a rectangular structure, and a rectangular groove is opened in the center position for accommodating the protein substrate and semiconductor devices; the upper plate 710 of the fixture is of a rectangular structure and is matched with the lower plate 720 of the fixture, and the size is the same as that of the lower plate 720 of the fixture. In the subsequent process, the solution reacts with the iron foil through the through hole. In the present invention, as a preference, the upper clamp plate 710 and the lower clamp plate 720 are made of acid-resistant materials.

In the sixth sample, the polished side of the iron foil faces the lower jig plate 710, and the unpolished side faces the upper jig plate 710. The upper jig plate 710 and the lower jig plate 720 are tightly fixed around to prevent the solution from entering the recess of the jig in the subsequent process. The groove portion in turn destroys the protein substrate. Immerse the fixed fixture in a dilute hydrochloric acid solution with a concentration of 1wt% to etch the iron foil substrate. Since _SiO2 is insoluble in dilute hydrochloric acid, it can effectively prevent the silk fibroin film substrate from being dissolved. At the same time, the silk fibroin substrate is a transistor device Provide support to prevent rupture under the action of external force. After the iron foil base 100 is dissolved, clean the fixture with deionized water and dry it at room temperature. Remove the fixture and remove the surrounding HfO ₂ protective layer without corrosion. , the seventh sample was obtained, as shown in Figure 11. The p-type thin film transistor device is about to be transferred onto the silk fibroin substrate 500 .

The seventh sample is placed in an electron beam evaporation (EB) device, and a gate electrode 800 is evaporated on the surface of the _SiO2 insulating layer 200, as shown in FIG. 12, in the present invention, as a preferred, the electrode material is Al, The electrode thickness is 50 nm, and finally a p-type SnO thin film transistor with moisture-triggered degradation is obtained on the silk fibroin substrate.

Example 2

1. Deposition of insulating layer

The single-side polished iron foil substrate 100 is placed in a plasma-enhanced chemical vapor deposition (PECVD) equipment, and a SiO ₂ insulating layer 200 material is deposited on the polished side, wherein the radio frequency power range is 50W, the temperature range is 150°C, and the pressure The range is 0.3 torr, the flow range of SiH ₄ is 30 sccm, the flow range of N ₂ O is 100 sccm, and the thickness of the SiO ₂ film is 170 nm to obtain the first sample, as shown in FIG. 1 .

2. Active layer deposition

As shown in FIG. 2, an active layer mask 310 with an active pattern is covered on the first sample, and it is placed in a radio frequency magnetron sputtering equipment to deposit the active layer material. In the present invention As a preference, the active layer material is SnO, a metal Sn target is used, and the SnO active layer 320 is obtained by reactive sputtering, wherein the sputtering power range is 30W, the temperature is room temperature, the pressure range is 6mtorr, Ar/O ₂ with a range of 7:1, a deposition time range of 13 min, and a film thickness of 65 nm to obtain a second sample, as shown in Figure 3.

3. Source-drain electrode deposition

As shown in FIG. 4 , a source-drain mask 410 with a source-drain electrode pattern is covered on the second sample, and it is placed in a thermal evaporation stage to perform source-drain electrode material deposition. In the present invention, as a kind of Preferably, the electrode material used is Au, and the thickness is 100 nm to obtain a third sample, as shown in FIG. 5 . The distance between the source and drain electrodes defines the channel length of the transistor device, and in the present invention, the channel length is 1 mm.

4. Active layer annealing

The obtained third sample was placed in a rapid annealing furnace, and annealed at 300° C. for 20 minutes to obtain a fourth sample.

5. Preparation of protein films

A silk fibroin aqueous solution with a concentration of 6 wt % is coated on the surface of the fourth sample, and is prevented from being dried in a drying oven. After the solvent in the protein solution is evaporated, a silk fibroin film is formed on the surface of the fourth sample, and This can be used as a silk fibroin membrane substrate 500 to obtain a fifth sample, as shown in FIG. 6 .

6. Preparation of iron foil protective layer

As shown in FIGS. 7 and 8 , the mask plate 610 with the protective layer pattern is covered on the unpolished surface of the iron foil substrate 100 in the fifth sample, and placed in a radio frequency magnetron sputtering equipment to deposit the protective layer material , the function of the protective layer is to prevent the position where the edge of the iron foil plays a fixed role from being corroded in the subsequent process of removing the iron foil substrate. In the present invention, as a preference, the protective layer material is HfO ₂ , and a ceramic HfO ₂ target is used The _HfO2 protective layer 620 was obtained by sputtering, the sputtering power range was 250W, the temperature was 200°C, the pressure range was 20mtorr, the Ar/ _O2 range was 2:1, the deposition time range was 150min, and the film thickness was 200nm. The sixth sample was obtained, As shown in Figure 9.

7. Remove the iron foil base

As shown in FIG. 10, the sixth sample is placed in a fixture, the fixture includes: a fixture upper plate 710 and a fixture lower plate 720, the fixture lower plate 710 is a rectangular structure, and a rectangular groove is opened in the center position for accommodating the protein substrate and semiconductor devices; the upper plate 710 of the fixture is of a rectangular structure and is matched with the lower plate 720 of the fixture, and the size is the same as that of the lower plate 720 of the fixture. In the subsequent process, the solution reacts with the iron foil through the through hole. In the present invention, as a preference, the upper clamp plate 710 and the lower clamp plate 720 are made of acid-resistant materials.

In the sixth sample, the polished side of the iron foil faces the lower jig plate 710, and the unpolished side faces the upper jig plate 710. The upper jig plate 710 and the lower jig plate 720 are tightly fixed around to prevent the solution from entering the recess of the jig in the subsequent process. The groove portion in turn destroys the protein substrate. Immerse the fixed fixture in a dilute hydrochloric acid solution with a concentration of 50wt% to etch the iron foil substrate. Since _SiO2 is insoluble in dilute hydrochloric acid, it can effectively prevent the silk fibroin film substrate from being dissolved. At the same time, the silk fibroin substrate is a transistor device Provide support to prevent rupture under the action of external force. After the iron foil base 100 is dissolved, clean the fixture with deionized water and dry it at room temperature. Remove the fixture and remove the surrounding HfO ₂ protective layer without corrosion. , the seventh sample was obtained, as shown in Figure 11. The p-type thin film transistor device is about to be transferred onto the silk fibroin substrate 500 .

The seventh sample is placed in an electron beam evaporation (EB) device, and a gate electrode 800 is evaporated on the surface of the _SiO2 insulating layer 200, as shown in FIG. 12, in the present invention, as a preferred, the electrode material is Al, The electrode thickness range is 200 nm, and finally a p-type SnO thin film transistor with moisture-triggered degradation is obtained on the silk fibroin substrate.

Example 3

1. Deposition of insulating layer

The single-side polished iron foil substrate 100 is placed in a plasma-enhanced chemical vapor deposition (PECVD) equipment, and a SiO ₂ insulating layer 200 material is deposited on the polished side, wherein the radio frequency power range is 50W, the temperature is 200 ° C, and the pressure is 0.2torr, _SiH4 flow rate is 25sccm, _N2O flow rate is 100sccm, _SiO2 film thickness is 200nm, and the first sample is obtained, as shown in Figure 1.

2. Active layer deposition

As shown in FIG. 2, an active layer mask 310 with an active pattern is covered on the first sample, and it is placed in a radio frequency magnetron sputtering equipment to deposit the active layer material. In the present invention As a preference, the active layer material is SnO, a metal Sn target is used, and the SnO active layer 320 is obtained by reactive sputtering, wherein the sputtering power is 25W, the temperature is room temperature, the pressure is 5mtorr, and the Ar/O ₂ is 9:1, the deposition time was 10 min, and the film thickness was 50 nm to obtain the second sample, as shown in FIG. 3 .

3. Source-drain electrode deposition

As shown in FIG. 4 , a source-drain mask 410 with a source-drain electrode pattern is covered on the second sample, and it is placed in a thermal evaporation stage to perform source-drain electrode material deposition. In the present invention, as a kind of Preferably, the electrode material used is Au with a thickness of 50 nm, and a third sample is obtained, as shown in FIG. 5 . The distance between the source and drain electrodes defines the channel length of the transistor device. In this embodiment, as a preference, the channel length is 50 μm.

4. Active layer annealing

The obtained third sample was placed in a rapid annealing furnace, and annealed at 250° C. for 30 min to obtain a fourth sample.

5. Preparation of protein films

A silk fibroin aqueous solution with a concentration of 6 wt % is coated on the surface of the fourth sample, and placed in a drying oven for drying. After the solvent in the protein solution is evaporated, a silk fibroin film is formed on the surface of the fourth sample, and This can be used as a silk fibroin membrane substrate 500 to obtain a fifth sample, as shown in FIG. 6 .

6. Preparation of iron foil protective layer

As shown in FIGS. 7 and 8 , the mask plate 610 with the protective layer pattern is covered on the unpolished surface of the iron foil substrate 100 in the fifth sample, and placed in a radio frequency magnetron sputtering equipment to deposit the protective layer material , the function of the protective layer is to prevent the position where the edge of the iron foil plays a fixed role from being corroded in the subsequent process of removing the iron foil substrate. In the present invention, as a preference, the protective layer material is HfO ₂ , and a ceramic HfO ₂ target is used The _HfO2 protective layer 620 was obtained by sputtering, the sputtering power was 150W, the temperature was 30°C, the pressure was 8mtorr, the Ar/ _O2 was 9:1, the deposition time was 120min, and the film thickness was 200nm, and the sixth sample was obtained, as shown in the figure 9 shown.

7. Remove the iron foil base

As shown in FIG. 10, the sixth sample is placed in a fixture, the fixture includes: a fixture upper plate 710 and a fixture lower plate 720, the fixture lower plate 710 is a rectangular structure, and a rectangular groove is opened in the center position for accommodating the protein substrate and semiconductor devices; the upper plate 710 of the fixture is of a rectangular structure and is matched with the lower plate 720 of the fixture, and the size is the same as that of the lower plate 720 of the fixture. In the subsequent process, the solution reacts with the iron foil through the through hole. In the present invention, as a preference, the upper clamp plate 710 and the lower clamp plate 720 are made of acid-resistant materials.

In the sixth sample, the polished side of the iron foil faces the lower jig plate 710, and the unpolished side faces the upper jig plate 710. The upper jig plate 710 and the lower jig plate 720 are tightly fixed around to prevent the solution from entering the recess of the jig in the subsequent process. The groove portion in turn destroys the protein substrate. Immerse the fixed fixture in a dilute hydrochloric acid solution with a concentration of 10wt% to etch the iron foil substrate. Since _SiO2 is insoluble in dilute hydrochloric acid, it can effectively prevent the silk fibroin film substrate from being dissolved. At the same time, the silk fibroin substrate is a transistor device Provide support to prevent rupture under the action of external force. After the iron foil base 100 is dissolved, clean the fixture with deionized water and dry it at room temperature. Remove the fixture and remove the surrounding HfO ₂ protective layer without corrosion. , the seventh sample was obtained, as shown in Figure 11. The p-type thin film transistor device is about to be transferred onto the silk fibroin substrate 500 .

The seventh sample was placed in an electron beam evaporation (EB) device, and a grid electrode was evaporated on the surface of the SiO ₂ insulating layer 200, as shown in Figure 12. In the present invention, as a preference, the electrode material is Al, and the electrode With a thickness of 50 nm, a p-type SnO thin film transistor with moisture-triggered degradation was finally obtained on the silk fibroin substrate.

Example 4

1. Deposition of insulating layer

The single-side polished iron foil substrate 100 is placed in a plasma-enhanced chemical vapor deposition (PECVD) equipment, and a SiO ₂ insulating layer 200 material is deposited on the polished side, wherein the radio frequency power range is 100W, the temperature is 250 ° C, and the pressure is 0.6 torr, SiH ₄ flow rate of 40 sccm, N ₂ O flow rate of 150 sccm, and SiO ₂ film thickness of 250 nm, the first sample was obtained, as shown in Figure 1.

2. Active layer deposition

As shown in FIG. 2, an active layer mask 310 with an active pattern is covered on the first sample, and it is placed in a radio frequency magnetron sputtering equipment to deposit the active layer material. In the present invention As a preference, the active layer material is SnO, a metal Sn target is used, and the SnO active layer 320 is obtained by reactive sputtering, wherein the sputtering power is 35W, the temperature is room temperature, the pressure is 7mtorr, and the Ar/O ₂ is 4:1, the deposition time was 20 min, and the film thickness was 70 nm to obtain the second sample, as shown in FIG. 3 .

3. Source-drain electrode deposition

As shown in FIG. 4 , a source-drain mask 410 with a source-drain electrode pattern is covered on the second sample, and it is placed in a thermal evaporation stage to perform source-drain electrode material deposition. In the present invention, as a kind of Preferably, the electrode material used is Au, and the thickness is 75 nm to obtain a third sample, as shown in FIG. 5 . The distance between the source and drain electrodes defines the channel length of the transistor device. In this embodiment, as a preference, the channel length is 200 μm.

4. Active layer annealing

The obtained third sample was placed in a rapid annealing furnace, and annealed at 300° C. for 40 minutes to obtain a fourth sample.

5. Preparation of protein films

A silk fibroin aqueous solution with a concentration of 6 wt % is coated on the surface of the fourth sample, and placed in a drying oven for drying. After the solvent in the protein solution is evaporated, a silk fibroin film is formed on the surface of the fourth sample, and This can be used as a silk fibroin membrane substrate 500 to obtain a fifth sample, as shown in FIG. 6 .

6. Preparation of iron foil protective layer

As shown in FIGS. 7 and 8 , the mask plate 610 with the protective layer pattern is covered on the unpolished surface of the iron foil substrate 100 in the fifth sample, and placed in a radio frequency magnetron sputtering equipment to deposit the protective layer material , the function of the protective layer is to prevent the position where the edge of the iron foil plays a fixed role from being corroded in the subsequent process of removing the iron foil substrate. In the present invention, as a preference, the protective layer material is HfO ₂ , and a ceramic HfO ₂ target is used The _HfO2 protective layer 620 was obtained by sputtering, the sputtering power was 200W, the temperature was 100°C, the pressure was 13mtorr, the Ar/ _O2 was 4:1, the deposition time was 90min, and the film thickness was 150nm, and the sixth sample was obtained, as shown in the figure 9 shown.

7. Remove the iron foil base

As shown in FIG. 10, the sixth sample is placed in a fixture, the fixture includes: a fixture upper plate 710 and a fixture lower plate 720, the fixture lower plate 710 is a rectangular structure, and a rectangular groove is opened in the center position for accommodating the protein substrate and semiconductor devices; the upper plate 710 of the fixture is of a rectangular structure and is matched with the lower plate 720 of the fixture, and the size is the same as that of the lower plate 720 of the fixture. In the subsequent process, the solution reacts with the iron foil through the through hole. In the present invention, as a preference, the upper clamp plate 710 and the lower clamp plate 720 are made of acid-resistant materials.

In the sixth sample, the polished side of the iron foil faces the lower jig plate 710, and the unpolished side faces the upper jig plate 710. The upper jig plate 710 and the lower jig plate 720 are tightly fixed around to prevent the solution from entering the recess of the jig in the subsequent process. The groove portion in turn destroys the protein substrate. Immerse the fixed fixture in a dilute hydrochloric acid solution with a concentration of 15wt% to etch the iron foil substrate. Since _SiO2 is insoluble in dilute hydrochloric acid, it can effectively prevent the silk fibroin film substrate from being dissolved. At the same time, the silk fibroin substrate is a transistor device Provide support to prevent rupture under the action of external force. After the iron foil base 100 is dissolved, clean the fixture with deionized water and dry it at room temperature. Remove the fixture and remove the surrounding HfO ₂ protective layer without corrosion. , the seventh sample was obtained, as shown in Figure 11. The p-type thin film transistor device is about to be transferred onto the silk fibroin substrate 500 .

The seventh sample was placed in an electron beam evaporation (EB) device, and a grid electrode was evaporated on the surface of the SiO ₂ insulating layer 200, as shown in Figure 12. In the present invention, as a preference, the electrode material is Al, and the electrode With a thickness of 100 nm, a p-type SnO thin film transistor with moisture-triggered degradation was finally obtained on the silk fibroin substrate.

Comparative Example 1

1. Deposition of insulating layer

The single-side polished iron foil substrate 100 is placed in a plasma-enhanced chemical vapor deposition (PECVD) equipment, and a SiO ₂ insulating layer 200 material is deposited on the polished side, wherein the radio frequency power range is 50W, the temperature is 200 ° C, and the pressure is 0.2torr, _SiH4 flow rate is 25sccm, _N2O flow rate is 100sccm, _SiO2 film thickness is 200nm, and the first sample is obtained, as shown in Figure 1.

2. Active layer deposition

As shown in FIG. 2, an active layer mask 310 with an active pattern is covered on the first sample, and it is placed in a radio frequency magnetron sputtering equipment to deposit the active layer material. In the present invention As a preference, the active layer material is SnO, a metal Sn target is used, and the SnO active layer 320 is obtained by reactive sputtering, wherein the sputtering power is 40W, the temperature is room temperature, the pressure is 15mtorr, and the Ar/O ₂ is 1:1, the deposition time was 40 min, and the film thickness was 200 nm to obtain the second sample, as shown in Figure 3.

3. Source-drain electrode deposition

As shown in FIG. 4 , a source-drain mask 410 with a source-drain electrode pattern is covered on the second sample, and it is placed in a thermal evaporation stage to perform source-drain electrode material deposition. In the present invention, as a kind of Preferably, the electrode material used is Au with a thickness of 50 nm, and a third sample is obtained, as shown in FIG. 5 . The distance between the source and drain electrodes defines the channel length of the transistor device. In this embodiment, as a preference, the channel length is 50 μm.

4. Active layer annealing

The obtained third sample was placed in a rapid annealing furnace, and annealed at 250° C. for 30 min to obtain a fourth sample.

5. Preparation of protein films

A silk fibroin aqueous solution with a concentration of 6 wt % is coated on the surface of the fourth sample, and placed in a drying oven for drying. After the solvent in the protein solution is evaporated, a silk fibroin film is formed on the surface of the fourth sample, and This can be used as a silk fibroin membrane substrate 500 to obtain a fifth sample, as shown in FIG. 6 .

6. Preparation of iron foil protective layer

As shown in FIGS. 7 and 8 , the mask plate 610 with the protective layer pattern is covered on the unpolished surface of the iron foil substrate 100 in the fifth sample, and placed in a radio frequency magnetron sputtering equipment to deposit the protective layer material , the function of the protective layer is to prevent the position where the edge of the iron foil plays a fixed role from being corroded in the subsequent process of removing the iron foil substrate. In the present invention, as a preference, the protective layer material is HfO ₂ , and a ceramic HfO ₂ target is used The _HfO2 protective layer 620 was obtained by sputtering, the sputtering power was 150W, the temperature was 30°C, the pressure was 8mtorr, the Ar/ _O2 was 9:1, the deposition time was 120min, and the film thickness was 200nm, and the sixth sample was obtained, as shown in the figure 9 shown.

7. Remove the iron foil base

As shown in FIG. 10 , the sixth sample is placed in a fixture, the fixture includes: a fixture upper plate 710 and a fixture lower plate 720, the fixture lower plate 710 is a rectangular structure, and a rectangular groove is opened in the center position for accommodating the protein substrate and semiconductor devices; the fixture upper plate 710 is of a rectangular structure, and is set to match the fixture lower plate 720, the size is the same as the fixture lower plate 720, and the center of the fixture upper plate 710 has a through hole, which is the same as the size of the groove of the fixture lower plate, In the subsequent process, the solution reacts with the iron foil through the through hole. In the present invention, as a preference, the upper clamp plate 710 and the lower clamp plate 720 are made of acid-resistant materials.

In the sixth sample, the polished side of the iron foil faces the lower jig plate 710, and the unpolished side faces the upper jig plate 710. The upper jig plate 710 and the lower jig plate 720 are tightly fixed around to prevent the solution from entering the recess of the jig in the subsequent process. The groove portion in turn destroys the protein substrate. Immerse the fixed fixture in a dilute hydrochloric acid solution with a concentration of 10wt% to etch the iron foil substrate. Since _SiO2 is insoluble in dilute hydrochloric acid, it can effectively prevent the silk fibroin film substrate from being dissolved. At the same time, the silk fibroin substrate is a transistor device Provide support to prevent rupture under the action of external force. After the iron foil base 100 is dissolved, clean the fixture with deionized water and dry it at room temperature. Remove the fixture and remove the surrounding HfO ₂ protective layer without corrosion. , the seventh sample was obtained, as shown in Figure 11. The p-type thin film transistor device is about to be transferred onto the silk fibroin substrate 500 .

The seventh sample was placed in an electron beam evaporation (EB) device, and a grid electrode was evaporated on the surface of the SiO ₂ insulating layer 200, as shown in Figure 12. In the present invention, as a preference, the electrode material is Al, and the electrode With a thickness of 50 nm, a p-type SnO thin film transistor with moisture-triggered degradation was finally obtained on the silk fibroin substrate.

Comparative Example 2

Deposit p-type thin film transistors directly on protein substrates as follows:

1. Prepare a protein base film, take a flat PET plastic plate, apply a silk fibroin aqueous solution with a concentration of 6wt% on the PET plastic plate, and place it in a drying box for drying. After evaporation of the solvent, a hydrolyzable protein-based film was obtained.

2. The protein substrate was placed in an electron beam evaporation device, and an aluminum film was evaporated to serve as a gate electrode with a thickness of 100 nm.

3. The protein substrate coated with the gate electrode is placed in a radio frequency magnetron sputtering equipment, and an insulating layer is deposited. The insulating layer material is HfO ₂ , and the HfO ₂ insulating layer is obtained by sputtering with a ceramic HfO ₂ target. The sputtering power is 150W, The temperature of the reaction chamber was 25 °C, the pressure was 8 mtorr, the flow ratio of Ar and O ₂ was 9:1, the deposition time was 150 min, and the thickness of the insulating layer film was 150 nm.

4. Cover the active layer mask 310 on the insulating layer, place it in the radio frequency magnetron sputtering equipment, carry out the active layer material deposition, and carry out the active layer deposition, the active layer material is SnO, and the metal is used. Sn target, SnO material was obtained by reactive sputtering; the sputtering power was 25W, the reaction chamber temperature was room temperature, the pressure was 5mtorr, the flow ratio of Ar and _O2 was 9:1, the deposition time was 10min, and the film thickness was 50nm . The protein substrate after deposition of the active layer was placed in a rapid annealing furnace and annealed at 100 °C for 30 min.

5. Cover the active layer with the source-drain mask 410 and place them in a thermal evaporation stage to deposit the source-drain electrode material. The source-drain electrode material used is Au and the thickness is 50 nm to obtain a comparative device.

Table 1. Device parameter comparison

On-state current off-state current On/Off ratio Example 1 25μA 1.62nA 15432 Example 2 19μA 1.74nA 10920 Example 3 13μA 875pA 14857 Example 4 15μA 1.13nA 13274 Comparative Example 1 36μA 34μA 1.06 Comparative Example 2 216μA 5.9μA 36.6

Table 1 is a comparison of device parameters between the example and the comparative example. It can be seen from Table 1 that examples 1-4 can realize a p-type transient thin film transistor device with moisture-triggered degradation, and the on-off ratios are all greater than 10,000, and The switching ratio in Example 1 is the largest. When the devices prepared in Examples 1-4 are placed in water, the silk fibroin substrate can be hydrolyzed within 30 minutes, while the semiconductor functional layer is broken due to loss of support, achieving degradation.

The preparation conditions of the active layer of Comparative Example 1 deviate greatly from the optimal conditions, so that the oxygen content of the active layer is too high, and the source-drain current hardly changes with the change of the gate voltage, that is, the carrier concentration of the channel layer is not affected. The gate voltage is controlled and cannot exhibit p-type conductivity.

The thin film transistor device deposited directly on the protein substrate in Comparative Example 2 is limited by the thermal resistance of the protein substrate, and the annealing temperature is limited below 100 °C, so the device on-off ratio is less than 100.

Therefore, the invention can realize the preparation of transistor devices on the protein substrate, overcome the limitation of the heat resistance of the substrate material on the preparation temperature of the device, help to improve the performance of the device, and avoid the damage of the water-soluble protein substrate by the aqueous solution during the preparation of the device. It is possible to prepare transient electronic devices that require high temperature treatment with moisture-triggered degradation.

Although the embodiment of the present invention has been disclosed as above, it is not limited to the application listed in the description and the embodiment, and it can be applied to various fields suitable for the present invention. For those skilled in the art, it can be easily Therefore, the invention is not limited to the specific details and illustrations shown and described herein without departing from the general concept defined by the appended claims and the scope of equivalents.

Claims (8)

1. A preparation method of a p-type transient thin film transistor with moisture triggered degradation is characterized by comprising the following steps:

placing a single-side polished iron foil substrate in plasma enhanced chemical vapor deposition equipment, and performing insulating layer deposition on the polished side of the iron foil substrate to obtain a first sample;

covering the active layer template on the first sample, and depositing an active layer material in a radio frequency magnetron sputtering device to obtain a second sample;

covering a source-drain electrode mask plate on the second sample, placing the second sample in a thermal evaporation table for source-drain electrode material deposition to obtain a third sample, and placing the third sample in a rapid annealing furnace for annealing to obtain a fourth sample;

step four, coating the silk fibroin aqueous solution with the concentration of 6% on the surface of a fourth sample, and drying to obtain a fifth sample;

covering a protective layer mask plate on the unpolished substrate of the fifth sample, and depositing a protective layer material in radio frequency magnetron sputtering equipment to obtain a sixth sample;

fixing the sixth sample in a clamp, and immersing the sixth sample in dilute hydrochloric acid to dissolve the iron foil substrate in the sixth sample to obtain a seventh sample;

wherein the polished side of the iron foil substrate in the sixth sample is directed to the lower plate of the jig, and the unpolished side is directed to the upper plate of the jig;

and step seven, placing the seventh sample in electron beam evaporation equipment, and evaporating a gate electrode to obtain the p-type thin film transistor triggered and degraded by moisture.

2. The method for preparing a p-type transient thin film transistor with moisture triggered degradation according to claim 1, wherein the step one comprises the following steps:

deposition of SiO on the polished side of an iron foil substrate₂An insulating layer material;

wherein the RF power is 50-100W, the deposition temperature is 150-250 deg.C, the pressure is 0.2-0.6 torr, SiH₄The flow rate is 20-40 sccm, N₂The flow rate of O is 80-150 sccm, SiO₂The thickness of the film is 150 to 250 nm.

3. The method for preparing a p-type transient thin film transistor with moisture triggered degradation according to claim 2, wherein the second step comprises:

the active layer material is SnO, and the deposition of the active layer material is carried out by adopting a metal Sn target;

wherein the sputtering power is 25-35W, the temperature is room temperature, the pressure is 5-7 mtorr, Ar/O₂The deposition time is 9: 1-2: 1, the deposition time is 10-20 min, and the film thickness is 45-70 nm.

4. The method for preparing a p-type transient thin film transistor with moisture triggered degradation according to claim 3, wherein the third step comprises:

the electrode material is Au, and the thickness of the electrode material is 50-100 nm;

the distance between the adjacent source and drain electrodes is 10 mu m-1 mm;

the annealing temperature is 250-350 ℃, and the annealing time is 25-40 min.

5. The method for preparing a p-type transient thin film transistor with moisture triggered degradation according to claim 4, wherein the fourth step comprises:

the protective layer is made of HfO₂The sputtering power is 100-250W, the temperature is 25-200 ℃, the pressure is 8-20 mtorr, Ar/O₂9: 1-2: 1, deposition time of 50-150 min, and film thickness of 50-200 nm.

6. The method for preparing a p-type transient thin film transistor with moisture triggered degradation according to claim 5, wherein the sixth step comprises:

the clamp comprises an upper clamp plate and a lower clamp plate, the upper clamp plate and the lower clamp plate are both rectangular, a rectangular groove is formed in the center of the lower clamp plate, and a through hole is formed in the center of the upper clamp plate;

the concentration of the dilute hydrochloric acid is as follows: 1 to 30 wt%.

7. The method for preparing a p-type transient thin film transistor with moisture triggered degradation according to claim 6, wherein the seventh step comprises:

the electrode material is Al, and the thickness of the electrode is 50-200 nm.

8. The method for preparing a p-type transient thin film transistor with moisture triggered degradation according to claim 7,

in the first step, the radio frequency power is 50W, the deposition temperature is 200 ℃, the pressure is 0.2torr, and SiH is adopted₄The flow rate was 20sccm, N₂O flow rate of 80sccm, SiO₂The thickness of the film is 150 nm;

in the second step, the sputtering power is 25W, the temperature is room temperature, the pressure is 5mtorr, Ar/O₂The deposition time is 10min, and the film thickness is 45nm, wherein the deposition time is 9: 1;

in the third step, the electrode material is Au, and the thickness is 50 nm;

the distance between adjacent source and drain electrodes is: 10 mu m;

the annealing temperature is as follows: annealing at 250 deg.C for 25 min;

in the fourth step, the sputtering power is as follows: 100W, 25 ℃ and 8mtorr Ar/O pressure₂Is a ratio of 2:1, depositing for 50min, wherein the thickness of the film is 50 nm;

in the sixth step, the concentration of the dilute hydrochloric acid is as follows: 1 wt%;

in the seventh step, the thickness of the electrode is 50 nm.

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