CN113114042B - Pulse signal duty ratio isolation transfer circuit - Google Patents
Pulse signal duty ratio isolation transfer circuit Download PDFInfo
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- CN113114042B CN113114042B CN202110481202.2A CN202110481202A CN113114042B CN 113114042 B CN113114042 B CN 113114042B CN 202110481202 A CN202110481202 A CN 202110481202A CN 113114042 B CN113114042 B CN 113114042B
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- 238000002955 isolation Methods 0.000 title abstract description 13
- 239000003990 capacitor Substances 0.000 abstract description 28
- 230000005540 biological transmission Effects 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
- H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
- H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
- H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
- H02M3/33523—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electronic Switches (AREA)
- Dc-Dc Converters (AREA)
Abstract
The invention relates to a pulse signal duty ratio isolation transfer circuit, which comprises a primary side circuit, a secondary side circuit and an output circuit, wherein the primary side circuit is connected with the secondary side circuit; the primary circuit comprises a direct current power supply, a pulse signal source, an MOS switch tube and a primary coil; the secondary circuit comprises a secondary coil, a diode, a resistive load and a capacitor; the output circuit comprises a second capacitor; the discharge current of the primary coil is controlled through the values of the resistive load and the capacitor, the diode is conducted when the primary coil and the secondary coil generate reverse current, the capacitor correspondingly stores the current in the secondary circuit, the current in the secondary circuit is ensured not to change to 0 during the low level period of PWM, and therefore the circuit is ensured to work in a state with continuous current; therefore, the problem of logic confusion of high and low levels of waveforms when the pulse duty ratio is changed in a large range is solved while the pulse signal is effectively transmitted, and the reliability of the circuit is improved.
Description
Technical Field
The invention relates to the field of isolation circuits, in particular to a pulse signal duty ratio isolation transmission circuit.
Background
In the field of small signal control large signals, the small signals are required to be converted into large signals by utilizing electromagnetic isolation and then transmitted, and when pulse signals are transmitted, if the duty ratio variation range of the pulse signals is large, the problem of logic confusion of high and low level of the waveforms of the transmitted pulse signals is easy to occur in the traditional electromagnetic isolation circuit.
Disclosure of Invention
Therefore, the invention aims to provide the pulse signal duty ratio isolation transmission circuit, which can solve the problem that the logic of the high level and the low level of the transmitted pulse signal waveform is disordered when the pulse signal is transmitted by the traditional electromagnetic isolation circuit.
The invention relates to a pulse signal duty ratio isolation transfer circuit, which comprises a primary side circuit, a secondary side circuit and an output circuit, wherein the primary side circuit is connected with the secondary side circuit;
the primary circuit comprises a direct-current power supply, a pulse signal source, an MOS switch tube and a primary coil, wherein the direct-current power supply, the primary coil and the drain electrode of the MOS switch tube are connected in series through a lead, the source electrode of the MOS switch tube is grounded, and the grid electrode of the MOS switch tube is connected with the pulse signal source;
the secondary circuit comprises a secondary coil, a diode, a resistive load and a first capacitor, wherein the secondary coil is coupled with the primary coil in an anti-phase manner, the capacitor and the resistive load are connected with the secondary coil in parallel, the diode is arranged between the first capacitor and the secondary coil, the cathode of the diode is connected with the anode of the secondary coil, and the anode of the diode is connected with one end of the first capacitor;
the output circuit comprises a second capacitor, one end of the first capacitor is grounded, the other end of the first capacitor is connected between the anode of the secondary coil and the cathode of the diode, and the signal output end of the first capacitor is connected to the other end of the second capacitor.
The beneficial effects of the invention are as follows: according to the pulse signal duty ratio isolation transfer circuit, the discharge current of the primary coil is controlled through the resistive load and the value of the capacitor, the diode is conducted when the primary coil and the secondary coil generate reverse current, the capacitor correspondingly stores the current in the secondary circuit, the current in the secondary circuit is kept unchanged to 0 during the low level period of PWM, and therefore the circuit is ensured to work in a current continuous state; therefore, the problem of logic confusion of high and low levels of waveforms when the pulse duty ratio is changed in a large range is solved while the pulse signal is effectively transmitted, and the reliability of the circuit is improved.
Drawings
For a clearer description of the technical solutions of the embodiments of the present application, the following brief description of the drawings is given for the purpose of illustrating the embodiments of the present application, it being understood that the following drawings only illustrate certain embodiments of the present application and should not be considered as limiting the scope, and that other relevant drawings may be obtained, without the inventive effort, by those skilled in the art, from these drawings:
fig. 1 is a schematic structural view of the present invention.
Detailed Description
As shown in fig. 1: the pulse signal duty ratio isolation transfer circuit comprises a primary circuit, a secondary circuit and an output circuit, wherein the primary circuit comprises a direct current power supply VDC, a pulse signal source, a MOS switch tube Q1 and a primary coil P1, the direct current power supply VDC, the primary coil P1 and the drain electrode of the MOS switch tube Q1 are sequentially connected in series through a lead, the source electrode of the MOS switch tube Q1 is grounded, and the grid electrode of the MOS switch tube Q1 is connected with the pulse signal source;
the secondary circuit comprises a secondary coil S1, a diode Q2, a resistive load R3 and a first capacitor C1, wherein the secondary coil S1 is in anti-phase coupling with the primary coil P1, the capacitor C1 and the resistive load R3 are both connected with the secondary coil S1 in parallel, the diode Q2 is arranged between the first capacitor C1 and the secondary coil S1, the cathode of the diode Q2 is connected with the anode of the secondary coil S1, and the anode of the diode Q2 is connected with one end of the first capacitor C1;
the output circuit comprises a second capacitor C2, one end of the first capacitor C2 is grounded, the other end of the first capacitor C2 is connected between the anode of the secondary coil S1 and the cathode of the diode Q2, the signal output end DRV is connected to the other end of the second capacitor C2, and the function of the second capacitor is to filter high-frequency noise.
The specific implementation principle is as follows:
the DC power supply VDC inputs a DC signal to the MOS switch tube Q1, the pulse signal source is connected with the grid electrode of the MOS switch tube Q1 so as to control the switch state of the MOS switch tube Q1, when the pulse signal is in a high level, the MOS switch tube Q1 is conducted, the DC power supply VDC charges the primary coil P1, the charging current is I= (VDC/LP) TON, the VDC is the voltage of the DC power supply VDC, the LP is the inductance of the primary coil P1, and TON is the duration of the high level;
the diode Q2 in the secondary side circuit is reversely biased, the voltage of the negative terminal (or cathode) of the diode Q2 is VDC, N+VC3+VD2, N=NS:NP in the formula, N is the turn ratio of a transformer, VC3 is the voltage on the capacitor C1, VD2 is the junction voltage drop of D2, and the voltage of the negative terminal of D2 is taken as output after being divided by the first divider resistor R1 and the second divider resistor R2, so that high-level transmission is realized.
When the pulse signal is at a low level, the MOS switch tube Q1 is disconnected, the direct-current power supply VDC stops charging the primary coil P1, the primary coil P1 generates reverse voltage, when the voltage rises to a certain value, the reverse induction current generated by the secondary coil S1 enables the D2 to be conducted, the energy stored by the primary of the transformer charges the capacitor C1 and the resistive load R3, at the moment, the negative end of the diode Q2 is at a low level, the voltage is-VD, and the voltage is output after being divided by the first resistor and the second resistor, so that low-level transmission is realized.
According to the pulse signal duty ratio isolation transfer circuit, the discharging current of the primary coil P1 is controlled through the values of the resistive load R3 and the capacitor C1, the capacitor C1 stores the current in the secondary circuit, and the current in the secondary circuit is ensured not to change to 0 during the low level period of PWM, so that the circuit is ensured to work in a current continuous state; therefore, the problem of logic confusion of high and low levels of waveforms when the pulse duty ratio is changed in a large range is solved while the pulse signal is effectively transmitted, and the reliability of the circuit is improved.
Finally, it is noted that the above embodiments are only for illustrating the technical solution of the present invention and not for limiting the same, and although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications and equivalents may be made thereto without departing from the spirit and scope of the technical solution of the present invention, which is intended to be covered by the scope of the claims of the present invention.
Claims (1)
1. A pulse signal duty ratio isolation transfer circuit is characterized in that: the circuit comprises a primary side circuit, a secondary side circuit and an output circuit;
the primary circuit comprises a direct-current power supply, a PWM signal source, an MOS switch tube and a primary coil, wherein the direct-current power supply, the primary coil and the drain electrode of the MOS switch tube are connected in series through a lead, the source electrode of the MOS switch tube is grounded, and the grid electrode of the MOS switch tube is connected with the PWM signal source;
the secondary circuit comprises a secondary coil, a diode, a resistive load and a first capacitor, wherein the secondary coil is in anti-phase coupling with the primary coil, one end of the first capacitor connected in parallel with the resistive load is connected with the cathode of the secondary coil, the other end of the first capacitor connected in parallel with the resistive load is connected to the anode of the diode, the anode of the diode is connected with the ground, and the cathode of the diode is connected with the anode of the secondary coil;
the output circuit comprises a second capacitor, one end of the second capacitor is grounded, the other end of the second capacitor is connected between the anode of the secondary coil and the cathode of the diode, and one end of the second capacitor, which is connected with the cathode of the diode, is a signal output end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110481202.2A CN113114042B (en) | 2021-04-30 | 2021-04-30 | Pulse signal duty ratio isolation transfer circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110481202.2A CN113114042B (en) | 2021-04-30 | 2021-04-30 | Pulse signal duty ratio isolation transfer circuit |
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| Publication Number | Publication Date |
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| CN113114042A CN113114042A (en) | 2021-07-13 |
| CN113114042B true CN113114042B (en) | 2023-05-02 |
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| CN202110481202.2A Active CN113114042B (en) | 2021-04-30 | 2021-04-30 | Pulse signal duty ratio isolation transfer circuit |
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| CN114337246A (en) * | 2022-01-05 | 2022-04-12 | 东科半导体(安徽)股份有限公司 | A flat-panel transformer winding circuit for processing power EMC and method thereof |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105356728A (en) * | 2015-12-01 | 2016-02-24 | 广州金升阳科技有限公司 | Isolated drive circuit |
| CN111711367A (en) * | 2020-07-23 | 2020-09-25 | 中国电子科技集团公司第四十三研究所 | A Bidirectional Magnetically Isolated Feedback Circuit Including Synchronous Rectification Timing Transfer |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI469486B (en) * | 2012-11-01 | 2015-01-11 | Richtek Technology Corp | Flyback regulator and control circuit thereof and related primary side controller and secondary side controller |
| US9882493B2 (en) * | 2015-05-15 | 2018-01-30 | Analog Devices, Inc. | Apparatus and method for isolated current mode controller |
| KR101847256B1 (en) * | 2016-01-11 | 2018-05-28 | 한국전자통신연구원 | Wireless power receiver, system having the same and method for controlling automatically load resistance transformation ratio |
| CN107086793B (en) * | 2017-06-19 | 2023-06-06 | 浙江大学 | A Dynamic Compensation Control Circuit for Synchronous Rectification Power Converter |
| CN108429435A (en) * | 2018-05-10 | 2018-08-21 | 佛山职业技术学院 | A kind of MOSFET isolated drive circuits |
| US10425080B1 (en) * | 2018-11-06 | 2019-09-24 | Crane Electronics, Inc. | Magnetic peak current mode control for radiation tolerant active driven synchronous power converters |
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2021
- 2021-04-30 CN CN202110481202.2A patent/CN113114042B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105356728A (en) * | 2015-12-01 | 2016-02-24 | 广州金升阳科技有限公司 | Isolated drive circuit |
| CN111711367A (en) * | 2020-07-23 | 2020-09-25 | 中国电子科技集团公司第四十三研究所 | A Bidirectional Magnetically Isolated Feedback Circuit Including Synchronous Rectification Timing Transfer |
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| CN113114042A (en) | 2021-07-13 |
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