CN113066412B - Circuit control method, detection method and preparation method of array substrate - Google Patents
Circuit control method, detection method and preparation method of array substrate Download PDFInfo
- Publication number
- CN113066412B CN113066412B CN202110344715.9A CN202110344715A CN113066412B CN 113066412 B CN113066412 B CN 113066412B CN 202110344715 A CN202110344715 A CN 202110344715A CN 113066412 B CN113066412 B CN 113066412B
- Authority
- CN
- China
- Prior art keywords
- signal
- array substrate
- sensing unit
- circuit
- pixel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
Description
技术领域technical field
本发明属于显示技术领域,具体涉及一种阵列基板的电路控制方法、检测方法、显示面板的制备方法。The invention belongs to the technical field of display, and in particular relates to a circuit control method, a detection method and a display panel preparation method of an array substrate.
背景技术Background technique
有机电致发光二极管(Organic Light-Emitting Diode;OLED)是一种具有自发光、广视角、响应快、色域广、清晰度与对比度高、可实现柔性显示等特性的显示器件。因此,OLED显示面板在新时代的显示面板中具有强有力的竞争力,被业界公认为是最有发展潜力的显示面板。An organic electroluminescent diode (Organic Light-Emitting Diode; OLED) is a display device with characteristics such as self-luminescence, wide viewing angle, fast response, wide color gamut, high definition and contrast, and can realize flexible display. Therefore, the OLED display panel has strong competitiveness in the display panel of the new era, and is recognized by the industry as the display panel with the most development potential.
现有技术中,为了保证OLED显示面板的出厂良率,会在OLED显示面板出厂之前进行显示检测。In the prior art, in order to ensure the factory yield of the OLED display panel, display inspection is performed before the OLED display panel is shipped from the factory.
发明人发现,OLED显示面板容易出现亮点带线亮点簇类型的不良显示现象,该不良显示现象会可在CT(cell test)阶段和模组检测阶段发现,但是此时该不良显示现象在模组阶段已无法进行修复或者补偿,即使检测出不良问题,OLED显示面板也已报废,不利于提高OLED显示面板的产品良率。The inventor found that the OLED display panel is prone to the bad display phenomenon of the type of bright spots with lines and bright spots. The bad display phenomenon can be found in the CT (cell test) stage and the module detection stage, but at this time the bad display phenomenon is in the module. At this stage, it is impossible to repair or compensate. Even if a defective problem is detected, the OLED display panel has been scrapped, which is not conducive to improving the product yield of the OLED display panel.
发明内容SUMMARY OF THE INVENTION
本发明旨在至少解决现有技术中存在的技术问题之一,提供一种能够用于AT检测中进行不良检测的阵列基板的电路控制方法。The present invention aims to solve at least one of the technical problems existing in the prior art, and provides a circuit control method for an array substrate that can be used for defect detection in AT detection.
解决本发明技术问题所采用的技术方案是一种阵列基板的电路控制方法,用于所述阵列基板的检测阶段过程中,对所述阵列基板的电路进行控制;所述阵列基板包括:像素电路、信号线以及感测单元;所述像素电路的像素电压输出端与发光单元连接;所述感测单元的第一端与所述像素电压输出端连接;所述电路控制方法包括:The technical solution adopted to solve the technical problem of the present invention is a circuit control method of an array substrate, which is used to control the circuit of the array substrate during the detection stage of the array substrate; the array substrate includes: a pixel circuit , a signal line and a sensing unit; the pixel voltage output end of the pixel circuit is connected to the light-emitting unit; the first end of the sensing unit is connected to the pixel voltage output end; the circuit control method includes:
向所述像素电路的控制端写入关断信号,以使所述像素电路关断;writing a shutdown signal to the control terminal of the pixel circuit to turn off the pixel circuit;
初始化阶段:向至少部分所述信号线写入第一充电信号;向所述感测单元的控制端写入第一控制信号,向所述感测单元的第二端写入第一感测信号,以使所述感测单元关断;Initialization stage: write a first charging signal to at least part of the signal lines; write a first control signal to the control terminal of the sensing unit, and write a first sensing signal to the second terminal of the sensing unit , so that the sensing unit is turned off;
检测阶段:向所述感测单元的控制端写入第二控制信号,以使所述感测单元开启,并将所述第二感测信号写入所述像素电压输出端。Detection stage: writing a second control signal to the control terminal of the sensing unit to turn on the sensing unit, and writing the second sensing signal to the pixel voltage output terminal.
可选的,所述信号线包括:数据线和第一信号线;所述像素电路包括:控制模块和驱动模块;所述控制模块的第一端与所述数据线连接,第二端与所述驱动模块的控制端连接;所述控制模块的第一端与所述第一信号线连接,第二端为所述像素电压输出端;Optionally, the signal line includes: a data line and a first signal line; the pixel circuit includes: a control module and a driving module; the first end of the control module is connected to the data line, and the second end is connected to the the control terminal of the driving module is connected; the first terminal of the control module is connected to the first signal line, and the second terminal is the output terminal of the pixel voltage;
所述向至少部分所述信号线写入第一充电信号包括:向所述第一信号线和所述数据线中的一者写入第一充电信号;同时,将另一者悬置。The writing of the first charging signal to at least part of the signal line includes: writing the first charging signal to one of the first signal line and the data line; and simultaneously, suspending the other.
进一步可选的,所述向至少部分所述信号线写入第一充电信号包括:向所述第一信号线写入第一充电信号;同时,将所述数据线悬置。Further optionally, the writing the first charging signal to at least a part of the signal lines includes: writing the first charging signal to the first signal line; and at the same time, suspending the data line.
可选的,在所述向所述感测单元的控制端写入第二控制信号,并维持第一时间段之后,还包括:Optionally, after the second control signal is written to the control terminal of the sensing unit and maintained for the first period of time, the method further includes:
向所述感测单元的第二端写入第二感测信号,以使所述感测单元关断。A second sensing signal is written to the second end of the sensing unit to turn off the sensing unit.
进一步可选的,所述第二感测信号与所述第二控制信号的电压相同。Further optionally, the voltage of the second sensing signal and the second control signal are the same.
进一步可选的,所述第一时间段的范围包括800-1500微秒。Further optionally, the range of the first time period includes 800-1500 microseconds.
可选的,所述电路控制方法还包括:Optionally, the circuit control method further includes:
复位阶段:向所述信号线,所述感测单元以及所述像素电路写入复位信号,以对所述阵列基板上的各电路结构进行复位。The reset stage: writing a reset signal to the signal line, the sensing unit and the pixel circuit to reset each circuit structure on the array substrate.
解决本发明技术问题所采用的技术方案是一种阵列基板的检测方法,包括上述任意一种电路控制方法。The technical solution adopted to solve the technical problem of the present invention is a detection method for an array substrate, including any one of the above circuit control methods.
可选的,所述检测方法还包括:Optionally, the detection method also includes:
在检测阶段:检测所述阵列基板的所述信号线的电压和所述像素电压输出端的像素电压;In the detection stage: detecting the voltage of the signal line of the array substrate and the pixel voltage of the pixel voltage output terminal;
根据所述信号线的电压与所述像素电压的电压差,进行光学成像;所述光学成像亮度与所述电压差相关;Perform optical imaging according to the voltage difference between the voltage of the signal line and the pixel voltage; the optical imaging brightness is related to the voltage difference;
根据所述光学成像结果,确定所述阵列基板的不良位置。According to the optical imaging result, the defective position of the array substrate is determined.
解决本发明技术问题所采用的技术方案是一种显示面板的制备方法,包括:The technical solution adopted to solve the technical problem of the present invention is a preparation method of a display panel, including:
制备阵列基板;所述阵列基板包括:像素电路、信号线、发光单元以及感测单元;所述像素电路的像素电压输出端与所述发光单元连接;所述感测单元的第一端与所述像素电压输出端连接;An array substrate is prepared; the array substrate includes: a pixel circuit, a signal line, a light-emitting unit and a sensing unit; the pixel voltage output end of the pixel circuit is connected to the light-emitting unit; the first end of the sensing unit is connected to the The pixel voltage output terminal is connected;
依据上述任意一种检测方法对所述阵列基板进行检测。The array substrate is detected according to any one of the above detection methods.
附图说明Description of drawings
图1为本发明的实施例的阵列基板的电路结构示意图;FIG. 1 is a schematic diagram of a circuit structure of an array substrate according to an embodiment of the present invention;
图2为本发明的实施例的阵列基板的电路控制方法的电路时序图;2 is a circuit timing diagram of a circuit control method for an array substrate according to an embodiment of the present invention;
图3为本发明的实施例的检测方法的VIOS系统的检测结果示意图。FIG. 3 is a schematic diagram of the detection result of the VIOS system of the detection method according to the embodiment of the present invention.
具体实施方式Detailed ways
为使本领域技术人员更好地理解本发明的技术方案,下面结合附图和具体实施方式对本发明作进一步详细描述。In order to make those skilled in the art better understand the technical solutions of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.
实施例1:Example 1:
现有技术中,阵列基板、显示面板、显示模组等显示产品结构在制备完成后,需要进行检测,以及时发现其中所存在的不良,及时进行修复,提高显示产品结构的出厂良率。其中,在阵列基板检测(Array Test;AT)阶段,可通过VIOS(voltage imaging opticalsubsystem;电压成像光学子系统)系统对阵列基板进行检测,检测阵列基板中各信号线是否存在短路或者断路现象,但是并不能够检测阵列基板中亮点带线亮点簇类型的不良显示现象。In the prior art, after the array substrate, display panel, display module and other display product structures are prepared, they need to be inspected to discover defects in time, repair them in time, and improve the ex-factory yield of the display product structure. Among them, in the array test (Array Test; AT) stage, the array substrate can be tested by the VIOS (voltage imaging optical subsystem; voltage imaging optical subsystem) system to detect whether each signal line in the array substrate has a short circuit or open circuit phenomenon, but It is not possible to detect the bad display phenomenon of the type of bright dots with line dots in the array substrate.
本实施例提供一种阵列基板的电路控制方法,可用于阵列基板的检测阶段过程中,对阵列基板的电路进行控制。本实施例提供的电路控制方法特别适用于对OLED显示阵列基板的检测时,对OLED显示阵列基板进行电路控制。阵列基板可包括:像素电路、信号线以及感测单元、发光单元等。像素电路的像素电压输出端与发光单元连接;感测单元的第一端与像素电压输出端连接。其中,像素电路可包括:控制模块和驱动模块;控制模块的第一端与数据线Vdata连接,第二端与驱动模块的控制端连接;控制模块的第一端与第一信号线VDD连接,第二端为像素电压输出端。信号线可包括数据线Vdata、第一信号线VDD、栅线、感测线Sense等。在阵列基板中,可通过栅线、第一信号线VDD、数据线Vdata等对像素电路进行控制,从而控制显示发光单元进行发光显示。并且,感测单元可对像素电路的像素电压输出端的像素电压进行感测,并通过感测线Sense输出,以便于根据感测到的像素电压对像素电路进行补偿,保证阵列基板整体的各像素单元的均匀显示。This embodiment provides a circuit control method for an array substrate, which can be used to control the circuit of the array substrate during the detection stage of the array substrate. The circuit control method provided in this embodiment is particularly suitable for circuit control of the OLED display array substrate during detection of the OLED display array substrate. The array substrate may include pixel circuits, signal lines, sensing units, light-emitting units, and the like. The pixel voltage output end of the pixel circuit is connected with the light emitting unit; the first end of the sensing unit is connected with the pixel voltage output end. The pixel circuit may include: a control module and a driving module; the first end of the control module is connected to the data line Vdata, the second end is connected to the control end of the driving module; the first end of the control module is connected to the first signal line VDD, The second terminal is the pixel voltage output terminal. The signal lines may include a data line Vdata, a first signal line VDD, a gate line, a sensing line Sense, and the like. In the array substrate, the pixel circuit can be controlled through the gate line, the first signal line VDD, the data line Vdata, etc., so as to control the display light-emitting unit to perform light-emitting display. In addition, the sensing unit can sense the pixel voltage of the pixel voltage output terminal of the pixel circuit, and output it through the sensing line Sense, so as to compensate the pixel circuit according to the sensed pixel voltage and ensure that each pixel of the entire array substrate is Uniform display of cells.
本实施例提供的电路控制方法包括初始化阶段和检测阶段,具体可包括:The circuit control method provided by this embodiment includes an initialization phase and a detection phase, which may specifically include:
向像素电路的控制端写入关断信号,以使像素电路关断。Write a shutdown signal to the control terminal of the pixel circuit to turn off the pixel circuit.
初始化阶段:向至少部分信号线写入第一充电信号;向感测单元的控制端写入第一控制信号,向感测单元的第二端写入第一感测信号,以使感测单元关断。Initialization stage: write the first charging signal to at least part of the signal lines; write the first control signal to the control terminal of the sensing unit, and write the first sensing signal to the second terminal of the sensing unit, so that the sensing unit off.
检测阶段:向感测单元的控制端写入第二控制信号,以使感测单元开启,并将第二感测信号写入像素电压输出端。The detection stage: writing a second control signal to the control terminal of the sensing unit to turn on the sensing unit, and writing the second sensing signal to the pixel voltage output terminal.
本实施例提供的电路控制方法,用于AT阶段对阵列基板的电路进行控制,从而利用VIOS系统对阵列基板进行检测,进而实现阵列基板的亮点带线亮点簇类型的不良显示现象的检测。具体的,在对阵列基板检测时,可通过VIOS系统对阵列基板的各信号线的电压以及像素电路的像素电压输出端处的像素电压进行检测。其中,VIOS系统可检测出信号线的平均电压,以及阵列基板中各像素电路中的像素电压,根据像素电压与信号线的平均电压的压差,进行光学成像,根据不同压差转化成的亮度不同,从而发现阵列基板的亮点带线亮点簇类型的不良显示现象。The circuit control method provided in this embodiment is used to control the circuit of the array substrate in the AT stage, so as to use the VIOS system to detect the array substrate, thereby realizing the detection of the bad display phenomenon of the bright spot with line bright spot cluster type of the array substrate. Specifically, when the array substrate is detected, the voltage of each signal line of the array substrate and the pixel voltage at the pixel voltage output end of the pixel circuit can be detected by the VIOS system. Among them, the VIOS system can detect the average voltage of the signal line and the pixel voltage in each pixel circuit in the array substrate, and perform optical imaging according to the voltage difference between the pixel voltage and the average voltage of the signal line. Therefore, the poor display phenomenon of the bright spot strip line bright spot cluster type of the array substrate is found.
经研究发现,阵列基板的亮点带线亮点簇类型的不良显示现象是由于感测单元中的感测晶体管T3中的栅极与有源层之间的弱迁移对像素电压造成的影响所导致。也就是说,在同一阵列基板的多个像素电路中,即使向各像素电路写入相同的数据电压,发生弱迁移的像素单元中的像素电压与未发生弱迁移的像素单元中的像素电压是不同的。因此,通过检测各像素单元中经由感测单元与向像素电路的像素电压输出端写入的电压(也就第二感测信号),即可检测出阵列基板的亮点带线亮点簇类型的不良显示现象位置(如图3所示)。而本实施例提供的电路控制方法中,通过电路控制,将阵列基板上的各像素电路关断,像素电路不对像素电压输出端进行像素电压输出。Through research, it is found that the poor display phenomenon of the bright spot strip line bright spot cluster type of the array substrate is caused by the weak migration between the gate electrode and the active layer of the sensing transistor T3 in the sensing unit on the pixel voltage. That is to say, in a plurality of pixel circuits on the same array substrate, even if the same data voltage is written to each pixel circuit, the pixel voltage in the pixel unit where weak migration occurs is the same as the pixel voltage in the pixel unit where weak migration does not occur. different. Therefore, by detecting the voltage (ie, the second sensing signal) written to the pixel voltage output terminal of the pixel circuit via the sensing unit in each pixel unit, the defect of the bright spot strip line bright spot cluster type of the array substrate can be detected. Displays the location of the phenomenon (as shown in Figure 3). However, in the circuit control method provided in this embodiment, each pixel circuit on the array substrate is turned off through circuit control, and the pixel circuit does not output the pixel voltage at the pixel voltage output terminal.
可以理解的是,本实施例中,感测单元通常包括感测晶体管T3,感测单元的导通与关断与向感测单元的控制端写入的控制信号与向感测单元的第二端写入的感测信号的压差有关。因此,本实施中,在初始化阶段,通过控制第一控制信号与第一感测信号的压差,控制感测单元关断;在检测阶段,改变感测单元的控制端的控制信号(由第一控制信号变为第二控制信号)控制控制感测单元的导通,并将第二感测信号写入像素电压输出端状态。由此一来,即可根据阵列基板上各像素电压输出端的电压确定阵列基板中个像素单元的感测单元是否发生弱迁移。同时,由于像素电路处于关断不工作状态,不会向像素电压输出端提供电压,故像素电路也不会对检测结果产生影响。It can be understood that, in this embodiment, the sensing unit generally includes a sensing transistor T3, the on and off of the sensing unit and the control signal written to the control terminal of the sensing unit and the second signal to the sensing unit. It is related to the voltage difference of the sensing signal written at the terminal. Therefore, in this implementation, in the initialization stage, the sensing unit is controlled to be turned off by controlling the pressure difference between the first control signal and the first sensing signal; in the detection stage, the control signal at the control end of the sensing unit (by the first The control signal becomes the second control signal) to control the conduction of the sensing unit, and write the second sensing signal into the state of the pixel voltage output terminal. In this way, it can be determined whether the sensing unit of each pixel unit in the array substrate undergoes weak migration according to the voltage of each pixel voltage output terminal on the array substrate. At the same time, since the pixel circuit is in an off state and no voltage is supplied to the pixel voltage output terminal, the pixel circuit will not affect the detection result.
本实施例提供的电路控制方法优选用于通过VIOS系统对阵列基板的检测过程中。其中需要说明的是,VIOS系统对阵列基板进行检测时,不直接对阵列基板的各像素电路中的像素电压的数值进行检测,而是检测通过信号线的平均电压与各像素电路的像素电压的差值,直接根据电压差进行光学成像,不同电压差所转化成的显示亮度不同。因此,如图3所示,可根据VIOS系统在检测阵列基板时所呈现出的图像中的亮度异常点确定阵列基板的不良位置。具体的,本实施例中,通过控制像素电路关断,并向其中至少部分信号线输入充电信号,同时通过感测线Sense向感测单元输入感测信号,并传输至像素电压输出端,以进行VIOS系统对阵列基板的检测,能够正常显示光学图像。The circuit control method provided in this embodiment is preferably used in the detection process of the array substrate by the VIOS system. It should be noted that when the VIOS system detects the array substrate, it does not directly detect the value of the pixel voltage in each pixel circuit of the array substrate, but detects the difference between the average voltage passing through the signal line and the pixel voltage of each pixel circuit. Difference, optical imaging is performed directly according to the voltage difference, and the display brightness converted by different voltage differences is different. Therefore, as shown in FIG. 3 , the defective position of the array substrate can be determined according to the abnormal brightness points in the image displayed by the VIOS system when the array substrate is detected. Specifically, in this embodiment, the pixel circuit is controlled to be turned off, and a charging signal is input to at least part of the signal lines. At the same time, a sensing signal is input to the sensing unit through the sensing line Sense, and transmitted to the pixel voltage output terminal, so as to The VIOS system detects the array substrate, and the optical image can be displayed normally.
可选的,本实施例中,信号线包括:数据线Vdata和第一信号线VDD;像素电路包括:控制模块和驱动模块;控制模块的第一端与数据线Vdata连接,第二端与驱动模块的控制端连接;控制模块的第一端与第一信号线VDD连接,第二端为像素电压输出端;向至少部分信号线写入第一充电信号包括:向第一信号线VDD和数据线Vdata中的一者写入第一充电信号;同时,将另一者悬置。Optionally, in this embodiment, the signal line includes: a data line Vdata and a first signal line VDD; the pixel circuit includes: a control module and a driving module; the first end of the control module is connected to the data line Vdata, and the second end is connected to the driver the control end of the module is connected; the first end of the control module is connected to the first signal line VDD, and the second end is the pixel voltage output end; writing the first charging signal to at least part of the signal lines includes: writing the first signal line VDD and data to the first signal line VDD One of the lines Vdata is written with the first charging signal; at the same time, the other is left suspended.
VIOS系统中,根据信号线的平均电压与像素电压的电压差来进行电子光学图像的显示。可以理解的是,阵列基板中的信号线数量众多。本实施例中只要向其中部分信号线写入充电信号即可。同时,将其余的信号线悬置,可以避免对充电信号线的正常充电造成影响。In the VIOS system, the display of the electro-optical image is performed according to the voltage difference between the average voltage of the signal line and the pixel voltage. It can be understood that there are many signal lines in the array substrate. In this embodiment, it is only necessary to write charging signals to some of the signal lines. At the same time, suspending the remaining signal lines can avoid affecting the normal charging of the charging signal lines.
进一步可选的,本实施例中,向至少部分信号线写入第一充电信号包括:向第一信号线VDD写入第一充电信号;同时,将数据线Vdata悬置。本实施例中,第一信号线VDD与像素电路的驱动单元的输入端连接,通常情况下,第一信号线VDD线宽较宽,信号传输效果较好,经实验数据表明,仅向第一信号线VDD写入第一充电信号,相对向其它信号线写入第一充电信号能够获得更好、更精确的检测结果。Further optionally, in this embodiment, writing the first charging signal to at least part of the signal lines includes: writing the first charging signal to the first signal line VDD; at the same time, suspending the data line Vdata. In this embodiment, the first signal line VDD is connected to the input end of the driving unit of the pixel circuit. Normally, the width of the first signal line VDD is wider, and the signal transmission effect is better. Writing the first charging signal to the signal line VDD can obtain better and more accurate detection results than writing the first charging signal to other signal lines.
可选的,如图2所示,本实施例中,在向感测单元的控制端写入第二控制信号,并维持第一时间段之后,还包括:向感测单元的第二端写入第二感测信号,以使感测单元关断。Optionally, as shown in FIG. 2 , in this embodiment, after writing the second control signal to the control terminal of the sensing unit and maintaining the first period of time, the method further includes: writing to the second terminal of the sensing unit The second sensing signal is input to turn off the sensing unit.
可以理解的是,在正常的显示面板的制备过程中,在对阵列基板进行检测之后,还对阵列基板进行其它操作。本实施例中,可以通过向感测单元的第二端写入第二感测信号,以使感测单元关断。It can be understood that, in the normal manufacturing process of the display panel, after the array substrate is inspected, other operations are also performed on the array substrate. In this embodiment, the sensing unit may be turned off by writing the second sensing signal to the second end of the sensing unit.
优选的,第一时间段的范围包括800-1500微秒。可以理解的是,第一时间段的时长只要能满足检测需求即可,无需过长。Preferably, the range of the first time period includes 800-1500 microseconds. It can be understood that the duration of the first period of time does not need to be too long as long as it can meet the detection requirements.
其中,可选的,第二感测信号与第二控制信号的电压相同。可以理解的是,本实施例中,感测单元通常包括感测晶体管T3。以感测晶体管T3为N型晶体管为例,感测晶体管T3的控制极与输入极的电压差大于阈值电压时,感测晶体管T3方可导通。本实施例中,只要控制感测单元的控制信号与感测信号的压差即可实现对感测单元工作状态的控制。本实施例中,通过控制第二感测信号与第二控制信号的电压相同,即可控制感测单元关闭,停止对像素电极输出端的电压写入。Wherein, optionally, the voltages of the second sensing signal and the second control signal are the same. It can be understood that, in this embodiment, the sensing unit generally includes a sensing transistor T3. Taking the sensing transistor T3 as an N-type transistor as an example, when the voltage difference between the control electrode and the input electrode of the sensing transistor T3 is greater than the threshold voltage, the sensing transistor T3 can be turned on. In this embodiment, as long as the pressure difference between the control signal of the sensing unit and the sensing signal is controlled, the working state of the sensing unit can be controlled. In this embodiment, by controlling the voltage of the second sensing signal and the second control signal to be the same, the sensing unit can be controlled to be turned off and the voltage writing to the output terminal of the pixel electrode is stopped.
优选的,本实施例提供的电路控制方法,还包括:复位阶段:向信号线,感测单元以及像素电路写入复位信号,以对阵列基板上的各电路结构进行复位。Preferably, the circuit control method provided in this embodiment further includes: a reset stage: writing a reset signal to the signal line, the sensing unit and the pixel circuit to reset each circuit structure on the array substrate.
具体的,如图1和图2所示,本实施例中,可通过向各信号线写入低电平信号,控制像素电路中的存储电容C1放电,消除前一帧的电信号残留。Specifically, as shown in FIG. 1 and FIG. 2 , in this embodiment, by writing a low-level signal to each signal line, the storage capacitor C1 in the pixel circuit can be controlled to discharge, so as to eliminate the residual electrical signal of the previous frame.
如图1所示,阵列基板的像素电路中可包括:控制晶体管T1、驱动晶体管T2和存储电容C1等结构。优选的,控制晶体管T1、驱动晶体管T2为N型晶体管。具体的,如图2所示,本实施例提供的电路控制方法中,在初始化阶段,向第一信号线VDD写入第一充电信号(例如8V电压信号),同时,令数据线Vdata处于悬置状态。同时,向控制晶体管T1的控制极G1写入非工作电压(例如-20V电压信号),控制控制晶体管T1关断;驱动晶体管T2的控制极电压与控制晶体管T1的输出端电压相同,驱动晶体管T2关断;向感测晶体管T3的控制极G2写入第一控制电压(例如-25V电压信号),向感测晶体管T3的第一极写入第一感测电压(例如-20V电压信号),控制感测晶体管T3关断。在检测阶段,向第一信号线VDD提供的电压保持不变,同时,保持控制晶体管T1保持关断状态。通过感测线Sense继续向感测晶体管T3的第一极写入第一感测电压,向感测晶体管T3的控制极写入第二控制信号(例如-10V电压信号),控制感测晶体管T3开启。此时,第一感测电压写入像素电压输出端,并被VIOS系统检测到(传输到像素电压输出端的电压小于第一感测电压)。VIOS系统检测阵列基板上第一信号线的平均电压(也即第一充电电压)与各像素单元的像素电压输出端的电压差,并根据电压差进行光子成像显示。在第一时间端后,通过感测线Sense向感测晶体管T3的第一极写入第二感测电压(例如-10V电压信号),控制感测晶体管T3关断,检测结束。As shown in FIG. 1 , the pixel circuit of the array substrate may include structures such as a control transistor T1 , a driving transistor T2 and a storage capacitor C1 . Preferably, the control transistor T1 and the driving transistor T2 are N-type transistors. Specifically, as shown in FIG. 2 , in the circuit control method provided by this embodiment, in the initialization stage, a first charging signal (for example, an 8V voltage signal) is written to the first signal line VDD, and at the same time, the data line Vdata is suspended set status. At the same time, write a non-operating voltage (such as -20V voltage signal) to the control electrode G1 of the control transistor T1, and control the control transistor T1 to turn off; the control electrode voltage of the driving transistor T2 is the same as the output terminal voltage of the control transistor T1, and the driving transistor T2 Turn off; write the first control voltage (eg -25V voltage signal) to the control electrode G2 of the sensing transistor T3, write the first sensing voltage (eg -20V voltage signal) to the first electrode of the sensing transistor T3, The sensing transistor T3 is controlled to be turned off. In the detection phase, the voltage supplied to the first signal line VDD remains unchanged, and at the same time, the control transistor T1 is kept in an off state. Continue to write the first sensing voltage to the first electrode of the sensing transistor T3 through the sensing line Sense, and write a second control signal (eg -10V voltage signal) to the control electrode of the sensing transistor T3 to control the sensing transistor T3 on. At this time, the first sensing voltage is written into the pixel voltage output terminal and detected by the VIOS system (the voltage transmitted to the pixel voltage output terminal is lower than the first sensing voltage). The VIOS system detects the average voltage of the first signal line on the array substrate (ie, the first charging voltage) and the voltage difference between the pixel voltage output terminals of each pixel unit, and performs photon imaging display according to the voltage difference. After the first time end, a second sensing voltage (eg -10V voltage signal) is written to the first pole of the sensing transistor T3 through the sensing line Sense, and the sensing transistor T3 is controlled to be turned off, and the detection ends.
可以理解的是,本实施例中,在检测阶段,驱动晶体管T2关闭,感测晶体管T3开启,感测晶体管T3将第二感测电压写入像素电压输出端。其中,可以理解的是,由于感测晶体管T3的特性,实际由感测单元输出的电压小于感测线Sense输出的第一感测电压。而若感测单元发生弱迁移,此时像素电压输出端的电压等于感测晶体管T3的控制极电压。也就是说,正常像素单元的像素电压与发生弱迁移的像素单元中的像素电压是不同的,故而VIOS系统所转化的对应不同像素单元的亮度也是不同的,从而可确认阵列基本是否发生了不良。It can be understood that, in this embodiment, in the detection stage, the driving transistor T2 is turned off, the sensing transistor T3 is turned on, and the sensing transistor T3 writes the second sensing voltage into the pixel voltage output terminal. It can be understood that, due to the characteristics of the sensing transistor T3, the voltage actually output by the sensing unit is smaller than the first sensing voltage output by the sensing line Sense. If the sensing unit undergoes weak migration, the voltage of the pixel voltage output terminal is equal to the gate voltage of the sensing transistor T3. That is to say, the pixel voltage of the normal pixel unit is different from the pixel voltage of the pixel unit with weak migration, so the brightness of the corresponding different pixel units converted by the VIOS system is also different, so that it can be confirmed whether the array is basically defective. .
实施例2:Example 2:
本实施例提供一种阵列基板的检测方法,包括实施例1提供的任意一种路控制方法。This embodiment provides a detection method for an array substrate, including any one of the path control methods provided in
可选的,本实施例提供的检测方法中,还包括:Optionally, the detection method provided in this embodiment further includes:
在检测阶段:检测阵列基板的信号线的电压和像素电压输出端的像素电压。根据信号线的电压与像素电压的电压差,进行光学成像;光学成像亮度与电压差相关;根据光学成像结果,确定阵列基板的不良位置。In the detection stage: the voltage of the signal line of the array substrate and the pixel voltage of the pixel voltage output terminal are detected. According to the voltage difference between the voltage of the signal line and the pixel voltage, optical imaging is performed; the optical imaging brightness is related to the voltage difference; according to the optical imaging result, the defective position of the array substrate is determined.
本实施例提供的检测方法中,可通过VIOS系统对阵列基板的各信号线的电压以及像素电路的像素电压输出端处的像素电压进行检测。其中,VIOS系统可检测出信号线的平均电压,以及阵列基板中各像素电路中的像素电压,根据像素电压与信号线的平均电压的压差,进行光学成像,根据不同压差转化成的亮度不同,从而发现阵列基板的亮点带线亮点簇类型的不良显示现象。In the detection method provided in this embodiment, the voltage of each signal line of the array substrate and the pixel voltage at the pixel voltage output end of the pixel circuit can be detected by the VIOS system. Among them, the VIOS system can detect the average voltage of the signal line and the pixel voltage in each pixel circuit in the array substrate, and perform optical imaging according to the voltage difference between the pixel voltage and the average voltage of the signal line. Therefore, the poor display phenomenon of the bright spot strip line bright spot cluster type of the array substrate is found.
实施例3;Embodiment 3;
本实施例提供一种显示面板的制备方法,包括:This embodiment provides a preparation method of a display panel, including:
S1、制备阵列基板;阵列基板包括:像素电路、信号线、发光单元以及感测单元;像素电路的像素电压输出端与发光单元连接;感测单元的第一端与像素电压输出端连接。S1. Prepare an array substrate; the array substrate includes: a pixel circuit, a signal line, a light-emitting unit and a sensing unit; a pixel voltage output end of the pixel circuit is connected to the light-emitting unit; a first end of the sensing unit is connected to the pixel voltage output end.
S2、对阵列基板进行检测。S2. Detecting the array substrate.
具体的,本步骤中,可依据实施例2提供的检测方法对阵列基板进行检测,以及时发现阵列基板的亮点带线亮点簇类型的不良显示现象。Specifically, in this step, the array substrate can be detected according to the detection method provided in Embodiment 2, and the poor display phenomenon of the bright spot with line bright spot cluster type of the array substrate can be found in time.
可选的,本实施例提供的制备方法中,当检测阵列基板存在上述不良情况时,还可包括对阵列基板进行修复的步骤,具体可参考相关资料,本实施例中不再赘述。Optionally, in the preparation method provided in this embodiment, when detecting that the array substrate has the above-mentioned defect, the step of repairing the array substrate may be further included. For details, reference may be made to related materials, which will not be repeated in this embodiment.
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。It can be understood that the above embodiments are only exemplary embodiments adopted to illustrate the principle of the present invention, but the present invention is not limited thereto. For those skilled in the art, without departing from the spirit and essence of the present invention, various modifications and improvements can be made, and these modifications and improvements are also regarded as the protection scope of the present invention.
Claims (9)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110344715.9A CN113066412B (en) | 2021-03-29 | 2021-03-29 | Circuit control method, detection method and preparation method of array substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110344715.9A CN113066412B (en) | 2021-03-29 | 2021-03-29 | Circuit control method, detection method and preparation method of array substrate |
Publications (2)
Publication Number | Publication Date |
---|---|
CN113066412A CN113066412A (en) | 2021-07-02 |
CN113066412B true CN113066412B (en) | 2022-09-27 |
Family
ID=76564995
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202110344715.9A Expired - Fee Related CN113066412B (en) | 2021-03-29 | 2021-03-29 | Circuit control method, detection method and preparation method of array substrate |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN113066412B (en) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107516483A (en) * | 2017-09-28 | 2017-12-26 | 京东方科技集团股份有限公司 | Electrical detection method, device and the display module of device fault |
CN107705737A (en) * | 2017-09-28 | 2018-02-16 | 京东方科技集团股份有限公司 | The detection method and device of poor short circuit |
CN108877611A (en) * | 2018-07-16 | 2018-11-23 | 深圳市华星光电半导体显示技术有限公司 | Pixel-driving circuit method for sensing and pixel-driving circuit |
EP3605511A1 (en) * | 2017-03-31 | 2020-02-05 | Boe Technology Group Co. Ltd. | Circuit and method for detecting invalid pixel, and display device |
CN110969989A (en) * | 2019-12-20 | 2020-04-07 | 京东方科技集团股份有限公司 | Driving method and control driving method for pixel circuit |
CN111785195A (en) * | 2019-04-04 | 2020-10-16 | 合肥鑫晟光电科技有限公司 | Driving method of pixel circuit, compensation device and display equipment |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105118438B (en) * | 2015-09-21 | 2017-07-25 | 京东方科技集团股份有限公司 | Pixel-driving circuit, method, image element circuit and display device |
CN108417169B (en) * | 2018-03-27 | 2021-11-26 | 京东方科技集团股份有限公司 | Detection method of pixel circuit, driving method of display panel and display panel |
-
2021
- 2021-03-29 CN CN202110344715.9A patent/CN113066412B/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3605511A1 (en) * | 2017-03-31 | 2020-02-05 | Boe Technology Group Co. Ltd. | Circuit and method for detecting invalid pixel, and display device |
CN107516483A (en) * | 2017-09-28 | 2017-12-26 | 京东方科技集团股份有限公司 | Electrical detection method, device and the display module of device fault |
CN107705737A (en) * | 2017-09-28 | 2018-02-16 | 京东方科技集团股份有限公司 | The detection method and device of poor short circuit |
CN108877611A (en) * | 2018-07-16 | 2018-11-23 | 深圳市华星光电半导体显示技术有限公司 | Pixel-driving circuit method for sensing and pixel-driving circuit |
CN111785195A (en) * | 2019-04-04 | 2020-10-16 | 合肥鑫晟光电科技有限公司 | Driving method of pixel circuit, compensation device and display equipment |
CN110969989A (en) * | 2019-12-20 | 2020-04-07 | 京东方科技集团股份有限公司 | Driving method and control driving method for pixel circuit |
Also Published As
Publication number | Publication date |
---|---|
CN113066412A (en) | 2021-07-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN107799063B (en) | Organic light emitting display device and driving method thereof | |
EP3786931B1 (en) | Display panel, display device, and test method | |
US7525336B2 (en) | Method and apparatus for testing liquid crystal display device | |
US20090096770A1 (en) | Detecting defects in display panel pixels | |
CN107424549B (en) | Method and device for detecting threshold voltage drift | |
CN103426383B (en) | Short circuit inspection method | |
US9298055B2 (en) | Array substrate, method of disconnection inspecting gate lead wire and source lead wire in the array substrate, method of inspecting the array substrate, and liquid crystal display device | |
CN108877610B (en) | Array substrate, detection method thereof and display device | |
CN107705737B (en) | Method and device for detecting poor short circuit | |
CN115424554B (en) | Array substrate, VT test method thereof, display panel and display device | |
KR20080070169A (en) | Display device | |
WO2021258283A1 (en) | Display device, sub-pixel repair circuit and repair method therefor | |
CN113066412B (en) | Circuit control method, detection method and preparation method of array substrate | |
US11315452B2 (en) | Display apparatus and method of operating the same | |
US10417964B1 (en) | Display with redundancy | |
KR102780732B1 (en) | Display device and pixel characteristic sensing method of the same | |
CN115359746A (en) | Edge defect detection module, display panel and edge defect detection method | |
CN110706629B (en) | Detection method and detection device for display substrate | |
KR102395215B1 (en) | Organic Light Emitting Display Device and Driving Method thereof | |
CN114267274A (en) | Array substrate and detection method thereof, light-emitting panel and display device | |
JP2008083529A (en) | Active matrix substrate, active matrix substrate inspection method, and electro-optical device | |
CN112382236A (en) | Pixel circuit and driving method thereof | |
US20230320186A1 (en) | Method of inspecting display panel and manufacturing method of display panel | |
CN221884641U (en) | Test circuit, array substrate and display device | |
KR101735394B1 (en) | Flat panel display |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20220927 |
|
CF01 | Termination of patent right due to non-payment of annual fee |