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CN113013250B - Field effect transistor and preparation method thereof - Google Patents

Field effect transistor and preparation method thereof Download PDF

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CN113013250B
CN113013250B CN202110205068.3A CN202110205068A CN113013250B CN 113013250 B CN113013250 B CN 113013250B CN 202110205068 A CN202110205068 A CN 202110205068A CN 113013250 B CN113013250 B CN 113013250B
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insulating layer
effect transistor
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CN113013250A (en
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董俊辰
李琪
韩德栋
王漪
张兴
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
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    • H01L21/443Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
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    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
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    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
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    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
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Abstract

本发明公开了一种场效应晶体管及其制备方法,属于微电子器件领域。该场效应晶体管包括衬底、栅电极、金属‑绝缘层电介质、有源层和源/漏电极,栅电极位于衬底之上,金属‑绝缘层电介质位于栅电极之上,有源层位于金属‑绝缘层电介质之上,源/漏电极位于有源层之上,所述金属‑绝缘层电介质结构采用氧化铝/钛/氧化铝的三明治结构,所述氧化铝薄膜厚度分别为10‑100纳米,钛薄膜为金属钛薄膜或氧化钛薄膜,所述钛薄膜厚度为10‑100纳米。本发明提出了一种用于微电子器件的新型high‑k电介质材料,该金属‑绝缘层混合电介质采用磁控溅射和原子层淀积工艺制备,步骤简单、成本低,具有实际应用潜力。

Figure 202110205068

The invention discloses a field effect transistor and a preparation method thereof, belonging to the field of microelectronic devices. The field effect transistor includes a substrate, a gate electrode, a metal-insulating layer dielectric, an active layer and source/drain electrodes, the gate electrode is located on the substrate, the metal-insulating layer dielectric is located on the gate electrode, and the active layer is located on the metal On the insulating layer dielectric, the source/drain electrodes are located on the active layer, the metal-insulating layer dielectric structure adopts a sandwich structure of aluminum oxide/titanium/alumina, and the thickness of the aluminum oxide film is 10-100 nanometers respectively , the titanium film is a metal titanium film or a titanium oxide film, and the thickness of the titanium film is 10-100 nanometers. The present invention proposes a novel high-k dielectric material for microelectronic devices. The metal-insulating layer hybrid dielectric is prepared by magnetron sputtering and atomic layer deposition processes, with simple steps, low cost and practical application potential.

Figure 202110205068

Description

一种场效应晶体管及其制备方法Field-effect transistor and method of making the same

技术领域technical field

本发明属于集成电路微纳电子器件领域,具体涉及一种场效应晶体管及其制备方法。The invention belongs to the field of integrated circuit micro-nano electronic devices, in particular to a field effect transistor and a preparation method thereof.

背景技术Background technique

集成电路是现代信息技术的基石,已经在各行各业中发挥着非常重要的作用。我国集成电路需求量非常巨大,2020年全年进口量高达3515亿美金。近期我国加大集成电路产业投资,相关技术取得长足进步、创新能力持续提高,但仍存在技术水平不够、产品总体仍处于中低端等问题。Integrated circuits are the cornerstone of modern information technology and have played a very important role in all walks of life. The demand for integrated circuits in my country is very huge, and the annual import volume in 2020 is as high as 351.5 billion US dollars. Recently, my country has increased investment in the integrated circuit industry, related technologies have made great progress, and innovation capabilities have continued to improve. However, there are still problems such as insufficient technical level and low-end products as a whole.

微纳电子器件是集成电路的基础,其中最具代表性的器件是金属氧化物半导体场效应晶体管(Metal oxide semiconductor field-effect transistor,MOSFET)。为了更好地降低MOSFET器件泄露电流,从而提高电路集成度,一个重要研究方向是增强MOSFET栅电介质对沟道载流子的控制能力,即栅控能力。增强栅控能力的技术路径主要有两种:(1)使用high-k电介质材料替代SiO2电介质;(2)采用三维结构增加MOSFET器件栅控面积,例如鳍型场效应晶体管(fin field-effect transistor,FinFET)。以上两种技术路线结合,可进一步提升MOSFET栅控能力。此外,近几年提出的纳米片晶体管(nanosheet transistor)、纳米线晶体管(nanowire transistor)、负电容晶体管(negative capacitance transistor)等器件可视为以上两种技术路线的延伸。然而,在集成电路制备工艺方面,我国在上述技术上拥有的核心专利较少。因此,栅电介质材料及结构的原创技术的提出与研发具有非常重要的研究价值,对我国集成电路技术发展的意义巨大。Micro-nano electronic devices are the basis of integrated circuits, among which the most representative device is metal oxide semiconductor field-effect transistor (MOSFET). In order to better reduce the leakage current of MOSFET devices and thereby improve the circuit integration, an important research direction is to enhance the control ability of the MOSFET gate dielectric on the channel carriers, that is, the gate control ability. There are two main technical paths to enhance the gate control capability: (1) use high-k dielectric materials to replace SiO2 dielectric; (2) use three-dimensional structures to increase the gate control area of MOSFET devices, such as fin field-effect transistors (fin field-effect transistors) transistor, FinFET). The combination of the above two technical routes can further improve the gate control capability of the MOSFET. In addition, devices such as nanosheet transistors, nanowire transistors, and negative capacitance transistors proposed in recent years can be regarded as extensions of the above two technical routes. However, in terms of integrated circuit manufacturing process, my country has few core patents on the above-mentioned technologies. Therefore, the proposal and research and development of original technologies for gate dielectric materials and structures have very important research value, and are of great significance to the development of integrated circuit technology in my country.

应用较为广泛的high-k电介质材料通常为过渡金属氧化物,如氧化铪(HfO2)、氧化锆(ZrO2)、氧化钛(TiO2)等。其中,氧化铪电介质技术成熟度高,英特尔45nm制程已将该技术商业化。氧化钛介电常数(k=80~110)远高于氧化铪(k=20~25)和氧化锆(k=20~30)。然而,介电常数与带隙宽度呈负相关关系,带隙宽度减小会退化器件可靠性。氧化钛电介质制备过程中会形成氧缺陷和晶界,严重影响器件性能,表现为载流子迁移率减小。此外,与SiO2电介质/Si有源层界面相比,high-k电介质/Si有源层界面质量较差,也会对器件性能造成不良影响。因此,钛基的栅电介质材料及结构的创新性研究以及相关专利的申请对我国集成电路未来发展有巨大价值。The widely used high-k dielectric materials are usually transition metal oxides, such as hafnium oxide (HfO 2 ), zirconium oxide (ZrO 2 ), titanium oxide (TiO 2 ), and the like. Among them, hafnium oxide dielectric technology is highly mature, and Intel's 45nm process has commercialized this technology. The dielectric constant of titanium oxide (k=80-110) is much higher than that of hafnium oxide (k=20-25) and zirconium oxide (k=20-30). However, the dielectric constant is inversely related to the width of the bandgap, and a reduction in the width of the bandgap can degrade device reliability. Oxygen defects and grain boundaries are formed during the preparation of titanium oxide dielectrics, which seriously affect the device performance, which is manifested as a decrease in carrier mobility. In addition, the poor quality of the high-k dielectric/Si active layer interface compared to the SiO2 dielectric/Si active layer interface can also adversely affect device performance. Therefore, innovative research on titanium-based gate dielectric materials and structures and related patent applications are of great value to the future development of my country's integrated circuits.

发明内容SUMMARY OF THE INVENTION

本发明目的在于提供一种场效应晶体管及其制备方法。本发明采用新型三明治结构的金属-绝缘层混合电介质,该金属-绝缘层混合电介质采用氧化铝/钛/氧化铝的结构。The purpose of the present invention is to provide a field effect transistor and a preparation method thereof. The invention adopts a metal-insulating layer mixed dielectric with a novel sandwich structure, and the metal-insulating layer mixed dielectric adopts the structure of aluminum oxide/titanium/alumina.

本发明的技术方案是,The technical solution of the present invention is,

本发明提供一种场效应晶体管,其特征在于,包括衬底、栅电极、金属-绝缘层电介质、有源层和源/漏电极,栅电极位于衬底之上,金属-绝缘层电介质位于栅电极之上,有源层位于金属-绝缘层电介质之上,源/漏电极位于有源层之上,所述金属-绝缘层电介质结构采用氧化铝/钛/氧化铝的三明治结构,所述氧化铝薄膜厚度分别为10-100纳米,钛薄膜为金属钛薄膜或氧化钛薄膜,所述钛薄膜厚度为10-100纳米。The invention provides a field effect transistor, which is characterized by comprising a substrate, a gate electrode, a metal-insulating layer dielectric, an active layer and source/drain electrodes, the gate electrode is located on the substrate, and the metal-insulating layer dielectric is located on the gate Above the electrode, the active layer is located on the metal-insulating layer dielectric, the source/drain electrodes are located on the active layer, the metal-insulating layer dielectric structure adopts a sandwich structure of aluminum oxide/titanium/alumina, and the oxide The thickness of the aluminum film is respectively 10-100 nanometers, the titanium film is a metal titanium film or a titanium oxide film, and the thickness of the titanium film is 10-100 nanometers.

栅电极为Al、Ti、Mo等金属中的一种或多种的组合,或透明导电薄膜ITO、AZO等导电薄膜中的一种或多种的组合,所述栅电极厚度为100-500纳米。The gate electrode is a combination of one or more of metals such as Al, Ti, and Mo, or a combination of one or more of conductive thin films such as ITO and AZO, and the thickness of the gate electrode is 100-500 nanometers. .

所述金属-绝缘层混合电介质厚度为30-300纳米。The thickness of the metal-insulating layer hybrid dielectric is 30-300 nanometers.

有源层为氧化锌或掺杂氧化锌薄膜,所述有源层厚度为10-100纳米。对于掺杂氧化锌,掺杂元素为铝、锡、钼、钛等金属元素,硅、碳、磷等无机非金属元素,或镧、铒等稀土元素中的一种或者多种的组合。掺杂氧化锌薄膜中掺杂元素的含量为:掺杂元素0.1%-20%。The active layer is zinc oxide or doped zinc oxide thin film, and the thickness of the active layer is 10-100 nanometers. For doped zinc oxide, the doping elements are metal elements such as aluminum, tin, molybdenum, and titanium, inorganic non-metallic elements such as silicon, carbon, and phosphorus, or one or a combination of rare earth elements such as lanthanum and erbium. The content of the doping element in the doped zinc oxide film is: 0.1%-20% of the doping element.

源/漏电极为Al、Ti、Mo等金属中的一种或多种的组合,或透明导电薄膜ITO、AZO等导电薄膜中的一种或多种的组合,所述源/漏电极厚度为100-500纳米。The source/drain electrode is a combination of one or more of metals such as Al, Ti, and Mo, or a combination of one or more of conductive thin films such as ITO and AZO, and the thickness of the source/drain electrode is 100 mm. -500 nm.

同时,本发明提供一种场效应晶体管的制备方法。具体步骤如下:At the same time, the present invention provides a preparation method of a field effect transistor. Specific steps are as follows:

(1)将衬底依次置于丙酮、乙醇、去离子水中进行超声清洗;(1) The substrate is placed in acetone, ethanol, and deionized water for ultrasonic cleaning;

(2)采用磁控溅射工艺,在衬底表面淀积栅电极;(2) A magnetron sputtering process is used to deposit a gate electrode on the surface of the substrate;

(3)采用磁控溅射工艺和原子层电极工艺,在栅电极上淀积金属-绝缘层电介质;(3) using magnetron sputtering process and atomic layer electrode process to deposit metal-insulating layer dielectric on the gate electrode;

(4)采用原子层淀积工艺或磁控溅射工艺,在金属-绝缘层电介质上淀积有源层;(4) using atomic layer deposition process or magnetron sputtering process to deposit an active layer on the metal-insulating layer dielectric;

(5)采用磁控溅射工艺在有源层上淀积源/漏电极;(5) using magnetron sputtering process to deposit source/drain electrodes on the active layer;

(6)采用退火工艺,优化处理场效应晶体管。(6) An annealing process is used to optimize the treatment of the field effect transistor.

其中,步骤(3)中金属-绝缘层电介质的具体制备工艺包括如下步骤:Wherein, the specific preparation process of the metal-insulating layer dielectric in step (3) includes the following steps:

(a)衬底固定于原子层淀积设备反应腔;(a) the substrate is fixed in the reaction chamber of the atomic layer deposition equipment;

(b)将反应腔背底气压抽至50-100帕;(b) pumping the air pressure at the back of the reaction chamber to 50-100 Pa;

(c)向反应腔通入氮气,反应温度设置为100-200℃;(c) feed nitrogen into the reaction chamber, and the reaction temperature is set to 100-200°C;

(d)向反应腔通入反应源,开始淀积底层绝缘层,反应源为三甲基铝和去离子水(H2O);(d) feeding the reaction source into the reaction chamber, and starting to deposit the bottom insulating layer, the reaction source is trimethyl aluminum and deionized water (H 2 O);

(e)氧化铝薄膜绝缘层(底层)淀积完毕,关闭原子层淀积设备;(e) After the deposition of the insulating layer (bottom layer) of the aluminum oxide film is completed, the atomic layer deposition equipment is closed;

(f)将表面长有绝缘层的衬底固定于磁控溅射设备托盘;(f) fixing the substrate with the insulating layer on the surface to the magnetron sputtering equipment tray;

(g)磁控溅射设备腔体背底气压抽至1×10-4-9×10-4帕;(g) The air pressure at the back of the cavity of the magnetron sputtering equipment is pumped to 1×10 -4 -9×10 -4 Pa;

(h)磁控溅射设备腔体通入氧气和氩气,调整气压控制阀,将腔体气压设置为1帕;(h) Pour oxygen and argon into the magnetron sputtering equipment cavity, adjust the air pressure control valve, and set the cavity air pressure to 1 Pa;

(i)开启托盘转动按钮,转速设置为10-15转/分钟;(i) Turn on the tray rotation button, and set the rotation speed to 10-15 rpm;

(j)开启电源,预溅射2-5分钟,磁控溅射工艺使用的溅射靶材为金属钛靶;(j) turn on the power supply, pre-sputter for 2-5 minutes, and the sputtering target used in the magnetron sputtering process is a titanium metal target;

(l)转动磁控溅射靶材挡板,正式溅射20-30分钟;(1) Rotate the magnetron sputtering target baffle plate to formally sputter for 20-30 minutes;

(m)钛薄膜淀积完毕,关闭射频电源,关闭仪器;(m) After the deposition of the titanium film is completed, turn off the radio frequency power supply and turn off the instrument;

(n)重复步骤(a)-(e),淀积另一氧化铝薄膜绝缘层(顶层)。(n) Repeat steps (a)-(e) to deposit another aluminum oxide thin film insulating layer (top layer).

本发明的优点:Advantages of the present invention:

(1)本发明提出了一种用于微电子器件的新型high-k电介质材料,该发明具有很强原创性,为我国集成电路发展提供技术支撑。(2)本发明制备的金属-绝缘层混合电介质采用磁控溅射和原子层淀积工艺制备,步骤简单、成本低。(3)本发明场效应晶体管性能优异,具有实际应用潜力。(1) The present invention proposes a new type of high-k dielectric material for microelectronic devices, which is highly original and provides technical support for the development of integrated circuits in my country. (2) The metal-insulating layer hybrid dielectric prepared by the present invention is prepared by magnetron sputtering and atomic layer deposition, with simple steps and low cost. (3) The field effect transistor of the present invention has excellent performance and has practical application potential.

附图说明Description of drawings

图1为本发明所制备的场效应晶体管结构示意图;1 is a schematic structural diagram of a field effect transistor prepared by the present invention;

图2为本发明金属-绝缘层混合电介质结构示意图;2 is a schematic structural diagram of the metal-insulating layer hybrid dielectric of the present invention;

图3为本发明所制备的场效应晶体管电流-电压特性;Fig. 3 is the electric current-voltage characteristic of the field effect transistor prepared by the present invention;

1—衬底;2—栅电极;3—金属-绝缘层电介质;4—有源层;5—源/漏电极;6—氧化铝薄膜;7—钛薄膜。1-substrate; 2-gate electrode; 3-metal-insulating layer dielectric; 4-active layer; 5-source/drain electrode; 6-alumina film; 7-titanium film.

具体实施方式Detailed ways

下面结合说明书附图,通过实例对本发明做进一步说明。需要注意的是,公布实施方式的目的在于帮助进一步理解本发明,但是本领域的技术人员可以理解:在不脱离本发明及所附的权利要求的精神和范围内,各种替换和修改都是可能的。因此,本发明不应局限于实施例所公开的内容,本发明要求保护的范围以权利要求书界定的范围为准。The present invention will be further described by examples below in conjunction with the accompanying drawings. It should be noted that the purpose of publishing the embodiments is to help further understanding of the present invention, but those skilled in the art can understand that various replacements and modifications are possible without departing from the spirit and scope of the present invention and the appended claims. possible. Therefore, the present invention should not be limited to the contents disclosed in the embodiments, and the scope of protection of the present invention shall be subject to the scope defined by the claims.

图1所示本发明场效应晶体管,包括衬底、栅电极、金属-绝缘层电介质、有源层和源/漏电极,栅电极位于衬底之上,金属-绝缘层电介质位于栅电极之上,有源层位于金属-绝缘层电介质之上,源/漏电极位于有源层之上。The field effect transistor of the present invention shown in FIG. 1 includes a substrate, a gate electrode, a metal-insulating layer dielectric, an active layer and a source/drain electrode, the gate electrode is located on the substrate, and the metal-insulating layer dielectric is located on the gate electrode. , the active layer is located on the metal-insulating layer dielectric, and the source/drain electrodes are located on the active layer.

图2所示的金属-绝缘层混合电介质结构中钛薄膜位于两氧化铝薄膜之间呈三明治结构。氧化铝薄膜厚度分别为10-100纳米,钛薄膜为金属钛薄膜或氧化钛薄膜,所述钛薄膜厚度为10-100纳米。In the metal-insulating layer hybrid dielectric structure shown in FIG. 2, the titanium film is located between two aluminum oxide films in a sandwich structure. The thickness of the aluminum oxide film is respectively 10-100 nanometers, the titanium film is a metal titanium film or a titanium oxide film, and the thickness of the titanium film is 10-100 nanometers.

本发明的场效应晶体管有源层以氧化锌为例,具体制备工艺包括以下步骤:The active layer of the field effect transistor of the present invention takes zinc oxide as an example, and the specific preparation process includes the following steps:

(1)将玻璃衬底依次置于丙酮、乙醇、去离子水中进行超声清洗,清洗时间为5分钟。(1) The glass substrate was sequentially placed in acetone, ethanol and deionized water for ultrasonic cleaning, and the cleaning time was 5 minutes.

(2)磁控溅射工艺在玻璃衬底上淀积金属铝薄膜,所述铝薄膜厚度为100nm;采用光刻和刻蚀工艺形成铝栅电极图形。(2) The magnetron sputtering process deposits a metal aluminum film on the glass substrate, and the thickness of the aluminum film is 100 nm; the aluminum gate electrode pattern is formed by photolithography and etching process.

(3)栅电极上淀积金属-绝缘层混合电介质;采用光刻和刻蚀工艺形成金属-绝缘层混合电介质图形。(3) depositing a metal-insulating layer hybrid dielectric on the gate electrode; using photolithography and etching processes to form a metal-insulating layer hybrid dielectric pattern.

(4)磁控溅射工艺在金属-绝缘层混合电介质上淀积氧化锌薄膜,所述氧化锌薄膜厚度为30nm;采用光刻和刻蚀工艺形成氧化锌有源层图形。(4) The magnetron sputtering process deposits a zinc oxide film on the metal-insulating layer mixed dielectric, and the zinc oxide film has a thickness of 30 nm; photolithography and etching processes are used to form the zinc oxide active layer pattern.

(5)磁控溅射工艺在氧化锌有源层上淀积金属铝薄膜,所述铝薄膜厚度为100nm;采用光刻和刻蚀工艺形成铝源/漏电极图形。(5) Magnetron sputtering process depositing a metal aluminum film on the zinc oxide active layer, the thickness of the aluminum film being 100 nm; using photolithography and etching processes to form aluminum source/drain electrode patterns.

(6)使用退火炉对晶体管进行优化处理,退火温度为300℃,退火时间为1小时,退火气氛为真空。(6) An annealing furnace is used to optimize the transistor, the annealing temperature is 300° C., the annealing time is 1 hour, and the annealing atmosphere is vacuum.

其中,本发明提出的金属-绝缘层混合电介质具体步骤:Wherein, the specific steps of the metal-insulating layer hybrid dielectric proposed by the present invention are:

(1)将玻璃衬底固定于原子层淀积设备反应腔。(1) Fix the glass substrate in the reaction chamber of the atomic layer deposition equipment.

(2)原子层淀积设备反应腔背底气压抽至70帕。(2) The air pressure at the back of the reaction chamber of the atomic layer deposition equipment was pumped to 70 Pa.

(3)原子层淀积设备反应腔通入氮气,反应温度设置为150℃。(3) Nitrogen gas was introduced into the reaction chamber of the atomic layer deposition equipment, and the reaction temperature was set to 150°C.

(4)原子层淀积设备反应腔通入反应源,开始淀积氧化铝薄膜。使用的反应源为三甲基铝(trimethylaluminum)和去离子水(H2O)。反应过程中,三甲基铝(trimethylaluminum)和去离子水(H2O)循环次数为50次。(4) The reaction chamber of the atomic layer deposition equipment is connected to the reaction source, and the deposition of the aluminum oxide film begins. The reaction sources used were trimethylaluminum and deionized water ( H2O ). During the reaction, the number of cycles of trimethylaluminum and deionized water (H 2 O) was 50 times.

(5)氧化铝薄膜绝缘层(底)淀积完毕,关闭原子层淀积设备。(5) After the deposition of the insulating layer (bottom) of the aluminum oxide film is completed, the atomic layer deposition equipment is closed.

(6)将表面长有绝缘层(底)的衬底固定于磁控溅射设备托盘。(6) Fix the substrate with the insulating layer (bottom) on the surface of the magnetron sputtering equipment tray.

(7)磁控溅射设备腔体背底气压抽至5×10-4帕。(7) The air pressure at the back of the chamber of the magnetron sputtering equipment was pumped to 5 × 10 -4 Pa.

(8)磁控溅射设备腔体通入氧气和氩气,氧气与氩气流量比例10:90。调整气压控制阀,将腔体气压设置为1帕。(8) The cavity of the magnetron sputtering equipment is fed with oxygen and argon, and the flow ratio of oxygen and argon is 10:90. Adjust the air pressure control valve to set the chamber air pressure to 1 Pa.

(9)开启托盘转动按钮,转速设置为15转/分钟。(9) Turn on the tray rotation button, and set the rotation speed to 15 rpm.

(10)开启电源,预溅射2分钟。磁控溅射工艺使用的溅射靶材为金属钛靶。(10) Turn on the power and pre-sputter for 2 minutes. The sputtering target used in the magnetron sputtering process is a metallic titanium target.

(11)转动磁控溅射靶材挡板,正式溅射30分钟。(11) Rotate the magnetron sputtering target baffle plate, and formally sputter for 30 minutes.

(12)钛薄膜淀积完毕,关闭射频电源,关闭仪器。(12) After the deposition of the titanium film is completed, turn off the RF power supply and turn off the instrument.

(13)重复步骤(1)-(5),淀积氧化铝薄膜绝缘层(顶)。(13) Repeat steps (1)-(5) to deposit an aluminum oxide thin film insulating layer (top).

本发明制备的场效应晶体管的电流-电压特性如图3所示,器件显示良好的转移特性,场效应迁移率>25cm2V-1s-1The current-voltage characteristics of the field effect transistor prepared by the present invention are shown in FIG. 3 , the device shows good transfer characteristics, and the field effect mobility is >25cm 2 V -1 s -1 .

虽然本发明已以较佳实施例披露如上,然而并非用以限定本发明。任何熟悉本领域的技术人员,在不脱离本发明技术方案范围情况下,都可利用上述揭示的方法和技术内容对本发明技术方案作出许多可能的变动和修饰,或修改为等同变化的等效实施例。因此,凡是未脱离本发明技术方案的内容,依据本发明的技术实质对以上实施例所做的任何简单修改、等同变化及修饰,均仍属于本发明技术方案保护的范围内。Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art, without departing from the scope of the technical solution of the present invention, can make many possible changes and modifications to the technical solution of the present invention by using the methods and technical contents disclosed above, or modify it into an equivalent implementation of equivalent changes. example. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solutions of the present invention still fall within the protection scope of the technical solutions of the present invention.

Claims (8)

1.一种场效应晶体管,其特征在于,包括衬底、栅电极、金属-绝缘层电介质、有源层和源/漏电极,栅电极位于衬底之上,金属-绝缘层电介质位于栅电极之上,有源层位于金属-绝缘层电介质之上,源/漏电极位于有源层之上,所述金属-绝缘层电介质结构采用氧化铝/钛/氧化铝的三明治结构,所述氧化铝薄膜厚度分别为10-100纳米,钛薄膜为金属钛薄膜或氧化钛薄膜,所述钛薄膜厚度为10-100纳米。1. a field effect transistor, is characterized in that, comprises substrate, gate electrode, metal-insulating layer dielectric, active layer and source/drain electrode, gate electrode is positioned on the substrate, and metal-insulating layer dielectric is positioned at gate electrode Above, the active layer is located on the metal-insulating layer dielectric, the source/drain electrodes are located on the active layer, the metal-insulating layer dielectric structure adopts a sandwich structure of aluminum oxide/titanium/alumina, and the aluminum oxide The thickness of the film is 10-100 nanometers respectively, the titanium film is a metal titanium film or a titanium oxide film, and the thickness of the titanium film is 10-100 nanometers. 2.如权利要求1所述的场效应晶体管,其特征在于,所述栅电极为Al、Ti、Mo金属中的一种或多种的组合,或透明导电薄膜ITO、AZO导电薄膜中的一种或多种的组合,所述栅电极厚度为100-500纳米。2. field effect transistor as claimed in claim 1 is characterized in that, described gate electrode is the combination of one or more in Al, Ti, Mo metal, or one in transparent conductive film ITO, AZO conductive film One or more combinations, the thickness of the gate electrode is 100-500 nanometers. 3.如权利要求1所述的场效应晶体管,其特征在于,所述有源层为氧化锌或掺杂氧化锌薄膜,所述有源层厚度为10-100纳米。3 . The field effect transistor according to claim 1 , wherein the active layer is a zinc oxide or doped zinc oxide film, and the thickness of the active layer is 10-100 nanometers. 4 . 4.如权利要求3所述的场效应晶体管,其特征在于,所述掺杂氧化锌,掺杂元素为铝、锡、钼、钛金属元素,硅、碳、磷无机非金属元素,或镧、铒稀土元素中的一种或者多种的组合。4 . The field effect transistor according to claim 3 , wherein the doped zinc oxide is composed of aluminum, tin, molybdenum, titanium metal elements, silicon, carbon, phosphorus inorganic non-metallic elements, or lanthanum. 5 . , one or a combination of erbium rare earth elements. 5.如权利要求4所述的场效应晶体管,其特征在于,掺杂氧化锌薄膜中掺杂元素的含量为:掺杂元素0.1%-20%。5 . The field effect transistor according to claim 4 , wherein the content of the doping element in the doped zinc oxide film is: 0.1%-20% of the doping element. 6 . 6.如权利要求1所述的场效应晶体管,其特征在于,源/漏电极为Al、Ti、Mo金属中的一种或多种的组合,或透明导电薄膜ITO、AZO导电薄膜中的一种或多种的组合,所述源/漏电极厚度为100-500纳米。6. field effect transistor as claimed in claim 1 is characterized in that, source/drain electrode is the combination of one or more in Al, Ti, Mo metal, or a kind of in transparent conductive film ITO, AZO conductive film or a combination of more than one, the thickness of the source/drain electrodes is 100-500 nanometers. 7.如权利要求1所述的场效应晶体管的制备方法,其步骤如下:7. The preparation method of field effect transistor as claimed in claim 1, its steps are as follows: (1)将衬底依次置于丙酮、乙醇、去离子水中进行超声清洗;(1) The substrate is placed in acetone, ethanol, and deionized water for ultrasonic cleaning; (2)采用磁控溅射工艺,在衬底表面淀积栅电极;(2) A magnetron sputtering process is used to deposit a gate electrode on the surface of the substrate; (3)采用磁控溅射工艺和原子层电极工艺,在栅电极上淀积金属-绝缘层混合电介质;(3) using magnetron sputtering process and atomic layer electrode process to deposit metal-insulating layer mixed dielectric on the gate electrode; (4)采用原子层淀积工艺或磁控溅射工艺,在金属-绝缘层混合电介质上淀积有源层;(4) using atomic layer deposition process or magnetron sputtering process to deposit an active layer on the metal-insulating layer mixed dielectric; (5)采用磁控溅射工艺在有源层上淀积源/漏电极;(5) using magnetron sputtering process to deposit source/drain electrodes on the active layer; (6)采用退火工艺,优化处理场效应晶体管。(6) An annealing process is used to optimize the treatment of the field effect transistor. 8.如权利要求7所述的制备方法,其特征在于,步骤(3)具体步骤包括:8. preparation method as claimed in claim 7 is characterized in that, step (3) concrete steps comprise: (a)衬底固定于原子层淀积设备反应腔;(a) the substrate is fixed in the reaction chamber of the atomic layer deposition equipment; (b)将反应腔背底气压抽至50-100帕;(b) pumping the air pressure at the back of the reaction chamber to 50-100 Pa; (c)向反应腔通入氮气,反应温度设置为100-200℃;(c) feed nitrogen into the reaction chamber, and the reaction temperature is set to 100-200°C; (d)向反应腔通入反应源,开始淀积底层绝缘层,反应源为三甲基铝和去离子水(H2O);(d) feeding the reaction source into the reaction chamber, and starting to deposit the bottom insulating layer, the reaction source is trimethyl aluminum and deionized water (H 2 O); (e)氧化铝薄膜绝缘层淀积完毕,关闭原子层淀积设备;(e) After the deposition of the insulating layer of the aluminum oxide film is completed, the atomic layer deposition equipment is closed; (f)将表面长有绝缘层的衬底固定于磁控溅射设备托盘;(f) fixing the substrate with the insulating layer on the surface to the magnetron sputtering equipment tray; (g)磁控溅射设备腔体背底气压抽至1×10-4-9×10-4帕;(g) The air pressure at the back of the cavity of the magnetron sputtering equipment is pumped to 1×10 -4 -9×10 -4 Pa; (h)磁控溅射设备腔体通入氧气和氩气,调整气压控制阀,将腔体气压设置为1帕;(h) Pour oxygen and argon into the magnetron sputtering equipment cavity, adjust the air pressure control valve, and set the cavity air pressure to 1 Pa; (i)开启托盘转动按钮,转速设置为10-15转/分钟;(i) Turn on the tray rotation button, and set the rotation speed to 10-15 rpm; (j)开启电源,预溅射2-5分钟,磁控溅射工艺使用的溅射靶材为金属钛靶;(j) turn on the power supply, pre-sputter for 2-5 minutes, and the sputtering target used in the magnetron sputtering process is a titanium metal target; (l)转动磁控溅射靶材挡板,正式溅射20-30分钟;(1) Rotate the magnetron sputtering target baffle plate to formally sputter for 20-30 minutes; (m)钛薄膜淀积完毕,关闭射频电源,关闭仪器;(m) After the deposition of the titanium film is completed, turn off the radio frequency power supply and turn off the instrument; (n)重复步骤(a)-(e),淀积另一氧化铝薄膜绝缘层。(n) Repeat steps (a)-(e) to deposit another aluminum oxide thin film insulating layer.
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