CN112994437A - Starting circuit applied to switching power supply and power integrated device - Google Patents
Starting circuit applied to switching power supply and power integrated device Download PDFInfo
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- CN112994437A CN112994437A CN202110174606.7A CN202110174606A CN112994437A CN 112994437 A CN112994437 A CN 112994437A CN 202110174606 A CN202110174606 A CN 202110174606A CN 112994437 A CN112994437 A CN 112994437A
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- 238000010586 diagram Methods 0.000 description 7
- 238000004804 winding Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
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- 238000012986 modification Methods 0.000 description 1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/36—Means for starting or stopping converters
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Abstract
The invention relates to a starting circuit applied to a switching power supply, which comprises a high-voltage depletion type MOS device M1, an enhancement type MOS device M2 and a diode D1; the drain of the enhancement type MOS device M2 is connected with the gate of the depletion type MOS device M1, the anode of the diode D1 is connected with the gate of the enhancement type MOS device M2, and the cathode of the diode D1 is connected with the source of the depletion type MOS device M1. The depletion type MOS device in the starting circuit provides electric energy for the PWM IC when the circuit is started, and the depletion type MOS device is in a turn-off state after the circuit is started, so that the electric energy is not consumed, and the system power consumption of the switching power supply can be reduced.
Description
Technical Field
The invention belongs to the technical field of switching power supplies, and particularly relates to a starting circuit and a power integrated device applied to a switching power supply.
Background
In the flyback switching power supply, the additional winding of the transformer is usually used to supply power to the PWM IC (pulse width modulation chip), but in the circuit starting phase, the additional winding does not have voltage output yet, so the initial power supply cannot be supplied to the PWM IC, and the starting circuit is needed to supply power to the PWM IC.
The traditional starting circuit consists of a power resistor, and the resistor continuously consumes larger power, so that the energy consumption of the circuit is obviously increased, and the circuit is not beneficial to energy conservation.
The starting circuit composed of depletion MOS devices is used for providing electric energy for the PWM IC, and the system power consumption, particularly the standby power consumption, can be greatly reduced. This is because the depletion type MOS device is a normally-on device, and when the gate-source voltage VGS is 0V, the channel of the device is in a natural on state. The depletion type power MOS device is applied to the starting circuit, after the PWM IC is started, the additional winding is used for providing power for the IC, the depletion type MOS device is in a turn-off state, and the starting circuit hardly has power loss.
However, the Start-Up circuit formed by the depletion MOS device needs to control the depletion MOS device, and like a PWM IC such as IW1699, the PWM IC has an ASU (Active Start-Up) pin, and when the circuit is started, the gate potential of the depletion MOS device is lowered by the ASU pin, so that the source potential of the device is higher than the gate potential, and thus the depletion MOS device is in an off state, and the Start-Up circuit does not consume electric energy, as shown in fig. 1. However, many PWM ICs do not have an ASU pin as in IW1699, and cannot directly use depletion MOS devices to reduce circuit power consumption. Therefore, a start-up circuit that can directly use depletion type MOS devices to reduce the power consumption of the circuit is needed.
Disclosure of Invention
The invention aims to solve the technical problems in the prior art and provides a starting circuit and a power integrated device applied to a switching power supply.
In order to solve the above technical problem, an embodiment of the present invention provides a starting circuit applied to a switching power supply, including a high-voltage depletion type MOS device M1, an enhancement type MOS device M2, and a diode D1;
the drain of the enhancement type MOS device M2 is connected with the gate of the depletion type MOS device M1, the anode of the diode D1 is connected with the gate of the enhancement type MOS device M2, and the cathode of the diode D1 is connected with the source of the depletion type MOS device M1.
The invention has the beneficial effects that: the depletion type MOS device applied to the starting circuit of the switching power supply provides electric energy for the PWM IC when the circuit is started, and the depletion type MOS device is in a turn-off state after the circuit is started, so that the electric energy is not consumed, and the system power consumption of the switching power supply can be reduced.
On the basis of the technical scheme, the invention can be further improved as follows.
Further, the high-voltage depletion type MOS device M1 is of a high-voltage VDMOS structure or an LDMOS structure, and the enhancement type MOS device M2 is of a high-voltage VDMOS structure or an LDMOS structure.
To solve the above technical problem, an embodiment of the present invention provides a power integrated device, including the above starting circuit applied to a switching power supply.
Further, the power integrated device has 4 pins.
Further, the high-voltage depletion type MOS device M1, the enhancement type MOS device M2 and the diode D1 are three discrete devices.
Further, the high-voltage depletion type MOS device M1, the enhancement type MOS device M2 and the diode D1 are packaged in the same package body.
Further, the high-voltage depletion type MOS device M1 and the enhancement type MOS device M2 are manufactured in a first chip, and the first chip and the diode D1 are packaged in the same package body;
the first chip has 4 terminals: a first terminal S1 for leading out the source of the high-voltage depletion MOS device M1, a second terminal S2 for leading out the source of the enhancement MOS device M2, a third terminal D for leading out the drain of the high-voltage depletion MOS device M1 and a fourth terminal G for leading out the grid of the enhancement MOS device M2.
Further, the third terminal D is located on the first surface of the first chip;
the active region of the high-voltage depletion type MOS device M1 and the active region of the enhancement type MOS device M2 are spaced at a second surface of the first chip, and the second surface is opposite to the first surface.
Further, the high-voltage depletion type MOS device M1, the enhancement type MOS device M2 and the diode D1 are manufactured in a second chip;
the second chip has 4 terminals: a first terminal S1 for leading out the source of the high-voltage depletion MOS device M1, a second terminal S2 for leading out the source of the enhancement MOS device M2, a third terminal D for leading out the drain of the high-voltage depletion MOS device M1 and a fourth terminal G for leading out the grid of the enhancement MOS device M2.
Further, the third terminal D is located on the first surface of the second chip;
the active region of the high-voltage depletion type MOS device M1 and the active region of the enhancement type MOS device M2 are spaced at a second surface of the second chip, and the second surface is opposite to the first surface.
Drawings
FIG. 1 is a schematic diagram of a conventional circuit for powering a PWM IC using a start-up circuit composed of depletion MOS devices;
fig. 2 is a schematic diagram of a starting circuit applied to a switching power supply according to a first embodiment of the present invention;
fig. 3 is a schematic circuit diagram of a starting circuit applied to a switching power supply for supplying power to a PWM IC according to a first embodiment of the present invention;
FIG. 4 is a schematic circuit diagram of a high-voltage depletion MOS device M1 and an enhancement MOS device M2 integrated on the same chip;
FIG. 5 is a layout diagram of a high-voltage depletion MOS device M1 and an enhancement MOS device M2 integrated on the same chip;
fig. 6 is a layout diagram of the high-voltage depletion MOS device M1, the enhancement MOS device M2, and the diode D1 integrated on the same chip.
Detailed Description
The principles and features of this invention are described below in conjunction with the following drawings, which are set forth by way of illustration only and are not intended to limit the scope of the invention.
As shown in fig. 2, a starting circuit applied to a switching power supply according to a first embodiment of the present invention includes a high-voltage depletion MOS device M1, an enhancement MOS device M2, and a diode D1;
the drain of the enhancement type MOS device M2 is connected with the gate of the depletion type MOS device M1, the anode of the diode D1 is connected with the gate of the enhancement type MOS device M2, and the cathode of the diode D1 is connected with the source of the depletion type MOS device M1.
The application principle of the above embodiment in the circuit is shown in fig. 3, initially, rectified high voltage is limited by a resistor R and then charges a capacitor C through a depletion type MOS device M1, Vcc voltage supplied to the PWM IC is gradually increased in the process, when the working voltage of the PWM IC is reached, the PWM IC is started, the whole circuit starts to work, at this time, an additional winding starts to supply power, the voltage of a port 3 is increased, an enhancement type MOS device M2 starts to be turned on, the gate potential of the depletion type MOS device M1 is pulled low, since the source potential of the depletion type MOS device M1 is higher than the gate potential, the device is in an off state, the starting circuit does not consume electric energy, and thus the purpose of energy saving is achieved.
Optionally, the high-voltage depletion type MOS device M1 adopts a high-voltage VDMOS structure or an LDMOS structure, and the enhancement type MOS device M2 adopts a high-voltage VDMOS structure or an LDMOS structure.
A second embodiment of the present invention provides a power integrated device, including the above starting circuit applied to a switching power supply.
Optionally, the power integrated device has 4 pins.
Optionally, the high-voltage depletion MOS device M1, the enhancement MOS device M2, and the diode D1 are three discrete devices.
Optionally, the high-voltage depletion type MOS device M1, the enhancement type MOS device M2, and the diode D1 are packaged in the same package.
Optionally, the high-voltage depletion type MOS device M1 and the enhancement type MOS device M2 are fabricated in a first chip, and the first chip and the diode D1 are packaged in the same package;
the first chip has 4 terminals: a first terminal S1 for leading out the source of the high-voltage depletion MOS device M1, a second terminal S2 for leading out the source of the enhancement MOS device M2, a third terminal D for leading out the drain of the high-voltage depletion MOS device M1 and a fourth terminal G for leading out the grid of the enhancement MOS device M2.
In the above embodiment, when the high-voltage depletion MOS device M1 and the enhancement MOS device M2 are fabricated in the first chip, the schematic circuit diagram is shown in fig. 4.
Optionally, the third terminal D is located on the first surface of the first chip;
the active region of the high-voltage depletion type MOS device M1 and the active region of the enhancement type MOS device M2 are spaced at a second surface of the first chip, and the second surface is opposite to the first surface.
In the above embodiment, the wire bonding region of the first terminal S1 is located in the active region of the high voltage depletion MOS device M1, the wire bonding region of the second terminal S2 is located in the active region of the enhancement MOS device M2, the wire bonding region of the fourth terminal G may be located between the active region of the high voltage depletion MOS device M1 and the active region of the enhancement MOS device M2, and the front layout of the first chip is as shown in fig. 5. The third terminal D may be soldered or silver-plated to the package frame.
Optionally, the high-voltage depletion type MOS device M1, the enhancement type MOS device M2 and the diode D1 are fabricated in a second chip;
the second chip has 4 terminals: a first terminal S1 for leading out the source of the high-voltage depletion MOS device M1, a second terminal S2 for leading out the source of the enhancement MOS device M2, a third terminal D for leading out the drain of the high-voltage depletion MOS device M1 and a fourth terminal G for leading out the grid of the enhancement MOS device M2.
Optionally, the third terminal D is located on the first surface of the second chip;
the active region of the high-voltage depletion type MOS device M1 and the active region of the enhancement type MOS device M2 are spaced at a second surface of the second chip, and the second surface is opposite to the first surface.
In the above embodiments, the wire bonding region of the first terminal S1 is located in the active region of the high voltage depletion MOS device M1, the wire bonding region of the second terminal S2 is located in the active region of the enhancement MOS device M2, the wire bonding region of the fourth terminal G may be located between the active region of the high voltage depletion MOS device M1 and the active region of the enhancement MOS device M2, the diode D1 may be located between the wire bonding region of the fourth terminal G and the active regions of the high voltage depletion MOS device M1 and the enhancement MOS device M2, and the front layout of the second chip is shown in fig. 6. The third terminal D may be soldered or silver-plated to the package frame.
The terms "first" and "second" in the description of the present invention are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (10)
1. A starting circuit applied to a switching power supply is characterized by comprising a high-voltage depletion type MOS device M1, an enhancement type MOS device M2 and a diode D1;
the drain of the enhancement type MOS device M2 is connected with the gate of the depletion type MOS device M1, the anode of the diode D1 is connected with the gate of the enhancement type MOS device M2, and the cathode of the diode D1 is connected with the source of the depletion type MOS device M1.
2. The starting circuit applied to the switching power supply, according to claim 1, wherein the high-voltage depletion type MOS device M1 adopts a high-voltage VDMOS structure or an LDMOS structure, and the enhancement type MOS device M2 adopts a high-voltage VDMOS structure or an LDMOS structure.
3. A power integrated device comprising a start-up circuit for a switching power supply according to any one of claims 1 to 2.
4. A power integrated device according to claim 3, wherein the power integrated device has 4 pins.
5. A power integrated device according to claim 3, wherein the high voltage depletion MOS device M1, the enhancement MOS device M2 and the diode D1 are three discrete devices.
6. The power integrated device according to claim 3, wherein the high-voltage depletion MOS device M1, the enhancement MOS device M2 and the diode D1 are packaged in the same package.
7. The power integrated device according to claim 3, wherein the high-voltage depletion type MOS device M1 and the enhancement type MOS device M2 are fabricated in a first chip, and the first chip and the diode D1 are packaged in the same package;
the first chip has 4 terminals: a first terminal S1 for leading out the source of the high-voltage depletion MOS device M1, a second terminal S2 for leading out the source of the enhancement MOS device M2, a third terminal D for leading out the drain of the high-voltage depletion MOS device M1 and a fourth terminal G for leading out the grid of the enhancement MOS device M2.
8. A power integrated device according to claim 7, wherein said third terminal D is located at the first surface of said first chip;
the active region of the high-voltage depletion type MOS device M1 and the active region of the enhancement type MOS device M2 are spaced at a second surface of the first chip, and the second surface is opposite to the first surface.
9. The power integrated device as claimed in claim 3, wherein the high voltage depletion MOS device M1, the enhancement MOS device M2 and the diode D1 are fabricated in a second chip;
the second chip has 4 terminals: a first terminal S1 for leading out the source of the high-voltage depletion MOS device M1, a second terminal S2 for leading out the source of the enhancement MOS device M2, a third terminal D for leading out the drain of the high-voltage depletion MOS device M1 and a fourth terminal G for leading out the grid of the enhancement MOS device M2.
10. A power integrated device according to claim 3, wherein said third terminal D is located on the first surface of said second chip;
the active region of the high-voltage depletion type MOS device M1 and the active region of the enhancement type MOS device M2 are spaced at a second surface of the second chip, and the second surface is opposite to the first surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110174606.7A CN112994437A (en) | 2021-02-07 | 2021-02-07 | Starting circuit applied to switching power supply and power integrated device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110174606.7A CN112994437A (en) | 2021-02-07 | 2021-02-07 | Starting circuit applied to switching power supply and power integrated device |
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| Publication Number | Publication Date |
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| CN112994437A true CN112994437A (en) | 2021-06-18 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202110174606.7A Pending CN112994437A (en) | 2021-02-07 | 2021-02-07 | Starting circuit applied to switching power supply and power integrated device |
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|---|---|---|---|---|
| EP0765025A2 (en) * | 1995-09-21 | 1997-03-26 | Siemens Aktiengesellschaft | Start-up circuit and semiconductor device for such a start-up circuit |
| US20080073675A1 (en) * | 2006-09-22 | 2008-03-27 | Richtek Technology Corporation | Transistor with start-up control element |
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| US20170222573A1 (en) * | 2016-01-28 | 2017-08-03 | Infineon Technologies Austria Ag | Resonant Decoupled Auxiliary Supply for a Switched-Mode Power Supply Controller |
| JP2019047655A (en) * | 2017-09-04 | 2019-03-22 | ミツミ電機株式会社 | Semiconductor device for power supply control, power supply device, discharge method of x capacitor, and switch control method |
| CN208768318U (en) * | 2018-06-22 | 2019-04-19 | 宁波赛耐比光电科技股份有限公司 | A kind of LED switch power supply fast start circuit |
| CN212392808U (en) * | 2020-07-07 | 2021-01-22 | 亚瑞源科技（深圳）有限公司 | Quick start circuit |
-
2021
- 2021-02-07 CN CN202110174606.7A patent/CN112994437A/en active Pending
Patent Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0765025A2 (en) * | 1995-09-21 | 1997-03-26 | Siemens Aktiengesellschaft | Start-up circuit and semiconductor device for such a start-up circuit |
| US20080073675A1 (en) * | 2006-09-22 | 2008-03-27 | Richtek Technology Corporation | Transistor with start-up control element |
| CN101924482A (en) * | 2009-05-28 | 2010-12-22 | 成都芯源系统有限公司 | Power integrated circuit for power converter and manufacturing method |
| JP2011188361A (en) * | 2010-03-10 | 2011-09-22 | Renesas Electronics Corp | Power-on reset circuit |
| CN102478877A (en) * | 2010-11-24 | 2012-05-30 | 精工电子有限公司 | Constant current circuit and reference voltage circuit |
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Application publication date: 20210618 |