CN112711927B - De-embedding method based on resistor unit cascading - Google Patents
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Abstract
The invention relates to a resistor unit cascade-based de-embedding method, which comprises the following steps: step 1: firstly, respectively acquiring test scattering parameters of two on-chip resistor device test structures with different resistance values; step 2: then, dividing the resistors in the two resistor device test structures into a plurality of adjacent and same resistor units, wherein the resistor units of one resistor device are more than the resistor units of the other resistor device by 1 or more, using the test scattering parameters of the two resistor device test structures, and calculating the scattering parameters of the bonding pads, the interconnection lines and the through holes through algorithms; step 3: and finally, removing the scattering parameters of the pad, the interconnection line and the through hole from the test scattering parameters of the resistor device test structure to obtain the scattering parameters of the resistor device to be tested. The technical scheme provides the de-embedding technology which has the advantages of simple structure, simple and convenient test and higher precision, and can realize the performance that the traditional technology can be realized respectively only by means of a complex structure or different modes.
Description
Technical Field
The invention relates to a method, in particular to a resistor unit cascade connection-based de-embedding method, and belongs to the technical field of radio frequency device testing.
Background
In order to improve yield and reduce development costs in electronic device and integrated circuit designs, a model of a circuit device (such as a transistor, an inductor, a resistor, etc.) is required, and obtaining accurate device test data is a key step. Since the probes cannot be directly connected to the device when the integrated circuit device is tested on chip, embedded structures such as pads, interconnect lines, etc. are required to be added to the input and output ports of the device. And removing the influence of the embedded structure on the device test from the original test data by using a corresponding external embedding removing method (abbreviated as embedding removing) to acquire the test data of the device.
Document 1 (h.ito and k.visual, "a Simple Through-Only De-Embedding Method for On-Wafer S-Parameter Measurements up to GHz," IEEE MTT-S International Microwave Symposium Digest, pp.383-386, jun.2008) establishes an equivalent circuit model for the embedded structure of the input/output port of a transmission line device to be tested, for on-chip transmission line De-embedding. And extracting element parameters of the embedded structure model by using the test scattering parameters of the through structure, calculating to obtain the scattering parameters of the embedded structure, and stripping the scattering parameters from the original test data. The method needs to establish an accurate equivalent circuit model for the embedded structure, and relies on the direct structure test data to extract model parameters, so that the problem of parameter extraction and multi-value solution exists, and the de-embedding precision is further affected.
In order to overcome the defect that an equivalent circuit model is difficult to extract parameters and low in precision in the establishment of an embedded structure, document 2 (Jun Luo, lei Zhang, and Yan Wang, "A Distributed De-Embedding Solution for CMOS mm-Wave On-Wafer Measurements Based-On Double Open-Short technology," IEEE Microw.Wireless Compon. Lett., vol.23, no.12, pp.686-688, dec.2013) proposes a De-embedding method based On a standard transmission line equation. According to the method, test data of a pad-open circuit/pad-short circuit/interconnection line-open circuit/interconnection line-short circuit test structure are obtained, parasitic outside the pad is removed, an admittance parameter matrix of an interconnection line in the embedded structure is obtained through calculation, and parameters such as characteristic impedance, propagation coefficient and the like of the transmission line are obtained through calculation by using a standard transmission line equation. The method has the defects that four complex test structures are required to be used, the occupied chip area is large, accurate test data of the complex test structures are acquired, and the test difficulty is increased.
In order to improve the defects of complex test structure and large occupied chip area, document 3 (h.j.saavedra-Gomez, j.r.lo-Yau, P.Moreno, B.E.Figueroa-resundiz, and j.a.reynoso-Hernandez, "Onwafer CMOS transistors de-embedding method using two transmission lines of different lengths," IEEE Radio Frequency Integrated Circuits Symposium (RFIC), pp.417-420, jun.2012) uses two sets of test scattering parameters of on-chip transmission line test structures, calculates the characteristic impedance and propagation coefficient parameters of the transmission line based on a standard transmission line equation, and further calculates the scattering parameter matrix of the transmission line. The method has the defect that a scattering parameter matrix of the bonding pad needs to be simplified so as to be convenient to calculate, and further the de-embedding precision is affected.
In summary, in order to achieve higher de-embedding accuracy, some conventional de-embedding methods require complex and numerous test structures, and the de-embedding process is complex and occupies a larger chip area; some technical approaches reduce the number of test structures, but simplify the embedded structure. The prior de-embedding technology with simple structure, simple and convenient test and high precision is not available.
Disclosure of Invention
Aiming at the problems existing in the prior art, the invention provides a de-embedding method based on resistor unit cascading, and the technical scheme provides a de-embedding technology with simple structure, simple and convenient test and higher precision, which can realize the performance that the traditional technology can be realized by means of complex structures or different modes.
In order to achieve the above object, the technical scheme of the invention is as follows, a resistor unit cascade-based de-embedding method, the method comprises the following steps:
step 1: firstly, respectively acquiring test scattering parameters of two on-chip resistor device test structures with different resistance values;
step 2: then, dividing the resistors in the two resistor device test structures into several adjacent and same resistor units, wherein the resistor units of one resistor device are more than the resistor units of the other resistor device by 1 or more, using the test scattering parameters of the two resistor device test structures, and calculating the scattering parameters of the bonding pads, the interconnection lines and the through holes by algorithm
Step 3: and finally, removing the scattering parameters of the pad, the interconnection line and the through hole from the test scattering parameters of the resistor device test structure to obtain the scattering parameters of the resistor device to be tested. The technical scheme has a simple structure, does not need one of an open circuit test structure, a straight-through test structure and a short circuit test structure, and can realize the performance that the traditional technology can be realized respectively by means of a complex structure or different modes. The method is suitable for microwave testing and modeling of devices such as inductors, resistors and the like.
As an improvement of the invention, in step 2, the resistors in the two resistor device test structures with different resistance values are divided into several adjacent and same resistor units; the ABCD matrix parameters of the resistors are multiplied by the ABCD matrix parameters of several adjacent resistor units divided into.
As an improvement of the invention, in step 2, the ABCD matrix parameters of the resistors in the two resistor device test structures with different resistance values are respectively recorded as [ A ] 1 ]And [ A ] 2 ]The method comprises the steps of carrying out a first treatment on the surface of the Dividing the resistor in the first resistor device test structure into N resistor units, and marking the ABCD matrix divided into N resistor units as [ A ] 1,k ]K=1, 2,3, … N; dividing the resistor in the second resistor device test structure into N+1 resistor units, and marking the ABCD matrix divided into N+1 resistor units as [ A ] 2,m ]M=1, 2,3, … n+1; the ABCD matrix parameter expressions of the resistors in the first and second resistor device test structures are respectively
[A 1 ]＝[A 1,1 ][A 1,2 ][A 1,3 ]…[A 1,N ]
[A 2 ]＝[A 2,1 ][A 2,2 ][A 2,3 ]…[A 2,(N+1) ]。
As an improvement of the present invention, the steps are specifically as follows:
step 1: measuring test scattering parameters of first and second resistive device test structures, respectivelyAnd->And transforms it into ABCD matrix parameters +.>And->
Step 2: dividing the resistors in the first and second resistor device test structures into N and N+1 adjacent and identical resistor units, wherein the resistance value of each resistor unit is R, and the ABCD matrix parameter of the resistor unit is recorded as [ A ]; the ABCD matrix parameter expressions of the resistors in the first and second resistor device test structures are respectively
The ABCD matrix parameter expressions of the first and second resistor device test structures are respectively
Wherein [ A ] IN ]Representing ABCD matrix of two resistor device test structures after cascade connection of input bonding pad, input interconnection line and input through hole, [ A ] OUT ]Representing ABCD matrix after cascade connection of output through hole, output interconnection line and output pad in two resistance device test structures;
using relationshipsAnd->Calculated to obtain [ A ] IN ]，[A OUT ]；
Step 3: by the formulaCalculating to obtain scattering parameters S of two resistance devices to be tested 1 ]And [ S ] 2 ]。
Compared with the prior art, the method has the advantages that the technical scheme provides the de-embedding method based on the resistor unit cascade connection, the method utilizes the test scattering parameters of the two resistor device test structures to calculate the scattering parameters of the bonding pad, the interconnection line and the through hole and perform de-embedding, and the method has the beneficial characteristics that the structure is simple, one of an open circuit test structure, a direct test structure and a short circuit test structure is not needed, and the performance that the traditional technology can be realized respectively only by means of a complex structure or different modes can be realized.
Drawings
FIG. 1 is a schematic diagram of a device under test and an embedded structure according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of a two-port network cascade of a device test structure according to an embodiment of the present invention.
Fig. 3 shows the real and imaginary parts of the S11, S12 parameters of the device under test (50Ω resistor) at different frequency points, wherein the dashed line represents the open-through method, the dash-dot line represents the standard transmission line equation, and the solid line represents the present technique.
Fig. 4 shows the real and imaginary parts of the S11, S12 parameters of the device under test (100 Ω resistor) at different frequency points, wherein the dashed line represents the open-through method, the dash-dot line represents the standard transmission line equation, and the solid line represents the present technique.
The specific embodiment is as follows:
in order to enhance the understanding of the present invention, the present embodiment will be described in detail with reference to the accompanying drawings.
Example 1: referring to fig. 1, a resistor unit cascade-based de-embedding method comprises the following steps:
step 1: firstly, respectively acquiring test scattering parameters of two on-chip resistor device test structures with different resistance values;
step 2: then, dividing the resistors in the two resistor device test structures into several adjacent and same resistor units, wherein the resistor units of one resistor device are more than the resistor units of the other resistor device by 1 or more, using the test scattering parameters of the two resistor device test structures, and calculating the scattering parameters of the bonding pads, the interconnection lines and the through holes by algorithm
Step 3: and finally, removing the scattering parameters of the pad, the interconnection line and the through hole from the test scattering parameters of the resistor device test structure to obtain the scattering parameters of the resistor device to be tested.
In the step 2, dividing the resistors in the two resistor device test structures with different resistance values into a plurality of adjacent and same resistor units; the ABCD matrix parameters of the resistors are multiplied by the ABCD matrix parameters of several adjacent resistor units divided into.
In step 2, the ABCD matrix parameters of the resistors in the two resistor device test structures with different resistance values are respectively recorded as [ A ] 1 ]And [ A ] 2 ]The method comprises the steps of carrying out a first treatment on the surface of the Dividing the resistor in the first resistor device test structure into N resistor units, and marking the ABCD matrix divided into N resistor units as [ A ] 1,k ]K=1, 2,3, … N; dividing the resistor in the second resistor device test structure into N+1 resistor units, and marking the ABCD matrix divided into N+1 resistor units as [ A ] 2,m ]M=1, 2,3, … n+1; the ABCD matrix parameter expressions of the resistors in the first and second resistor device test structures are respectively
[A 1 ]＝[A 1,1 ][A 1,2 ][A 1,3 ]…|[A 1,N ]
[A 2 ]＝[A 2,1 ][A 2,2 ][A 2,3 ]…|[A 2,(N+1) ]。
Wherein:
step 1: measuring test scattering parameters of first and second resistive device test structures, respectivelyAnd->And transforms it into ABCD matrix parameters +.>And->
Step 2: dividing the resistors in the first and second resistor device test structures into N and N+1 adjacent and identical resistor units, wherein the resistance value of each resistor unit is R, and the ABCD matrix parameter of the resistor unit is recorded as [ A ]; the ABCD matrix parameter expressions of the resistors in the first and second resistor device test structures are respectively
The ABCD matrix parameter expressions of the first and second resistor device test structures are respectively
Wherein [ A ] IN ]Representing ABCD matrix of two resistor device test structures after cascade connection of input bonding pad, input interconnection line and input through hole, [ A ] OUT ]Representing ABCD matrix after cascade connection of output through hole, output interconnection line and output pad in two resistance device test structures;
using relationshipsAnd->Calculated to obtain [ A ] IN ]，[A OUT ]；
Step 3: by the formulaCalculating to obtain scattering parameters S of two resistance devices to be tested 1 ]And [ S ] 2 ]。
Specific examples: the following describes a specific de-embedding process according to an embodiment of the present invention in conjunction with a specific example.
Because the probe cannot be directly connected with the on-chip tested integrated circuit device, an embedded structure such as a bonding pad, an interconnection line and the like needs to be added to an input/output test port of the device, and the on-chip resistor device test structure in the embodiment of the invention is shown in fig. 1. In order to obtain the test scattering parameters of the device itself, the effect of the embedded structure needs to be precisely removed by an embedding step.
The bond pads, interconnect lines, vias and device cell cascade formation of the resistive device test structure are shown in fig. 2 for the 0.1 μm GaN process. A de-embedding method based on resistor unit cascade connection comprises the following steps:
step 1: measuring the test scattering parameters of two resistance device test structures with resistance values of 50 omega and 100 omega respectivelyAnd->And transforms it into ABCD matrix parameters +.>And->
Step 2: dividing the resistances in the first and second resistance device test structures into 1 and 2 adjacent and same resistance units, wherein the resistance value of each resistance unit is R, and the ABCD matrix parameter of the resistance unit is [ A ]; the ABCD matrix parameter expression of the resistance in the first and second resistance device test structures is
[A 1 ]＝[A]
[A 2 ]＝[A][A]＝[A] 2
The ABCD matrix parameter expressions of the first and second resistor device test structures are
Wherein [ A ] IN ]Representing ABCD matrix of two resistor device test structures after cascade connection of input bonding pad, input interconnection line and input through hole, [ A ] OUT ]Representing ABCD matrix after cascade connection of output through hole, output interconnection line and output pad in two resistance device test structures;
using relationshipsAnd->Calculated to obtain [ A ] IN ]，[A OUT ]The method comprises the steps of carrying out a first treatment on the surface of the ABCD matrix [ A ] IN ]Each parameter of the Chinese medicine is marked as A IO ，B IO ，C IO ，D IO According to [ A ] IN ]And [ A ] OUT ]Relation between ABCD matrix [ A ] OUT ]Each parameter of D IO ，B IO ，C IO ，A IO Thereby calculating [ A ] IN ]And [ A ] OUT ]The expression of (2) is:
step 3: by the formulaCalculating to obtain scattering parameters S of two resistance devices to be tested 1 ]And [ S ] 2 ]。
According to the step of de-embedding based on the resistor unit cascade connection, the real part and the imaginary part of S11 and S12 parameters on different frequency points are carried out on two resistor devices with 50 omega and 100 omega resistance after de-embedding in a frequency range of 0-66GHz, and curves are respectively shown in fig. 3 and 4; in contrast, the error between the real part and the imaginary part of the S11 and S12 parameters at different frequency points obtained by the open-circuit-through method and the standard transmission line equation method and the real part and the imaginary part of the S11 and S12 parameters at different frequency points obtained by the method are smaller. By means of the simple test structure, the embedded parasitic effect in the device test structure can be removed with high precision.
It should be noted that the above-mentioned embodiments are not intended to limit the scope of the present invention, and equivalent changes or substitutions made on the basis of the above-mentioned technical solutions fall within the scope of the present invention as defined in the claims.
Claims (5)
1. A method for de-embedding based on a cascade of resistive elements, the method comprising the steps of:
step 1: firstly, respectively acquiring test scattering parameters of two on-chip resistor device test structures with different resistance values;
step 2: then, dividing the resistors in the two resistor device test structures into a plurality of adjacent and same resistor units, wherein the resistor units of one resistor device are more than the resistor units of the other resistor device by 1 or more, using the test scattering parameters of the two resistor device test structures, and obtaining the scattering parameters of the bonding pads, the interconnection lines and the through holes through algorithm calculation;
step 3: and finally, removing the scattering parameters of the pad, the interconnection line and the through hole from the test scattering parameters of the resistor device test structure to obtain the scattering parameters of the resistor device to be tested.
2. The method of claim 1, wherein in step 2, the resistors in the two resistor device test structures with different resistance values are divided into several adjacent and identical resistor units, and the ABCD matrix parameters of the resistors are multiplied by the ABCD matrix parameters of the divided several adjacent resistor units.
3. The method of claim 2, wherein in step 2, parameters of ABCD matrix of resistances in two resistance device test structures with different resistance values are respectively denoted as [ a ] 1 ]And [ A ] 2 ]The method comprises the steps of carrying out a first treatment on the surface of the Dividing the resistor in the first resistor device test structure into N resistor units, and marking the ABCD matrix divided into N resistor units as [ A ] 1,k ]K=1, 2,3, … N; dividing the resistor in the second resistor device test structure into N+1 resistor units, and marking the ABCD matrix divided into N+1 resistor units as [ A ] 2,m ]M=1, 2,3, … n+1; the ABCD matrix parameter expressions of the resistors in the first and second resistor device test structures are respectively
[A 1 ]＝[A 1,1 ][A 1,2 ][A 1,3 ]…[A 1,N ]
[A 2 ]＝[A 2,1 ][A 2,2 ][A 2,3 ]…[A 2,(N+1) ]。
4. A method of de-embedding based on a cascade of resistive elements according to claim 3, characterized in that said steps are in particular as follows:
step 1: measuring test scattering parameters of first and second resistive device test structures, respectivelyAnd->And transforms it into ABCD matrix parameters +.>And->
Step 2: dividing the resistors in the first and second resistor device test structures into N and N+1 adjacent and identical resistor units, wherein the resistance value of each resistor unit is R, and the ABCD matrix parameter of the resistor unit is recorded as [ A ]; the ABCD matrix parameter expressions of the resistors in the first and second resistor device test structures are respectively
The ABCD matrix parameter expressions of the first and second resistor device test structures are respectively
Wherein [ A ] IN ]Representing ABCD matrix of two resistor device test structures after cascade connection of input bonding pad, input interconnection line and input through hole, [ A ] OUT ]Representing ABCD matrix after cascade connection of output through hole, output interconnection line and output pad in two resistance device test structures;
using relationshipsAnd->Calculated to obtain [ A ] IN ]，[A OUT ]；
Step 3: by the formulaCalculating to obtain scattering parameters S of two resistance devices to be tested 1 ]And [ S ] 2 ]。
5. The method for resistor-cell cascade-based de-embedding according to claim 3 or 4, characterized in that the steps are as follows:
step 1: measuring test scattering parameters of first and second resistive device test structures, respectivelyAnd->And transforms it into ABCD matrix parameters +.>And->
Step 2: dividing the resistances in the first and second resistance device test structures into 1 and 2 adjacent and same resistance units, wherein the resistance value of each resistance unit is R, and the ABCD matrix parameter of the resistance unit is [ A ]; the ABCD matrix parameter expressions of the resistors in the first and second resistor device test structures are respectively
[A 1 ]＝[A]
[A 2 ]＝[A][A]＝[A] 2
The ABCD matrix parameter expressions of the first and second resistor device test structures are respectively
Wherein [ A ] IN ]Representing ABCD matrix of two resistor device test structures after cascade connection of input bonding pad, input interconnection line and input through hole, [ A ] OUT ]Representing ABCD matrix after cascade connection of output through hole, output interconnection line and output pad in two resistance device test structures;
using relationshipsAnd->Calculated to obtain [ A ] IN ]，[A OUT ]；
Step 3: by the formulaCalculating to obtain scattering parameters S of two resistance devices to be tested 1 ]And [ S ] 2 ]。
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