CN112600393B - Load correlation control circuit and method - Google Patents
Load correlation control circuit and method Download PDFInfo
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- CN112600393B CN112600393B CN202011309690.0A CN202011309690A CN112600393B CN 112600393 B CN112600393 B CN 112600393B CN 202011309690 A CN202011309690 A CN 202011309690A CN 112600393 B CN112600393 B CN 112600393B
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- 238000000034 method Methods 0.000 title claims abstract description 10
- 238000005070 sampling Methods 0.000 claims abstract description 24
- 239000003990 capacitor Substances 0.000 claims description 19
- 238000005516 engineering process Methods 0.000 description 5
- 230000000087 stabilizing effect Effects 0.000 description 3
- 230000003321 amplification Effects 0.000 description 2
- 230000001419 dependent effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 238000007792 addition Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Control Of Voltage And Current In General (AREA)
- Dc-Dc Converters (AREA)
Abstract
The invention relates to a load correlation control circuit and a method, wherein the circuit comprises a current sampling circuit, a signal amplifying circuit, a current limiting circuit, a voltage limiting circuit, a control circuit and a power circuit. Providing a dummy load current for the main circuit voltage through a power circuit; sampling the dummy load current of the main circuit through a current sampling circuit, and converting a current signal into a corresponding voltage signal; amplifying the voltage signal generated by the current sampling circuit by a signal amplifying circuit to generate a voltage signal with larger amplitude; limiting the dummy load current through a current limiting circuit so as to prevent the dummy load current from being overlarge; the voltage limiting circuit is used for limiting the secondary circuit voltage so as to prevent the output voltage from being too high; the control circuit is used for controlling the dummy load current. The invention has breakthrough improvement on the intermodulation performance, the light load dynamic performance and the like of the switching power supply, and improves the output current range and the overall efficiency of the switching power supply.
Description
Technical Field
The invention relates to the field of load correlation control, in particular to a load correlation control circuit and method adopting a controllable dummy load current technology.
Background
The conventional load correlation control circuit generally adopts a fixed resistance method to provide a dummy load current for the main circuit voltage and control the load correlation of the main circuit voltage and the auxiliary circuit voltage of the switching power supply, and has the advantages of convenience in implementation and simple structure. However, when the current change of the main circuit voltage is large, the deviation of the auxiliary circuit voltage is large, so that the auxiliary circuit voltage stabilizing circuit has overlarge power consumption or can not stabilize voltage, and even the switching power supply is damaged. When the main road dummy load is too large, the problem of overlarge power consumption is also brought. It is apparent that such conventional load-dependent control circuits do not meet the wide range of current output requirements of switching power supplies. Therefore, a new type of load dependency control circuit needs to be studied.
Disclosure of Invention
Aiming at the technical problems in the prior art, the invention provides a load correlation control circuit and a method, which are reasonable in design, overcome the defects in the prior art, have good effects and can be widely applied to various AC/DC, DC/DC and other switching power supplies.
In order to achieve the purpose 1, the invention adopts the following technical scheme:
a load dependency control circuit includes a current sampling circuit, a signal amplifying circuit, a current limiting circuit, a voltage limiting circuit, a control circuit and a power circuit, wherein:
the current sampling circuit comprises a first resistor and a third capacitor;
The signal amplifying circuit comprises a second resistor, a third resistor, a fourth resistor and a first operational amplifier B;
a current limiting circuit including a first operational amplifier a, a tenth resistor, an eleventh resistor, and a second transistor;
A voltage limiting circuit including a second operational amplifier a, a twelfth resistor, a thirteenth resistor, a sixteenth resistor, a seventeenth resistor, and a third transistor;
The control circuit comprises a second operational amplifier B, a third capacitor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor and a ninth resistor;
The power circuit comprises a fourteenth resistor, a fifteenth resistor and a first MOS tube.
Preferably, in the current sampling circuit, one end of the first resistor and one end of the third capacitor form a common end and are connected to one end of the second resistor in the signal amplifying circuit, one end of the fifteenth resistor in the power circuit and the source electrode of the first MOS tube, and the other end of the first resistor and the other end of the third capacitor form a common ground;
Preferably, in the signal amplifying circuit, the other end of the second resistor is connected to the 5 pin of the first operational amplifier B; one end of the third resistor is connected to one end of a fifth resistor in the control circuit, the 3 rd pin of the first operational amplifier A and the 7 th pin of the first operational amplifier B in the current limiting circuit, and the other end of the third resistor is connected to one end of the fourth resistor and the 6 th pin of the first operational amplifier B; the other end of the fourth resistor is grounded;
Preferably, in the current limiting circuit, pin 2 of the first operational amplifier a is connected to the current limiting reference vr_ilim, pin 8 is connected to the voltage source Vcc, pin 4 is grounded, and pin 1 is connected to one end of the tenth resistor; the other end of the tenth resistor is connected to the base electrode of the second transistor; the collector of the second transistor is connected to one end of the eleventh resistor, and the emitter of the second transistor is grounded; the other end of the eleventh resistor is connected to one ends of the ninth resistor, the thirteenth resistor and the fourteenth resistor;
Preferably, in the voltage limiting circuit, a2 nd pin of the second operational amplifier a is connected to the secondary minimum voltage reference va_ unr _min, a 3 rd pin is connected to one end of the sixteenth resistor and one end of the seventeenth resistor, an 8 th pin is connected to the voltage source Vcc, a 4 th pin is grounded, and a 1 st pin is connected to one end of the twelfth resistor; the other end of the twelfth resistor is connected to the base electrode of the third transistor; the other end of the sixteenth resistor is connected to the front end of the secondary voltage, the other end of the seventeenth resistor is grounded, the collector of the third transistor is connected to one end of the thirteenth resistor, and the emitter of the third transistor is grounded;
Preferably, in the control circuit, a 6 th pin of the second operational amplifier B is connected to one ends of the fifth resistor and the sixth resistor, a5 th pin is connected to one ends of the seventh resistor and the eighth resistor, and a 7 th pin is connected to one end of the third capacitor, one end of the eighth resistor and the other end of the ninth resistor; the other end of the seventh resistor is connected to a feedback point Va_ unr _min of the secondary circuit voltage; the other ends of the sixth resistor and the third capacitor are grounded;
Preferably, in the power circuit, the gate of the first MOS transistor is connected to one end of the fourteenth resistor and the other end of the fifteenth resistor, and the drain of the first MOS transistor is connected to the main output end vo_master.
In order to achieve the purpose 2, the invention adopts the following technical scheme:
Firstly, providing a dummy load current for a main circuit voltage through a power circuit; sampling the dummy load current of the main circuit through a current sampling circuit, and converting the current signal into a corresponding voltage signal; amplifying the voltage signal generated by the current sampling circuit by a signal amplifying circuit to generate a voltage signal with larger amplitude; limiting the dummy load current through a current limiting circuit so as to prevent the dummy load current from being overlarge; the voltage limiting circuit is used for limiting the secondary circuit voltage so as to prevent the output voltage from being too high; and finally, comparing and controlling the secondary circuit voltage with the output voltage of the signal amplifying circuit through the control circuit to realize the control of the pseudo-load current.
Preferably, the output current range of the main circuit is as wide as 0-30A, and when the current of the main circuit is 0A, 15A and 30A respectively, the front-end voltage deviation of the auxiliary circuit is less than or equal to 1%.
The invention has the beneficial technical effects that:
1. the current limiting technology is adopted to limit the dummy load current of the main circuit voltage so as to avoid overlarge or imbalance of the dummy load current;
2. The voltage limiting technology is adopted to limit the secondary voltage so as to avoid overhigh or imbalance of the output voltage;
3. The controllable dummy load current technology is adopted, so that the intermodulation voltage performance of the main circuit voltage and the auxiliary circuit voltage of the switching power supply is improved, and the output dynamic performance of the switching power supply in light load is improved;
4. By adopting the controllable dummy load current technology, the minimum voltage difference of the secondary linear voltage stabilizing circuit can be controlled, and the overall efficiency of the switching power supply is improved.
Drawings
Fig. 1 is a construction diagram of a load dependency control circuit of the present invention;
FIG. 2 is a block diagram of a load dependency control circuit of the present invention;
Detailed Description
The following description of the embodiments of the invention will be given with reference to the accompanying drawings and examples:
As shown in fig. 1, a load-dependent control circuit structure of the present invention mainly includes a current sampling circuit, a signal amplifying circuit, a current limiting circuit, a voltage limiting circuit, a control circuit, a power circuit, and the like.
For the current sampling circuit, the current sampling circuit is constituted by a resistor R1 and a capacitor C3. One end of the resistor R1 and one end of the capacitor C3 form a common end and are connected to one end of the resistor R2 in the signal amplifying circuit, one end of the resistor R15 in the power circuit and the source electrode of the MOS tube V1, and the other end of the resistor R1 and the other end of the capacitor C3 form a common ground. By adopting the resistance-capacitance current sampling method, the impact of transient current on a sampling circuit can be effectively prevented.
For the signal amplifying circuit, the signal amplifying circuit is constituted by a resistor R2, a resistor R3, a resistor R4, and an operational amplifier N1B. The other end of the resistor R2 is connected to the 5 pin of the operational amplifier N1B; one end of the resistor R3 is connected to one end of the resistor R5 in the control circuit, the 3 rd pin of the operational amplifier N1A and the 7 th pin of the operational amplifier N1B in the current limiting circuit, and the other end of the resistor R3 is connected to one end of the resistor R4 and the 6 th pin of the operational amplifier N1B; the other end of the first resistor R4 is grounded. Wherein the resistor R3 and the resistor R4 determine the amplification factor of the signal amplifying circuit. As can be seen from fig. 2, since the input current of the operational amplifier is almost zero, it is negligible in the circuit of the present invention; therefore, the 5-pin voltage and the 6-pin voltage of N1A are equal, the voltage division of the 7-pin voltage on R4 is the 6-pin voltage, and the amplification factor of the amplifying circuit is (r3+r4)/R4. The signal amplifying function of the circuit can be realized by reasonably designing the resistance values of R3 and R4.
The current limiting circuit is composed of a resistor R10, a resistor R11, a transistor V2, and an operational amplifier N1A, and serves to limit the dummy load current of the main voltage. Wherein, the 2 pin of the operational amplifier N1A is connected to the current limiting reference Vr_Ilim, the 8 th pin is connected to the voltage source Vcc, the 4 th pin is grounded, the 1 st pin is connected to one end of the resistor R10; the other end of the resistor R10 is connected to the base of the transistor V2; the collector of the transistor V2 is connected to one end of the resistor R11, and the emitter of the transistor V2 is grounded; the other end of the resistor R11 is connected to one ends of the resistor R9, the resistor R13, and the resistor R14;
The voltage limiting circuit is composed of a resistor R12, a resistor R13, a resistor R16, a resistor R17, a transistor V3, and an operational amplifier N2A, and serves to limit the sub-line voltage. The 2 nd pin of the operational amplifier N2A is connected to the secondary path minimum voltage reference Va_ unr _min, the 3 rd pin is connected to one end of the resistor R16 and one end of the resistor R17, the 8 th pin is connected to the voltage source Vcc, the 4 th pin is grounded, and the 1 st pin is connected to one end of the resistor R12; the other end of the resistor R12 is connected to the base of the transistor V3; the other end of the resistor R16 is connected to the secondary voltage front end, the other end of the resistor R17 is grounded, the collector of the transistor V3 is connected to one end of the resistor R13, and the emitter of the transistor V3 is grounded.
For the control circuit, the control circuit is constituted by resistors R5 to R9, a capacitor C3, and an operational amplifier N2B. Wherein, the 6 th pin of the operational amplifier N2B is connected to one end of the resistor R5 and the resistor R6, the 5 th pin is connected to one end of the resistor R7 and the resistor R8, and the 7 th pin is connected to one end of the capacitor C3, one end of the resistor R8 and the other end of the resistor R9; the other end of the resistor R7 is connected to a feedback point Va_ unr _min of the secondary voltage; the other ends of the resistor R6 and the capacitor C3 are grounded. The controllable function of the dummy load current of the main power supply is realized through the operation control of the minimum voltage at the front end of the auxiliary voltage and the dummy load current signal of the main voltage. The resistors R5 and R6 and the resistors R7 and R8 are symmetrically designed, so that the operation of the control circuit is concise, and the design of the control circuit is facilitated. Capacitor C3 acts as an integrator to filter out ac noise therein.
For the power circuit, the power circuit is composed of a resistor R14, a resistor R15, and a MOS transistor V1. The grid electrode of the MOS tube V1 is connected to one end of the resistor R14 and the other end of the resistor R15, and the drain electrode of the MOS tube V1 is connected to the main output end vo_master. The MOS tube V1 adopts a power MOS tube to provide the dummy load current required by the main circuit voltage.
A load dependency control method adopts a load dependency control circuit as shown in the above, as shown in figure 2, firstly, a dummy load current is provided for a main circuit voltage through a power circuit; sampling the dummy load current of the main circuit through a current sampling circuit, and converting the current signal into a corresponding voltage signal; amplifying the voltage signal generated by the current sampling circuit by a signal amplifying circuit to generate a voltage signal with larger amplitude; limiting the dummy load current through a current limiting circuit so as to prevent the dummy load current from being overlarge; the voltage limiting circuit is used for limiting the secondary circuit voltage so as to prevent the output voltage from being too high; and finally, comparing and controlling the secondary circuit voltage with the output voltage of the signal amplifying circuit through the control circuit to realize the control of the pseudo-load current.
The main circuit output current range of the load correlation control circuit designed based on the invention is as wide as 0-30A. When the current of the main circuit is 0A, 15A and 30A respectively, the front-end voltage deviation of the auxiliary circuit is less than or equal to 1%, and the problem of auxiliary circuit voltage stabilization under the condition that the main circuit of the multi-circuit switching power supply is empty is effectively solved. The minimum voltage difference of the secondary linear voltage stabilizing circuit of the secondary circuit is controllable, so that the overall efficiency of the switching power supply is greatly improved.
In summary, the invention has breakthrough improvement on the intermodulation performance, the light load dynamic performance and the like of the switching power supply, and improves the output current range and the overall efficiency of the switching power supply.
It should be understood that the above description is not intended to limit the invention to the particular embodiments disclosed, but to limit the invention to the particular embodiments disclosed, and that the invention is not limited to the particular embodiments disclosed, but is intended to cover modifications, adaptations, additions and alternatives falling within the spirit and scope of the invention.
Claims (3)
1. A load dependency control circuit includes a current sampling circuit, a signal amplifying circuit, a current limiting circuit, a voltage limiting circuit, a control circuit and a power circuit, wherein:
the current sampling circuit comprises a first resistor and a third capacitor;
The signal amplifying circuit comprises a second resistor, a third resistor, a fourth resistor and a first operational amplifier B;
a current limiting circuit including a first operational amplifier a, a tenth resistor, an eleventh resistor, and a second transistor;
A voltage limiting circuit including a second operational amplifier a, a twelfth resistor, a thirteenth resistor, a sixteenth resistor, a seventeenth resistor, and a third transistor;
The control circuit comprises a second operational amplifier B, a third capacitor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor and a ninth resistor;
The power circuit comprises a fourteenth resistor, a fifteenth resistor and a first MOS tube;
The current sampling circuit is characterized in that one end of a first resistor and one end of a third capacitor form a common end and are connected to one end of a second resistor in the signal amplifying circuit, one end of a fifteenth resistor in the power circuit and a source electrode of a first MOS tube, and the other end of the first resistor and the other end of the third capacitor form a common ground;
In the signal amplifying circuit, the other end of the second resistor is connected to the 5 pin of the first operational amplifier B; one end of the third resistor is connected to one end of a fifth resistor in the control circuit, the 7 th pin of the first operational amplifier B and the 3 rd pin of the first operational amplifier A in the current limiting circuit, and the other end of the third resistor is connected to one end of the fourth resistor and the 6 th pin of the first operational amplifier B; the other end of the fourth resistor is grounded;
In the current limiting circuit, a 2 pin of a first operational amplifier A is connected to a current limiting reference Vr_Ilim, an 8 th pin is connected to a voltage source Vcc, a4 th pin is grounded, and a1 st pin is connected to one end of a tenth resistor; the other end of the tenth resistor is connected to the base electrode of the second transistor; the collector of the second transistor is connected to one end of the eleventh resistor, and the emitter of the second transistor is grounded; the other end of the eleventh resistor is connected to one ends of the ninth resistor, the thirteenth resistor and the fourteenth resistor;
In the voltage limiting circuit, a2 nd pin of the second operational amplifier A is connected to a secondary path minimum voltage reference Va_ unr _min, a 3 rd pin is connected to one end of a sixteenth resistor and one end of a seventeenth resistor, an 8 th pin is connected to a voltage source Vcc, a 4 th pin is grounded, and a1 st pin is connected to one end of a twelfth resistor; the other end of the twelfth resistor is connected to the base electrode of the third transistor; the other end of the sixteenth resistor is connected to the front end of the secondary voltage, the other end of the seventeenth resistor is grounded, the collector of the third transistor is connected to one end of the thirteenth resistor, and the emitter of the third transistor is grounded;
In the control circuit, a 6 th pin of the second operational amplifier B is connected to one ends of a fifth resistor and a sixth resistor, a 5 th pin is connected to one ends of a seventh resistor and an eighth resistor, and a 7 th pin is connected to one end of a third capacitor, one end of the eighth resistor and the other end of the ninth resistor; the other end of the seventh resistor is connected to the secondary path minimum voltage reference Va_ unr _min; the other ends of the sixth resistor and the third capacitor are grounded;
in the power circuit, a grid electrode of a first MOS tube is connected to one end of a fourteenth resistor and the other end of a fifteenth resistor, and a drain electrode of the first MOS tube is connected to a main output end vo_master.
2. A load dependency control method, characterized in that a load dependency control circuit according to claim 1 is used, which provides a dummy load current for a main circuit voltage via a power circuit; sampling the dummy load current of the main circuit through a current sampling circuit, and converting the current signal into a corresponding voltage signal; amplifying the voltage signal generated by the current sampling circuit by a signal amplifying circuit to generate a voltage signal with larger amplitude; limiting the dummy load current through a current limiting circuit so as to prevent the dummy load current from being overlarge; the voltage limiting circuit is used for limiting the secondary circuit voltage so as to prevent the output voltage from being too high; and finally, comparing and controlling the secondary circuit voltage with the output voltage of the signal amplifying circuit through the control circuit to realize the control of the pseudo-load current.
3. The method of claim 2, wherein the main output current ranges from 0 to 30A, and the front-end voltage deviation of the sub-path is less than or equal to 1% when the main current is 0A, 15A, 30A, respectively.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202011309690.0A CN112600393B (en) | 2020-11-20 | 2020-11-20 | Load correlation control circuit and method |
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| CN202011309690.0A CN112600393B (en) | 2020-11-20 | 2020-11-20 | Load correlation control circuit and method |
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| CN112600393A CN112600393A (en) | 2021-04-02 |
| CN112600393B true CN112600393B (en) | 2024-04-19 |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113489317B (en) * | 2021-05-26 | 2023-06-09 | 中国电子科技集团公司第四十一研究所 | Program-controlled output power control circuit |
| CN114978130B (en) * | 2022-05-05 | 2024-10-29 | 北京市科通电子继电器总厂有限公司 | Operational amplifier constant current driving circuit based on solid-state power controller |
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