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CN112596569A - Circuit and method for calibrating internal resistance of photoelectric integrated chip - Google Patents

Circuit and method for calibrating internal resistance of photoelectric integrated chip Download PDF

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CN112596569A
CN112596569A CN202011495813.4A CN202011495813A CN112596569A CN 112596569 A CN112596569 A CN 112596569A CN 202011495813 A CN202011495813 A CN 202011495813A CN 112596569 A CN112596569 A CN 112596569A
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integrated chip
switch
optoelectronic integrated
internal resistance
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CN112596569B (en
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甄治凯
郑家骏
唐小丽
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Suzhou Zhuoyu Photon Technology Co ltd
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Jiangsu Keda Hengxin Semiconductor Technology Co ltd
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    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
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Abstract

本发明公开一种光电集成芯片内部电阻校准电路及校准方法，包括外置电阻、第一内置支路和第二内置支路；第一内置支路和第二内置支路均设置在光电集成芯片的内部，第一内置支路和第二内置支路并联，且两者并联后的整体一端连接电源端，另一端连接第三开关；第三开关设置在光电集成芯片的内部，且连接光电集成芯片的接收信号强度指示引脚；第一内置支路包括串联的第一电阻和第一开关，第二内置支路包括串联的第二电阻和第二开关；外置电阻设置在光电集成芯片的外部，其一端连接光电集成芯片的接收信号强度指示引脚，另一端接地。本发明的光电集成芯片内部电阻校准电路电路结构简单，易于实现并批量生产，不会增加芯片面积和成本。

Figure 202011495813

The invention discloses an internal resistance calibration circuit of an optoelectronic integrated chip and a calibration method, comprising an external resistor, a first built-in branch and a second built-in branch; the first built-in branch and the second built-in branch are both arranged on the optoelectronic integrated chip Inside, the first built-in branch and the second built-in branch are connected in parallel, and one end of the whole connected in parallel is connected to the power supply terminal, and the other end is connected to the third switch; the third switch is arranged inside the optoelectronic integrated chip and is connected to the optoelectronic integrated circuit. The received signal strength indication pin of the chip; the first built-in branch includes a first resistor and a first switch connected in series, and the second built-in branch includes a second resistor and a second switch connected in series; the external resistor is arranged on the photoelectric integrated chip. Externally, one end is connected to the received signal strength indicating pin of the optoelectronic integrated chip, and the other end is grounded. The internal resistance calibration circuit of the optoelectronic integrated chip of the invention has a simple circuit structure, is easy to realize and mass-produced, and does not increase the chip area and cost.

Figure 202011495813

Description

Circuit and method for calibrating internal resistance of photoelectric integrated chip
Technical Field
The invention relates to the technical field of photoelectric integrated chips, in particular to a circuit and a method for calibrating internal resistance of a photoelectric integrated chip.
Background
In a photoelectric integrated chip, an accurate reference current is often needed to provide a reference current for other circuit modules in the photoelectric integrated chip, and a resistor serving as a basic device generated by the reference current deviates by more than 20% with the process and the temperature, so that the generated reference current is inaccurate, and how to obtain the resistor with higher accuracy through a calibration means becomes very important.
The traditional method for calibrating the resistor is to output reference current to the outside through a PIN (PIN), measure the current by using external equipment, compare the current with an ideal current value to calculate a value to be compensated, and control the coding value of an internal resistor network according to the value. To avoid repeated calibration of the chip each time it is powered down, the code values need to be stored in internal memory locations on the chip, such as electrical fuses (eFuses). Not only does this approach require additional PINs and devices to test the current, but placing the eFuse network increases the chip area, thereby increasing cost.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a circuit and a method for calibrating the internal resistance of a photoelectric integrated chip, wherein a Received Signal Strength Indication (RSSI) pin on the photoelectric integrated chip is multiplexed, an analog-to-digital converter (ADC) on the same module as the photoelectric integrated chip is used for collecting the voltage drop of an external resistor, a process influence factor alpha (m) of the internal resistance of the photoelectric integrated chip, which is influenced by the process, is determined by an algorithm, and the internal resistance of the photoelectric integrated chip is calibrated according to the process influence factor alpha (m).
In order to solve the above technical problem, the present invention provides a calibration circuit for an internal resistance of a optoelectronic integrated chip, which includes an external resistance, a first internal branch and a second internal branch;
the first built-in branch and the second built-in branch are both arranged inside the photoelectric integrated chip and are connected in parallel, one end of the whole body formed by connecting the first built-in branch and the second built-in branch in parallel is connected with a power supply end, and the other end of the whole body is connected with a third switch; the third switch is arranged inside the optoelectronic integrated chip and is connected with a received signal strength indication pin (RSSI) of the optoelectronic integrated chip;
the first built-in branch comprises a first resistor and a first switch which are connected in series, and the second built-in branch comprises a second resistor and a second switch which are connected in series; the first resistor and the second resistor are the same type of resistor as the resistor needing to be calibrated in the photoelectric integrated chip;
the external resistor is arranged outside the photoelectric integrated chip, one end of the external resistor is connected with the received signal strength indicating pin of the photoelectric integrated chip, and the other end of the external resistor is grounded.
In a preferred embodiment of the present invention, the optoelectronic integrated chip internal resistance calibration circuit is configured to obtain a process influence factor α (m) of the optoelectronic integrated chip internal resistance affected by a process, and calibrate the optoelectronic integrated chip internal resistance according to the process influence factor α (m).
In a preferred embodiment of the present invention, the first switch, the second switch, and the third switch support a programmable mode control to be turned on or off, and the first switch, the second switch, and the third switch are independently turned on or off.
In a preferred embodiment of the present invention, the first switch, the second switch and the third switch have the same size, and the on-resistance R of the first switch, the second switch and the third switch is the same as each otheronTurn-off resistance RoffRespectively satisfy Ron＜50Ω，Roff＞500MΩ。
In a preferred embodiment of the present invention, an ADC module is integrated inside an MCU chip on the same module as the optoelectronic ic, the resistance calibration circuit further includes a voltage acquisition lead disposed outside the optoelectronic ic, the voltage acquisition lead is connected to the ADC module and a received signal strength indication pin (RSSI), and the voltage of the external resistor is acquired through the ADC module.
In a preferred embodiment of the present invention, a storage unit is disposed inside the MCU chip on the same module as the optoelectronic integrated chip, and the process impact factor α (m) for resistance calibration obtained by the resistance calibration circuit is stored in the storage unit.
Based on the same inventive concept, the invention also provides a calibration method of the internal resistance of the optoelectronic integrated chip, which uses the calibration circuit of the internal resistance of the optoelectronic integrated chip, and comprises the following steps,
opening the third switch;
turning off the first switch, turning on the second switch, and obtaining the voltage V loaded on the external resistor01；
Opening the first switch, turning off the second switch, and obtaining the voltage V loaded on the external resistor10；
According to voltage V01And voltage V10And determining the process influence factor alpha (m).
In a preferred embodiment of the present invention, the determining the process influence factor α (m) further comprises determining an actual resistance R of an internal resistance of the optoelectronic integrated chipxThe determination method comprises the steps of,
Figure BDA0002842117450000031
Vddcharacterizing a voltage of the power supply terminal; rextAnd representing the resistance value of the external resistor.
In a preferred embodiment of the present invention, further comprising, determining the process impact factor α (m) further comprises,
Figure BDA0002842117450000032
Rtyp(T0) Characterised by the temperature T0Typical values of the following, which are not affected by the process, are determined from a process model.
In a preferred embodiment of the present invention, the method further includes storing the determined process impact factor α (m) in a storage unit inside an MCU chip on the same module as the optoelectronic integrated chip.
The invention has the beneficial effects that:
the circuit and the method for calibrating the internal resistance of the optoelectronic integrated chip multiplex the RSSI of the received signal strength indication pin on the optoelectronic integrated chip, simultaneously utilize the ADC on the same module as the optoelectronic integrated chip to acquire the voltage drop of the external resistor, then determine the process influence factor alpha (m) of the internal resistance of the optoelectronic integrated chip influenced by the process through an algorithm, and calibrate the internal resistance of the optoelectronic integrated chip according to the process influence factor alpha (m).
Drawings
FIG. 1 is a schematic circuit diagram of a resistor to be calibrated and a reference current;
FIG. 2 is a schematic circuit diagram of an internal resistance calibration circuit of the optoelectronic integrated chip according to a preferred embodiment of the present invention;
FIG. 3 is a flowchart illustrating a method for calibrating an internal resistance of an optoelectronic integrated chip according to a first embodiment of the present invention;
fig. 4 is a flowchart of a method for calibrating an internal resistance of an optoelectronic integrated chip according to a second embodiment of the present invention.
Detailed Description
The present invention is further described below in conjunction with the following figures and specific examples so that those skilled in the art may better understand the present invention and practice it, but the examples are not intended to limit the present invention.
Examples
Referring to the schematic diagram of the circuit of the resistor to be calibrated and the reference current I in the optoelectronic integrated chip shown in FIG. 1refIs obtained by dividing the internal reference voltage VBG by the resistance R to be calibratedtuneThe actual resistance value of the resistor to be calibrated has a deviation due to the influence of the process, and in order to obtain a reference current with a certain precision, the resistor inside the optoelectronic integrated chip needs to be calibrated to compensate the deviation of the reference current caused by the influence of the process on the resistor.
Referring to fig. 2, an embodiment of the invention discloses a calibration circuit for an internal resistance of a photonic integrated chip, which includes an external resistor RextThe first stepA built-in branch and a second built-in branch. The external resistor RextThe photoelectric integrated chip is arranged outside the photoelectric integrated chip, and the first built-in branch and the second built-in branch are both arranged inside the photoelectric integrated chip. The external resistor RextOne end of the second connecting terminal is connected with a received signal strength indication pin RSSI of the photoelectric integrated chip, and the other end is grounded. The first built-in branch and the second built-in branch are connected in parallel, one end of the whole body after the first built-in branch and the second built-in branch are connected in parallel is connected with a power supply end Vdd, and the other end of the whole body is connected with a third switch SW 3; the third switch SW3 is disposed inside the optoelectronic integrated chip and connected to the RSSI of the RSSI. The first built-in branch comprises a first resistor R1 and a first switch SW1 which are connected in series, and the second built-in branch comprises a second resistor R2 and a second switch SW2 which are connected in series; the first resistor R1 and the second resistor R2 are the same type of resistors to be calibrated in the optoelectronic integrated chip. It should be noted that the same type of resistors herein are the same type of resistors provided by the process plant, such as poly resistors, metal resistors, diffusion resistors, etc., that is, when a poly resistor is used inside the optoelectronic integrated chip, the first resistor R1 and the second resistor R2 both use poly resistors; or, when the metal resistor is used inside the optoelectronic integrated chip, the metal resistor is used for both the first resistor R1 and the second resistor R2. The process influence factors alpha (m) of the same type of resistance influenced by the process are basically the same. The resistances of the first resistor R1 and the second resistor R2 can be adjusted according to actual needs, wherein, for convenience of calculation, the resistance of the first resistor R1 in the technical solution of the embodiment is RxThe second resistor R2 has a resistance of 2Rx。
The internal resistance calibration circuit of the photoelectric integrated chip is used for acquiring a process influence factor alpha (m) of the first resistor R1 and the second resistor R2 influenced by a process, further acquiring the process influence factor alpha (m) of the resistance to be calibrated of the photoelectric integrated chip influenced by the process, and calibrating the resistance to be calibrated of the photoelectric integrated chip according to the process influence factor alpha (m). The first switch SW1, the second switch SW2 and the third switch SW3 support the programmable mode control to be turned on or off, and the first switch SW1, the second switch SW2 and the third switch SW3 are independent respectivelyOn or off. In the technical solution of this embodiment, the first switch SW1, the second switch SW2 and the third switch SW3 have the same size, and the on-resistance values R of the first switch SW1, the second switch SW2 and the third switch SW3 are the sameonTurn-off resistance RoffRespectively satisfy Ron＜50Ω，Roff> 500M omega. The working states of the switches are shown in the following table:
TABLE 1 switch combination working state table
Figure BDA0002842117450000061
RintRepresenting the equivalent resistance seen from the RSSI pin to the inside of the photoelectric integrated chip; rtraceAll other link resistances are characterized, including the on resistance of the third switch SW3, the resistance at the junction of the power source terminal VDD to the first switches SW1, SW2, and the resistance at the third switch SW3 to the RSSI pin. The wire resistance near the switch is incorporated into the equivalent resistance of the switch.
According to the resistance voltage-dividing criterion, RintAnd an external resistor RextThe following relationship is satisfied:
Figure BDA0002842117450000062
each R in Table 1intSubstituting into the above relationship, obtain:
Figure BDA0002842117450000063
Figure BDA0002842117450000064
wherein, V01The voltage value loaded on the external resistor is represented when the first switch SW1 is turned off and the second switch SW2 is turned on; v10The voltage value loaded on the external resistor is represented when the first switch SW1 is turned on and the second switch SW2 is turned off.
Determining according to the formulas (1) and (2):
Figure BDA0002842117450000071
when the process influencing factor alpha (m) is introduced,
R(m，T0)＝α(m)·Rtyp(T0) (3)；
wherein, R (m, T)0) Characterised by the temperature T0The actual value of the lower resistance; rtyp(T0) Characterised by the temperature T0Typical values of the lower resistance, i.e. determined values that are not affected by the process, are uniquely determined according to a process model.
Determining according to the formula (3) and the formula 1:
Figure BDA0002842117450000072
based on this, the calibration circuit of the present invention can determine the process influence factor α (m) of the first resistor R1 and the second resistor R2 affected by the process, further obtain the process influence factor α (m) of the resistance to be calibrated of the optoelectronic integrated chip affected by the process, and calibrate the resistance to be calibrated of the optoelectronic integrated chip according to the process influence factor α (m).
As a further improvement of the present invention, an ADC module is integrated inside an MCU chip of the same module as the optoelectronic integrated chip, and the resistance calibration circuit further includes a voltage acquisition lead disposed outside the optoelectronic integrated chip, where the voltage acquisition lead is connected to the ADC module and a received signal strength indication pin RSSI, and acquires the voltage of the external resistor through the ADC module. The ADC module of the MCU chip on the same module is used for measuring the voltage of the external resistor in the calibration process, and extra equipment is not needed for measuring.
And the MCU chip and the photoelectric integrated chip in the same module comprises a storage unit, and a process influence factor alpha (m) for resistance calibration obtained by the resistance calibration circuit is stored in the storage unit. The process influence factor alpha (m) (namely the calibration value) obtained in the calibration process is directly stored by using the storage unit in the MCU chip, no additional eFuse network is required to be arranged on the optoelectronic integrated chip, and the chip area and the cost cannot be increased.
Based on the same inventive concept, the embodiment of the invention also discloses a calibration method for the internal resistance of the optoelectronic integrated chip, which uses the calibration circuit for the internal resistance of the optoelectronic integrated chip of the above embodiment, and comprises the following steps,
opening the third switch SW 3;
turning off the first switch SW1, turning on the second switch SW2, and obtaining the voltage V loaded on the external resistor through the ADC module01；
The first switch SW1 is turned on, the second switch SW2 is turned off, and the voltage V loaded on the external resistor is obtained through the ADC module10；
According to voltage V01And voltage V10And determining the process influence factor alpha (m).
Wherein, the step of determining the process influence factor alpha (m) further comprises the step of determining the actual resistance R of the internal resistance of the optoelectronic integrated chipxThe determination method comprises the steps of,
Figure BDA0002842117450000081
Vddcharacterizing a voltage of the power supply terminal; rextAnd representing the resistance value of the external resistor.
And, determining the process impact factor α (m) further comprises,
Figure BDA0002842117450000082
Rtyp(T0) Characterised by the temperature T0Typical values of the following, which are not affected by the process, are determined from a process model.
The process influence factor alpha (m) of the internal resistor of each new photoelectric integrated chip is unique, the process influence factor alpha (m) determined according to the steps is stored in a storage unit of the MCU chip in the same module with the photoelectric integrated chip, the stored process influence factor cannot be lost due to power failure of a power supply, and repeated calibration caused by power failure of the chip every time is avoided.
The above-mentioned embodiments are merely preferred embodiments for fully illustrating the present invention, and the scope of the present invention is not limited thereto. The equivalent substitution or change made by the technical personnel in the technical field on the basis of the invention is all within the protection scope of the invention. The protection scope of the invention is subject to the claims.

Claims (10)

1.一种光电集成芯片内部电阻校准电路，其特征在于：包括外置电阻、第一内置支路和第二内置支路；1. a photoelectric integrated chip internal resistance calibration circuit, is characterized in that: comprise external resistance, the first built-in branch and the second built-in branch; 所述第一内置支路和第二内置支路均设置在所述光电集成芯片的内部，所述第一内置支路和第二内置支路并联，且两者并联后的整体一端连接电源端，另一端连接第三开关；所述第三开关设置在所述光电集成芯片的内部，且连接所述光电集成芯片的接收信号强度指示引脚(RSSI)；The first built-in branch and the second built-in branch are both arranged inside the optoelectronic integrated chip, the first built-in branch and the second built-in branch are connected in parallel, and one end of the parallel connection is connected to the power supply terminal , the other end is connected to a third switch; the third switch is arranged inside the optoelectronic integrated chip, and is connected to the received signal strength indication pin (RSSI) of the optoelectronic integrated chip; 所述第一内置支路包括串联的第一电阻和第一开关，所述第二内置支路包括串联的第二电阻和第二开关；所述第一电阻、第二电阻均与所述光电集成芯片内部需要校准的电阻为同类型电阻；The first built-in branch includes a first resistor and a first switch connected in series, and the second built-in branch includes a second resistor and a second switch connected in series; the first resistor and the second resistor are both connected to the photoelectric The resistors that need to be calibrated inside the integrated chip are the same type of resistors; 所述外置电阻设置在光电集成芯片的外部，其一端连接所述光电集成芯片的接收信号强度指示引脚，另一端接地。The external resistor is arranged outside the optoelectronic integrated chip, one end of which is connected to the received signal strength indicating pin of the optoelectronic integrated chip, and the other end is grounded. 2.如权利要求1所述的光电集成芯片内部电阻校准电路，其特征在于：该光电集成芯片内部电阻校准电路用于获取所述光电集成芯片内部电阻受工艺影响的工艺影响因子α(m)，并根据该工艺影响因子α(m)校准所述光电集成芯片的内部电阻。2 . The internal resistance calibration circuit of an optoelectronic integrated chip according to claim 1 , wherein the internal resistance calibration circuit of the optoelectronic integrated chip is used to obtain a process influence factor α (m) of the internal resistance of the optoelectronic integrated chip affected by the process. 3 . , and calibrate the internal resistance of the optoelectronic integrated chip according to the process influencing factor α(m). 3.如权利要求1所述的光电集成芯片内部电阻校准电路，其特征在于：所述第一开关、第二开关、第三开关支持程控模式控制导通或者关断，且所述第一开关、第二开关、第三开关各自独立导通或者关断。3 . The internal resistance calibration circuit of an optoelectronic integrated chip according to claim 1 , wherein the first switch, the second switch and the third switch support program-controlled mode control to be turned on or off, and the first switch , the second switch, and the third switch are independently turned on or off. 4.如权利要求1或3所述的光电集成芯片内部电阻校准电路，其特征在于：所述第一开关、第二开关、第三开关的尺寸相同，且三者的导通阻值Ron、关断阻值Roff均分别满足Ron＜50Ω，Roff＞500MΩ。4. The internal resistance calibration circuit of an optoelectronic integrated chip according to claim 1 or 3, wherein the first switch, the second switch and the third switch have the same size, and the on-resistance values of the three are R on , and the turn-off resistance value R off satisfies R on <50Ω and R off >500MΩ respectively. 5.如权利要求1所述的光电集成芯片内部电阻校准电路，其特征在于：与所述光电集成芯片在同一模组上的MCU芯片的内部集成有ADC模块，所述电阻校准电路还包括设置在所述光电集成芯片外部的电压采集引线，所述电压采集引线连接所述ADC模块和接收信号强度指示引脚(RSSI)，通过所述ADC模块采集所述外置电阻的电压。5. The internal resistance calibration circuit of an optoelectronic integrated chip according to claim 1, wherein an ADC module is integrated in the MCU chip on the same module as the optoelectronic integrated chip, and the resistance calibration circuit further comprises a set of A voltage acquisition lead outside the optoelectronic integrated chip, the voltage acquisition lead is connected to the ADC module and a received signal strength indication pin (RSSI), and the voltage of the external resistor is acquired through the ADC module. 6.如权利要求1所述的光电集成芯片内部电阻校准电路，其特征在于：与所述光电集成芯片在同一模组上的MCU芯片的内部设有存储单元，通过所述电阻校准电路获得的用于电阻校准的工艺影响因子α(m)存储在所述存储单元内。6. The internal resistance calibration circuit of an optoelectronic integrated chip according to claim 1, wherein the MCU chip on the same module as the optoelectronic integrated chip is provided with a storage unit, and the resistance calibration circuit obtained by the resistance calibration circuit is provided with a storage unit. A process impact factor α(m) for resistance calibration is stored in the memory cell. 7.一种光电集成芯片内部电阻校准方法，使用权利要求1～6任一项所述的光电集成芯片内部电阻校准电路，其特征在于：包括以下步骤，7. A method for calibrating the internal resistance of an optoelectronic integrated chip, using the internal resistance calibration circuit of the optoelectronic integrated chip according to any one of claims 1 to 6, wherein the method comprises the following steps: 打开第三开关；Turn on the third switch; 关断第一开关、打开第二开关，并获取加载在所述外置电阻上的电压V01；Turn off the first switch, turn on the second switch, and obtain the voltage V 01 loaded on the external resistor; 打开第一开关、关断第二开关，并获取加载在所述外置电阻上的电压V10；Turn on the first switch, turn off the second switch, and obtain the voltage V 10 loaded on the external resistor; 根据电压V01和电压V10确定出工艺影响因子α(m)。The process influence factor α(m) is determined according to the voltage V 01 and the voltage V 10 . 8.如权利要求7所述的光电集成芯片内部电阻校准方法，其特征在于：确定所述工艺影响因子α(m)还包括确定出所述光电集成芯片内部电阻的实际电阻Rx，其确定方法包括，8 . The method for calibrating the internal resistance of an optoelectronic integrated chip according to claim 7 , wherein determining the process influencing factor α(m) further comprises determining the actual resistance Rx of the internal resistance of the optoelectronic integrated chip, which determines the actual resistance Rx of the internal resistance of the optoelectronic integrated chip. Methods include,
Figure FDA0002842117440000021
Figure FDA0002842117440000021
 Vdd表征所述电源端的电压；Rext表征外置电阻的阻值。V dd represents the voltage of the power supply terminal; R ext represents the resistance value of the external resistor. 9.如权利要求8所述的光电集成芯片内部电阻校准方法，其特征在于：确定所述工艺影响因子α(m)还包括，9 . The method for calibrating the internal resistance of an optoelectronic integrated chip according to claim 8 , wherein: determining the process influence factor α(m) further comprises: 10 .
Figure FDA0002842117440000031
Figure FDA0002842117440000031
 Rtyp(T0)表征在温度T0下不受工艺影响的典型值，其根据工艺模型确定。R typ (T 0 ) characterizes a typical value at temperature T 0 that is not influenced by the process, which is determined from the process model. 10.如权利要求7所述的光电集成芯片内部电阻校准方法，其特征在于：还包括将确定出工艺影响因子α(m)存储至与所述光电集成芯片在同一模组上的MCU芯片内部的存储单元。10 . The method for calibrating the internal resistance of an optoelectronic integrated chip according to claim 7 , further comprising storing the determined process influencing factor α(m) in the MCU chip on the same module as the optoelectronic integrated chip. 11 . storage unit.
CN202011495813.4A 2020-12-17 2020-12-17 Photoelectric integrated chip internal resistance calibration circuit and method Active CN112596569B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116882301A (en) * 2023-09-04 2023-10-13 联和存储科技(江苏)有限公司 Resistance compensation method, device and equipment of memory chip and storage medium

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Publication number Priority date Publication date Assignee Title
JPH05288785A (en) * 1992-04-14 1993-11-02 Terushi Sakurai Circuit of digital resistance measuring equipment
CN104793057A (en) * 2015-04-28 2015-07-22 华东光电集成器件研究所 Bridge-arm resistance test system for acceleration sensors
CN108008191A (en) * 2017-11-06 2018-05-08 湖北三江航天万峰科技发展有限公司 A kind of precision aid of Minitype resistance
CN108226646A (en) * 2018-01-17 2018-06-29 纳思达股份有限公司 sensitive resistance measuring device and measuring method
CN111490751A (en) * 2020-04-22 2020-08-04 上海微阱电子科技有限公司 On-chip resistor self-calibration circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05288785A (en) * 1992-04-14 1993-11-02 Terushi Sakurai Circuit of digital resistance measuring equipment
CN104793057A (en) * 2015-04-28 2015-07-22 华东光电集成器件研究所 Bridge-arm resistance test system for acceleration sensors
CN108008191A (en) * 2017-11-06 2018-05-08 湖北三江航天万峰科技发展有限公司 A kind of precision aid of Minitype resistance
CN108226646A (en) * 2018-01-17 2018-06-29 纳思达股份有限公司 sensitive resistance measuring device and measuring method
CN111490751A (en) * 2020-04-22 2020-08-04 上海微阱电子科技有限公司 On-chip resistor self-calibration circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116882301A (en) * 2023-09-04 2023-10-13 联和存储科技(江苏)有限公司 Resistance compensation method, device and equipment of memory chip and storage medium
CN116882301B (en) * 2023-09-04 2023-11-17 联和存储科技(江苏)有限公司 Resistance compensation method, device and equipment of memory chip and storage medium

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