Disclosure of Invention
The embodiment of the invention provides a micro light-emitting diode chip and a display panel, which are used for solving the problem of poor display effect of the existing micro light-emitting diode.
In order to achieve the above object, the embodiments of the present invention provide the following technical solutions:
in one aspect, an embodiment of the present invention provides a micro light emitting diode chip, including a first type semiconductor layer, a light emitting layer, a second type semiconductor layer, a first type electrode layer, a second type electrode layer, and an insulating passivation layer,
the first type semiconductor layer, the light emitting layer and the second type semiconductor layer are sequentially stacked;
the first type electrode layer is positioned on the side wall of one side of the first type semiconductor layer and is in ohmic contact with the first type semiconductor layer;
the insulating passivation layer covers part of the side wall of the first type semiconductor layer, the side wall and the bottom surface of the first type electrode layer, the side wall of the light emitting layer, and the side wall and part of the bottom surface of the second type semiconductor layer;
the second-type electrode layer covers the insulating passivation layer, and part of the bottom surface of the second-type semiconductor layer, which is exposed out of the insulating passivation layer, is in ohmic contact with the second-type electrode layer.
As an improvement of the micro light emitting diode chip in the embodiment of the invention, a plane perpendicular to the light emitting surface is taken as a cross section, and the cross sections of the first type semiconductor layer, the light emitting layer and the second type semiconductor layer are in an inverted trapezoid shape.
As an improvement of the micro light emitting diode chip according to the embodiment of the invention, the first type electrode layer and the second type electrode layer are metal electrode layers.
As an improvement of the micro light emitting diode chip according to the embodiment of the invention, the first type semiconductor layer, the light emitting layer, and the second type semiconductor layer are in the shape of a truncated cone or a truncated pyramid.
As an improvement of the micro light emitting diode chip according to the embodiment of the invention, the first type electrode layer horizontally extends to a side away from the first type semiconductor layer to form a first protruding portion; the second type electrode layer horizontally extends to the other side far away from the first type electrode layer to form a second extending part.
As an improvement of the micro light emitting diode chip according to the embodiment of the invention, a top surface of the first protruding portion is flush with a top surface of the second protruding portion in a vertical direction.
As an improvement of the micro light emitting diode chip according to the embodiment of the invention, a top surface of the first protruding portion is flush with a top surface of the first type semiconductor layer in a vertical direction.
As an improvement of the micro light emitting diode chip according to the embodiment of the invention, a top surface of the first protruding portion is higher than a top surface of the first type semiconductor layer in a vertical direction.
As an improvement of the micro light emitting diode chip according to the embodiment of the invention, the top surface of the first type semiconductor layer is provided with a rough surface.
Compared with the prior art, the micro light-emitting diode chip provided by the embodiment of the invention has the following advantages:
according to the micro light-emitting diode chip provided by the embodiment of the invention, the first type electrode layer covers the side wall of the first type semiconductor layer, and the second type electrode layer covers the insulating passivation layer, so that the first type electrode layer and the second type electrode layer jointly cover all the side walls of the micro light-emitting diode chip, the possibility of light emitting from the side walls is reduced or avoided, and the problem of optical crosstalk is further avoided; meanwhile, the first type electrode layer and the second type electrode layer do not shield the light-emitting surface, so that the display effect of the micro light-emitting diode chip is improved; furthermore, the first type electrode layer and the second type electrode layer have reflection performance, so that light rays emitted to the side wall can be reflected, and the possibility of light emitting from the side wall can be further reduced or avoided; in addition, the top surfaces of the first type electrode layer and the second type electrode layer are exposed in the same direction, so that the first type electrode layer and the second type electrode layer are conveniently aligned and connected with the driving substrate in batch transfer, and the problem of high transfer difficulty is solved.
On the other hand, the embodiment of the invention also provides a display panel, which comprises the micro light-emitting diode chip.
The display panel provided by the embodiment of the invention includes the micro light emitting diode chip, and therefore, the display panel also has the same advantages as those of the micro light emitting diode chip, and the description thereof is omitted.
In addition to the technical problems solved by the present invention, the technical features constituting the technical solutions, and the advantages brought by the technical features of the technical solutions described above, other technical problems that can be solved by the micro-light emitting diode chip and the display panel provided by the embodiments of the present invention, other technical features included in the technical solutions, and advantages brought by the technical features will be further described in detail in the detailed description.
Detailed Description
The existing micro light-emitting diode chip has the problems of high difficulty in batch transfer of light-emitting diodes and poor display effect caused by optical crosstalk.
In view of the above drawbacks, an embodiment of the present invention provides an improved technical solution, in which a micro light emitting diode chip includes a first type semiconductor layer, a light emitting layer, a second type semiconductor layer, a first type electrode layer, a second type electrode layer, and an insulating passivation layer, and the first type electrode layer covers a sidewall of the first type semiconductor layer, and the second type electrode layer covers the insulating passivation layer, so that the first type electrode layer and the second type electrode layer jointly cover all sidewalls of the micro light emitting diode chip, thereby reducing or avoiding a possibility of light emission from the sidewalls, and further avoiding a problem of optical crosstalk; meanwhile, the first type electrode layer and the second type electrode layer do not shield the light-emitting surface, so that the display effect of the micro light-emitting diode chip is improved; furthermore, the first type electrode layer and the second type electrode layer have reflection performance, so that light rays emitted to the side wall can be reflected, and the possibility of light emitting from the side wall can be further reduced or avoided; the top surfaces of the first type electrode layer and the second type electrode layer are exposed in the same direction, so that the first type electrode layer and the second type electrode layer are conveniently aligned and connected with the driving substrate in batch transfer, and the problem of high transfer difficulty is solved.
In order to make the aforementioned objects, features and advantages of the embodiments of the present invention more comprehensible, embodiments of the present invention are described in detail below with reference to the accompanying drawings. It is to be understood that the described embodiments are merely a few embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example one
Referring to fig. 1 to 3, a micro light emitting diode chip according to a first embodiment of the present invention includes a first type semiconductor layer 10, a light emitting layer 30, a second type semiconductor layer 20, a first type electrode layer 40, a second type electrode layer 50, and an insulating passivation layer 60, wherein the first type semiconductor layer 10, the light emitting layer 30, and the second type semiconductor layer 20 are sequentially stacked; the first-type electrode layer 40 is positioned on a sidewall of one side of the first-type semiconductor layer 10 and in ohmic contact with the first-type semiconductor layer 10; the insulating passivation layer 60 covers a portion of the sidewalls of the first-type semiconductor layer 10, the sidewalls and the bottom surface of the first-type electrode layer 40, the sidewalls of the light emitting layer 30, the sidewalls and a portion of the bottom surface of the second-type semiconductor layer 20; the second-type electrode layer 50 covers the insulating passivation layer 60, and a portion of the bottom surface of the second-type semiconductor layer 20, which exposes the insulating passivation layer 60, is in ohmic contact with the second-type electrode layer 50.
In this embodiment, as shown in fig. 1, the first type semiconductor layer 10, the light emitting layer 30, and the second type semiconductor layer 20 are stacked from top to bottom, and it should be noted that the top surface of the first type semiconductor layer 10 is a light emitting surface, specifically, the light emitting layer 30 is formed on the bottom surface of the first type semiconductor layer 10, and the second type semiconductor layer 20 is formed on the bottom surface of the light emitting layer 30. The first-type electrode layer 40 is formed on a sidewall of the first-type semiconductor layer 10, and the first-type electrode layer 40 forms an ohmic contact with the first-type semiconductor layer 10.
Further, step surfaces 11 may be disposed on the sidewalls of the first type semiconductor layer 10, as shown in fig. 3, when the first type electrode layer 40 is formed on the first type semiconductor layer 10, the step surfaces 11 are covered, so as to increase the coverage area and further improve the ohmic contact performance, and meanwhile, the step surfaces 11 are disposed to facilitate the formation of the second type electrode layer 50, thereby reducing the processing difficulty of the second type electrode layer 50.
On the basis of the above embodiment, as shown in fig. 1, the insulating passivation layer 60 covers the first type electrode layer 40, the first type semiconductor layer 10, the light emitting layer 30 and the second type semiconductor layer 20, and the second type electrode layer 50 is formed on the insulating passivation layer 60, the insulating passivation layer 60 in this embodiment has high transparency to visible light, and the insulating passivation layer 60 may be specifically configured as a transparent adhesive layer. Taking the orientation shown in fig. 1 as an example, the second-type electrode layer 50 is formed on the bottom surface and the sidewall of the insulating passivation layer 60, a portion of the bottom surface of the second-type semiconductor layer 20 exposes the insulating passivation layer 60, and the second-type electrode layer 50 is connected to the exposed portion to form an ohmic contact.
Specifically, the second-type electrode layer 50 may be provided with an extension in the horizontal direction for supporting the sidewall portions of the insulating passivation layer 60, the first-type electrode layer 40, the first-type semiconductor layer 10, the light emitting layer 30, and the second-type semiconductor layer 20 to reduce the difficulty of processing. Preferably, the sidewalls of the second-type electrode layer 50 may be perpendicular to the horizontal direction, and the sidewalls of the second-type electrode layer 50 are aligned with the outermost ends of the first-type electrode layers 40 in the horizontal direction.
In summary, in the micro light emitting diode chip provided in the first embodiment of the present invention, the first type electrode layer 40 covers the sidewall of the first type semiconductor layer 10, and the second type electrode layer 50 covers the insulating passivation layer 60, so that the first type electrode layer 40 and the second type electrode layer 50 cover all sidewalls of the micro light emitting diode chip together, thereby reducing or avoiding the possibility of light emitting from the sidewalls, and further avoiding the problem of optical crosstalk; meanwhile, the first type electrode layer 40 and the second type electrode layer 50 do not shield the light-emitting surface, so that the display effect of the micro light-emitting diode chip is improved; in the micro light emitting diode chip provided by the first embodiment, the top surfaces of the first type electrode layer 40 and the second type electrode layer 50 are exposed in the same direction, so that the first type electrode layer and the second type electrode layer are conveniently aligned and connected with the driving substrate during batch transfer, and the problem of high transfer difficulty is solved.
Further, in a possible implementation manner, the cross-sectional shapes of the first-type semiconductor layer 10, the light emitting layer 30, and the second-type semiconductor layer 20 are inverted trapezoids with a plane perpendicular to the light emitting surface as a cross section. It should be noted that the cross section of the first type semiconductor layer 10, the light emitting layer 30, and the second type semiconductor layer 20 refers to a cross section of a stacked structure formed by the first type semiconductor layer 10, the light emitting layer 30, and the second type semiconductor layer 20, in this embodiment, as shown in fig. 1, a surface (top surface) of the first type semiconductor layer 10 away from the light emitting layer is a light emitting surface, a plane perpendicular to the top surface of the first type semiconductor layer 10 is a cross section, and a cross section of the stacked structure formed by the first type semiconductor layer 10, the light emitting layer 30, and the second type semiconductor layer 20 is an inverted trapezoid.
In a possible implementation manner, the first type electrode layer 40 and the second type electrode layer 50 are metal electrode layers, and on the basis of the above embodiment, the first type electrode layer 40 and the second type electrode layer 50 cover the side walls of the micro light emitting diode, in this embodiment, the first type electrode layer 40 and the second type electrode layer 50 are set as metal electrode layers, specifically, silver, aluminum, and the like, and the reflectivity of metal is high, so that the reflectivity of the first type electrode layer 40 and the second type electrode layer 50 is further increased, light emitted to the side walls can be reflected, and light emission from the side walls can be further reduced or avoided.
In the above embodiment, the acute angle of the trapezoid ranges from 50 ° to 85 °. Specifically, in the present embodiment, the base angle of the trapezoid may take any value within a range of 50 ° to 85 °, and preferably, the cross-sectional shape of the stacked structure formed by the first type semiconductor layer 10, the light-emitting layer 30, and the second type semiconductor layer 20 is an isosceles trapezoid, and the base angle of the isosceles trapezoid may be set to 60 °, which facilitates the fabrication of the micro light-emitting diode chip.
In one possible implementation, the first type semiconductor layer 10, the light emitting layer 30, and the second type semiconductor layer 20 are shaped as truncated cones or truncated pyramids. The shape of the first-type semiconductor layer 10, the light-emitting layer 30, and the second-type semiconductor layer 20 refers to the shape of the laminated structure of the first-type semiconductor layer 10, the light-emitting layer 30, and the second-type semiconductor layer 20, and as shown in fig. 2, the laminated structure of the first-type semiconductor layer 10, the light-emitting layer 30, and the second-type semiconductor layer 20 may be a truncated pyramid, specifically, a truncated pyramid.
In one possible implementation, the first-type electrode layer 40 extends horizontally to a side away from the first-type semiconductor layer 10 to form a first protruding portion 41; the second-type electrode layer 50 extends horizontally to the other side away from the first-type electrode layer 40 to form a second protruding portion 51. Taking the orientation shown in fig. 1 as an example, the first-type electrode layer 40 covers one side of the sidewall of the first-type semiconductor layer 10, the first-type electrode layer 40 extends outward in a direction away from the first-type semiconductor layer 10 to form a first protruding portion 41, the top surface of the first protruding portion 41 is a flat surface, and specifically, the first protruding portion 41 may be thickened by an electroplating process when the first protruding portion 41 is formed, and the first protruding portion 41 may be planarized by a chemical mechanical polishing process. The top surface of the first protrusion 41 may be flush with the top surface of the first-type semiconductor layer 10 or may be higher than the top surface of the first-type semiconductor layer 10. The provision of the first extension 41 not only facilitates the formation of the subsequent insulating passivation layer 60, the second-type electrode layer 50, but also facilitates the alignment and connection with the driving substrate at the time of subsequent batch transfer.
After the first type electrode layer 40 forms the first protruding portion 41, the insulating passivation layer 60 covers the first type electrode layer 40, and the second type electrode layer 50 covers the insulating passivation layer 60, taking the orientation shown in fig. 1 as an example, the second type electrode layer 50 covers the insulating passivation layer 60 and extends to two sides, on the side away from the first protruding portion 41, the second type electrode layer 50 extends horizontally to form the second protruding portion 51, and the top surface of the second protruding portion 51 is a flat surface. Specifically, thickening may be performed by an electroplating process when forming the second-type electrode layer 50, and the second protrusion 51 may be subjected to a planarization process by a chemical mechanical polishing process. The top surface of the second protrusion 51 may be flush with the top surface of the first-type semiconductor layer 10 or may be higher than the top surface of the first-type semiconductor layer 10. The provision of the second projecting portion 51 facilitates alignment and connection with the drive substrate at the time of subsequent batch transfer.
In one possible implementation, the top surface of the first extension 41 is flush with the top surface of the second extension 51 in the vertical direction. On the basis of the above embodiment, the first-type electrode layer 40 forms the first protruding portion 41, and the second-type electrode layer 50 forms the second protruding portion 51, and the top surface of the first protruding portion 41 is flush with the top surface of the second protruding portion 51 in this embodiment, that is, the exposed portion of the first-type electrode layer 40 is flush with the exposed portion of the second-type electrode layer 50, which further improves the alignment accuracy when connecting to the drive substrate.
In one possible implementation, the top surface of the first protrusion 41 is flush with the top surface of the first-type semiconductor layer 10 in the vertical direction. In addition to the above embodiments, the top surface of the first protruding portion 41 is flush with the top surface of the second protruding portion 51, and in this embodiment, the top surface of the first protruding portion 41, the top surface of the second protruding portion 51, and the top surface of the first type semiconductor layer 10 are flush with each other, which facilitates the fabrication of the micro light emitting diode chip.
In another possible implementation, the top surface of the first protrusion 41 is higher than the top surface of the first-type semiconductor layer 10 in the vertical direction. On the basis of the above embodiment, the top surface of the first protruding portion 41 is flush with the top surface of the second protruding portion 51, and in this embodiment, the arrangement that the top surfaces of the first protruding portion 41 and the second protruding portion 51 are slightly higher than the top surface of the first type semiconductor layer 10 further ensures that light can be reflected, thereby avoiding the optical crosstalk problem.
In one possible implementation, the top surface of the first-type semiconductor layer 10 is provided as a rough surface. In this embodiment, the top surface of the first type semiconductor layer 10 is a rough surface, specifically, because there is a total reflection phenomenon when light is emitted from the optically dense medium to the optically thinner medium, if the interface is smooth and flat, light rays outside the reflective cone (the central axis of the cone is parallel to the normal of the interface) will be gradually absorbed by the material in the LED chip and cannot escape, and only light rays with an incident direction inside the reflective cone can partially escape; the rough surface can provide a plurality of oriented reflecting cones, and light rays in certain directions which cannot escape originally can also escape out of the LED chip, so that the rough surface is favorable for light extraction of the micro LED chip.
Example two
The display panel provided in the second embodiment of the present invention includes the micro light emitting diode chip provided in the first embodiment, wherein the structure, function, and implementation of the micro light emitting diode chip can refer to the detailed description in the above embodiments, and are not described herein again.
The display panel provided by the embodiment can be applied to any display device with a display function, which comprises a micro light emitting diode chip, such as a mobile phone, a tablet computer, an intelligent watch, an electronic book, a navigator, a television, a digital camera and the like. The display panel provided in this embodiment also has the same advantages as the micro led chip provided in the embodiment, and thus, the description thereof is omitted.
The embodiments or implementation modes in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other.
In the description of the present specification, reference to the description of the terms "one embodiment", "some embodiments", "an illustrative embodiment", "an example", "a specific example", or "some examples", etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.