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CN112349593B - Two-dimensional thin film transistor with graphene as source and drain electrodes and preparation method - Google Patents

Two-dimensional thin film transistor with graphene as source and drain electrodes and preparation method Download PDF

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CN112349593B
CN112349593B CN202011163303.7A CN202011163303A CN112349593B CN 112349593 B CN112349593 B CN 112349593B CN 202011163303 A CN202011163303 A CN 202011163303A CN 112349593 B CN112349593 B CN 112349593B
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graphene
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dimensional
transistor
hafnium disulfide
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CN112349593A (en
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李文武
高彩芳
聂倩帆
李梦姣
胡志高
褚君浩
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East China Normal University
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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Abstract

The invention discloses a two-dimensional thin film transistor with graphene as a source electrode and a drain electrode and a preparation method thereof, wherein the two-dimensional transistor belongs to a bottom gate top contact type transistor. The preparation method comprises the steps of firstly using a mechanical stripping method to strip a thin film from a two-dimensional material block by using a England blue adhesive tape to a special PF gel film for Gelpak mechanical stripping, and selecting a material with proper thickness and uniform surface to transfer to a silicon/silicon dioxide substrate to be used as an N-type semiconductor channel layer. And stripping two graphene films, respectively transferring the two graphene films to two ends of the semiconductor layer to be used as a source electrode and a drain electrode, and finally evaporating the gold electrode by using a mask plate through a thermal evaporation method to obtain the two-dimensional thin film transistor. The invention is different from other two-dimensional device preparation processes, does not need complex and expensive electron beam lithography, is safe and environment-friendly in used material and low in cost, not only obtains a microelectronic device taking a two-dimensional material as a source electrode, a drain electrode and a channel, but also optimizes the existing two-dimensional transistor in the aspects of mobility, on-off ratio and the like.

Description

一种石墨烯为源漏电极的二维薄膜晶体管及制备方法A kind of two-dimensional thin film transistor with graphene as source and drain electrodes and its preparation method

技术领域technical field

本发明涉及二维薄膜晶体管制备技术领域,具体地说,是采用二维材料石墨烯作为晶体管的源漏电极,从而优化传统的二维薄膜晶体管。The invention relates to the technical field of preparation of two-dimensional thin film transistors, specifically, two-dimensional material graphene is used as the source and drain electrodes of the transistor, thereby optimizing the traditional two-dimensional thin film transistors.

背景技术Background technique

近年来,以二硫化物、石墨烯和黑磷(BP)等为代表的二维层状半导体材料由于具有优异的电学性能受到了广泛关注。科研人员已经研制出基于二维半导体的高性能电子器件,但其实际应用却受到半导体材料自发氧化的严重影响。例如,少层黑磷在室温下具有高的p型载流子迁移率(1000cm2V-1S-1),由于在空气中不稳定,限制了其在电子器件和电路方面的应用。为了解决器件稳定性问题,研究人员已研发出多种方案对沟道材料进行保护以避免自发氧化,包括剥离后的聚甲基丙烯酸甲酯(PMMA)涂层、原子层沉积(ALD)生长的Al2O3涂层、h-BN封装,以及选择使用隔离水氧的手套箱进行材料制备等。当然由于其不稳定问题,导致二维晶体管中半导体层与金属电极之间的接触问题也尤为重要,严重影响了二维器件的进一步发展。In recent years, two-dimensional layered semiconductor materials represented by disulfides, graphene, and black phosphorus (BP) have attracted extensive attention due to their excellent electrical properties. Researchers have developed high-performance electronic devices based on two-dimensional semiconductors, but their practical applications are severely affected by the spontaneous oxidation of semiconductor materials. For example, few-layer black phosphorus has high p-type carrier mobility (1000 cm 2 V -1 S -1 ) at room temperature, which limits its application in electronic devices and circuits due to its instability in air. In order to solve the problem of device stability, researchers have developed a variety of schemes to protect the channel material from spontaneous oxidation, including stripped polymethyl methacrylate (PMMA) coating, atomic layer deposition (ALD) grown Al 2 O 3 coating, h-BN encapsulation, and choosing to use a glove box isolated from water and oxygen for material preparation, etc. Of course, due to its instability, the contact problem between the semiconductor layer and the metal electrode in the two-dimensional transistor is also particularly important, which seriously affects the further development of two-dimensional devices.

另一方面,HfS2具有独特的结构且带隙可由层数调控,是一种具有超高电学性能的二维材料,有望在电子/光电子器件领域实现应用,尽管二硫化铪具有许多吸引人的电学和光电特性,但是二硫化铪的水氧性很差,在空气中暴露数小时后,二硫化铪薄膜会由于吸附水分和氧而严重的自发氧化,从而致使器件的电学性能出现严重退化。并且由于二维材料与金属电极之间存在接触问题,严重影响到二维薄膜晶体管的电学性能。On the other hand, HfS 2 has a unique structure and a band gap that can be tuned by the number of layers. It is a two-dimensional material with ultrahigh electrical properties and is expected to be applied in the field of electronic/optoelectronic devices. Although hafnium disulfide has many attractive Electrical and photoelectric properties, but the water-oxygen properties of hafnium disulfide are very poor. After being exposed to air for several hours, the hafnium disulfide film will be severely spontaneously oxidized due to the adsorption of moisture and oxygen, resulting in serious degradation of the electrical properties of the device. Moreover, due to the contact problem between the two-dimensional material and the metal electrode, the electrical performance of the two-dimensional thin film transistor is seriously affected.

发明内容Contents of the invention

本发明的目的是提供一种以石墨烯为源/漏电极的N型二维薄膜晶体管及其制备方法。其制备方法适用的二维薄膜晶体管为底栅顶接触结构,晶体管由下至上依次是栅极、介电层、N型半导体有源层、源/漏电极。该方法在二维薄膜晶体管半导体层制备完毕后,通过同样的机械剥离方法制备并转移得到二维材料源/漏电极,通过该方法既可以改善二维材料只能用电子束光刻和尺寸较小的铜网进行掩膜制备的限制,又可以改善二维材料与金电极之间的接触,从而提升了N型二维薄膜半导体的电学性能。The object of the present invention is to provide an N-type two-dimensional thin film transistor with graphene as a source/drain electrode and a preparation method thereof. The two-dimensional thin film transistor applicable to the preparation method has a bottom-gate and top-contact structure, and the transistor is sequentially composed of a gate, a dielectric layer, an N-type semiconductor active layer, and a source/drain electrode. In this method, after the semiconductor layer of the two-dimensional thin film transistor is prepared, the source/drain electrode of the two-dimensional material is prepared and transferred by the same mechanical stripping method. This method can improve the two-dimensional material that can only be obtained by electron beam lithography and has a smaller size. The limitation of small copper mesh for mask preparation can also improve the contact between the two-dimensional material and the gold electrode, thereby improving the electrical properties of the N-type two-dimensional thin film semiconductor.

实现本发明目的的具体技术方案是:The concrete technical scheme that realizes the object of the invention is:

一种石墨烯为源漏电极的二维薄膜晶体管的制备方法,该制备方法包括以下具体步骤:A kind of graphene is the preparation method of the two-dimensional thin film transistor of source-drain electrode, and this preparation method comprises the following concrete steps:

步骤1:二维材料薄膜的制备Step 1: Preparation of two-dimensional material film

A1:二硫化铪半导体薄膜的制备A1: Preparation of hafnium disulfide semiconductor thin film

将二硫化铪晶体块材置于英格兰蓝色胶带上,对折胶带,按压,然后撕开;在撕开的英格兰胶带上会自然黏附一层二硫化铪薄片,将所述胶带在新鲜胶带表面对撕3-5次,减薄二硫化铪薄片后,贴附到附在载玻片上的Gelpak机械剥离专用PF凝胶膜上再轻轻揭起,用光学显微镜观察所述PF凝胶膜,通过颜色判断二硫化铪薄膜的厚度,选择蓝色半透明、厚度为10-15nm、表面均匀且长度15-200μm的材料标记备用;Place the hafnium disulfide crystal block on the English blue tape, fold the tape in half, press it, and then tear it; a layer of hafnium disulfide flakes will naturally adhere to the torn England tape, and put the tape on the surface of the fresh tape. Tear off 3-5 times, thin the hafnium disulfide sheet, attach it to the special PF gel film for Gelpak mechanical peeling attached to the glass slide, then lift it off gently, observe the PF gel film with an optical microscope, and pass Determine the thickness of the hafnium disulfide film by color, select a blue translucent material with a thickness of 10-15nm, a uniform surface and a length of 15-200μm for marking;

A2:石墨烯薄膜材料的制备A2: Preparation of graphene thin film materials

将石墨烯晶体块材置于英格兰蓝色胶带上,对折胶带,按压,然后撕开;在撕开的英格兰胶带上会自然黏附一层石墨烯薄片,将所述胶带在新鲜胶带表面对撕3-5次,减薄石墨烯薄片后,贴附到附在载玻片上的Gelpak机械剥离专用PF凝胶膜上再轻轻揭起,用光学显微镜观察所述PF凝胶膜,通过颜色判断石墨烯薄膜的厚度,选择厚度5-10nm,表面均匀且长度为50-200μm的两块石墨烯薄膜材料备用,分别记为石墨烯薄膜材料A和石墨烯薄膜材料B;Place the graphene crystal block on the England blue tape, fold the tape in half, press it, and then tear it; a layer of graphene flakes will naturally adhere to the torn England tape, and tear the tape on the surface of the fresh tape 3 -5 times, after thinning the graphene sheet, attach it to the Gelpak mechanical peeling special PF gel film attached to the glass slide and gently lift it off, observe the PF gel film with an optical microscope, and judge the graphite by color The thickness of graphene film, select thickness 5-10nm, two graphene film materials that surface is even and length is 50-200 μ m are standby, are recorded as graphene film material A and graphene film material B respectively;

步骤2:二硫化铪和石墨烯二维薄膜材料的转移Step 2: Transfer of hafnium disulfide and graphene two-dimensional thin film materials

B1:衬底的清洗B1: Cleaning of the substrate

选择二氧化硅/硅(SiO2/Si)衬底,其中二氧化硅热氧化层的厚度为300nm,将衬底依次置于丙酮、异丙醇、去离子水中用超声波清洗机依次清洗5分钟,然后用氮气枪吹干作为目标衬底备用;Select a silicon dioxide/silicon (SiO 2 /Si) substrate, wherein the thickness of the silicon dioxide thermal oxide layer is 300nm, place the substrate in acetone, isopropanol, and deionized water in sequence and clean it with an ultrasonic cleaner for 5 minutes , and then dry it with a nitrogen gun as the target substrate for later use;

B2:二硫化铪薄膜材料的转移B2: Transfer of hafnium disulfide thin film materials

利用二维材料转移系统以及配套显微镜将步骤A1制备的PF凝胶膜上的二硫化铪薄膜转移到步骤B1的目标衬底上作为二维晶体管的半导体导电沟道;Use a two-dimensional material transfer system and a supporting microscope to transfer the hafnium disulfide thin film on the PF gel film prepared in step A1 to the target substrate in step B1 as the semiconductor conductive channel of the two-dimensional transistor;

B3:石墨烯薄膜材料A、B的转移B3: Transfer of graphene film materials A and B

利用二维材料转移系统以及配套显微镜将步骤A2制备的PF凝胶膜上的石墨烯薄膜材料A及石墨烯薄膜材料B分别转移到步骤B2目标衬底的二硫化铪薄膜的两端,所述石墨烯薄膜材料A、B与二硫化铪薄膜在各自最大长度的方向上呈水平堆叠,且两端重叠5-15μm,石墨烯薄膜材料A、B作为晶体管的二维源、漏电极,中间露的二硫化铪薄膜为半导体导电沟道;Transfer the graphene film material A and the graphene film material B on the PF gel film prepared in step A2 to the two ends of the hafnium disulfide film on the target substrate in step B2, using a two-dimensional material transfer system and a supporting microscope. The graphene film materials A, B and the hafnium disulfide film are stacked horizontally in the direction of their respective maximum lengths, and the two ends overlap by 5-15 μm. The graphene film materials A and B are used as the two-dimensional source and drain electrodes of the transistor. The hafnium disulfide thin film is a semiconductor conductive channel;

步骤3:源、漏金属电极的制备Step 3: Preparation of source and drain metal electrodes

C1:固定掩模版C1: fixed reticle

利用二维材料转移系统将不锈钢掩模版固定在目标衬底的二硫化铪薄膜上,所述二硫化铪薄膜完全被掩模版掩模部分覆盖且两侧露出石墨烯薄膜材料A和石墨烯薄膜材料B;Use a two-dimensional material transfer system to fix the stainless steel mask on the hafnium disulfide film of the target substrate. The hafnium disulfide film is completely covered by the mask of the mask and the graphene film material A and the graphene film material are exposed on both sides. B;

C2:蒸镀金属源、漏电极C2: Evaporated metal source and drain electrodes

采用常规的真空热蒸发法利用不锈钢掩模版在石墨烯薄膜材料A和石墨烯薄膜材料B上蒸镀金,得到厚度为50nm的金作为源、漏金属电极;制得所述二维薄膜晶体管。The conventional vacuum thermal evaporation method utilizes a stainless steel mask to vapor-deposit gold on the graphene film material A and the graphene film material B to obtain gold with a thickness of 50 nm as the source and drain metal electrodes; the two-dimensional thin film transistor is obtained.

步骤3中,所述蒸镀金的电流为80-90A,速率为0.1-0.12nm/s。In step 3, the current of the evaporated gold is 80-90A, and the rate is 0.1-0.12nm/s.

一种上述方法制得的石墨烯为源漏电极的二维薄膜晶体管。A two-dimensional thin film transistor in which the graphene prepared by the above method is a source-drain electrode.

本发明与现有技术相比,最大的优势在于:本发明没有用到大部分二维器件制备所需的复杂的电子束光刻技术,操作简单,成本低廉;用石墨烯做源漏电极,实现了同时用二维材料做半导体层与半导体沟道层,且由于石墨烯功函数小于二硫化铪功函数,改善了二硫化铪与电极之间的接触,促进了载流子的运输,在一定程度上提升了二维薄膜晶体管的迁移率和开关电流比。Compared with the prior art, the present invention has the greatest advantage in that: the present invention does not use the complex electron beam lithography technology required for the preparation of most two-dimensional devices, the operation is simple, and the cost is low; the source and drain electrodes are made of graphene, Realized the use of two-dimensional materials as the semiconductor layer and the semiconductor channel layer at the same time, and because the work function of graphene is smaller than the work function of hafnium disulfide, the contact between hafnium disulfide and the electrode is improved, and the transport of carriers is promoted. To a certain extent, the mobility and switching current ratio of the two-dimensional thin film transistor are improved.

附图说明Description of drawings

图1为本发明所述方法制备的石墨烯为源/漏电极的二维薄膜晶体管的截面结构示意图;Fig. 1 is the cross-sectional structure schematic diagram of the two-dimensional thin film transistor of source/drain electrode for the graphene prepared by the method of the present invention;

图2为对比例制备的二维薄膜晶体管的截面结构示意图;2 is a schematic cross-sectional structure diagram of a two-dimensional thin film transistor prepared in a comparative example;

图3为本发明有无石墨烯电极层二维薄膜晶体管的转移特性曲线对比图。Fig. 3 is a graph comparing the transfer characteristic curves of the two-dimensional thin film transistor with or without the graphene electrode layer of the present invention.

具体实施方式Detailed ways

下面结合附图及实施例和对比例对本发明进一步说明。The present invention will be further described below in conjunction with the accompanying drawings, examples and comparative examples.

参阅图1,本发明所述实施例的二维薄膜晶体管为底栅顶接触结构,包括栅电极5、介电层4、半导体层3、二维源/漏电极2及金属电极1;其中,所述栅电极5为硅衬底;所述介电层4为二氧化硅层;所述半导体层3是通过机械剥离法转移得到的二硫化铪半导体材料;所述源漏电极2是通过机械剥离法转移得到的石墨烯材料;所述金属电极1是通过热蒸发的方式形成的金源漏电极。Referring to FIG. 1, the two-dimensional thin film transistor according to the embodiment of the present invention has a bottom-gate-top-contact structure, including a gate electrode 5, a dielectric layer 4, a semiconductor layer 3, a two-dimensional source/drain electrode 2, and a metal electrode 1; wherein, The gate electrode 5 is a silicon substrate; the dielectric layer 4 is a silicon dioxide layer; the semiconductor layer 3 is a hafnium disulfide semiconductor material transferred by a mechanical lift-off method; the source and drain electrodes 2 are mechanically The graphene material transferred by lift-off method; the metal electrode 1 is a gold source-drain electrode formed by thermal evaporation.

以下本发明提供优选实施例和对比例,但不应该被认为仅限于在此阐述的实施例。The present invention below provides preferred and comparative examples, but should not be construed as limited to the examples set forth herein.

实施例Example

石墨烯作为源漏电极的优化二维薄膜晶体管制备方法:Preparation method of optimized two-dimensional thin film transistor with graphene as source and drain electrodes:

(1)将二硫化铪晶体块材置于英格兰蓝色胶带上,对折胶带,按压,然后撕开。在撕开的英格兰胶带上会自然黏附一层较厚的二硫化铪薄片,将所述胶带在新鲜胶带表面对撕3-5次,贴附到附在载玻片上的Gelpak机械剥离专用PF凝胶膜上再轻轻揭起,用光学显微镜观察所述PF凝胶膜,通过颜色判断二硫化铪薄膜的厚度,选择蓝色半透明、厚度为10-15nm、表面均匀且长度15-200μm的材料标记备用;再将石墨烯晶体块材置于英格兰蓝色胶带上,对折胶带,按压,然后撕开。在撕开的英格兰胶带上会自然黏附一层较厚的石墨烯薄片,将所述胶带在新鲜胶带表面对撕3-5次,贴附到附在载玻片上的Gelpak机械剥离专用PF凝胶膜上再轻轻揭起,用光学显微镜观察,通过颜色判断石墨烯薄膜的厚度,选择厚度5-10nm,表面均匀且长度为50-200μm的两块石墨烯薄膜材料备用,分别记为石墨烯A、石墨烯薄膜材料B;(1) Place the hafnium disulfide crystal block on England blue tape, fold the tape in half, press it, and tear it apart. A layer of thicker hafnium disulfide flakes will naturally adhere to the torn English tape, and the tape is torn 3-5 times on the surface of the fresh tape, and then attached to the Gelpak mechanical peel special PF gel attached to the glass slide Gently lift off the adhesive film, observe the PF gel film with an optical microscope, and judge the thickness of the hafnium disulfide film by the color, choose a blue translucent film with a thickness of 10-15nm, a uniform surface and a length of 15-200μm The material is marked for later use; then place the graphene crystal block on the English blue tape, fold the tape in half, press it, and tear it apart. A layer of thicker graphene flakes will naturally adhere to the torn English tape, tear the tape 3-5 times on the surface of the fresh tape, and attach it to the Gelpak mechanical peeling special PF gel attached to the glass slide Gently lift off the film, observe with an optical microscope, judge the thickness of the graphene film by color, select two graphene film materials with a thickness of 5-10nm, a uniform surface and a length of 50-200μm for use, and record them as graphene A, graphene film material B;

(2)选择二氧化硅/硅(SiO2/Si)衬底,其中二氧化硅热氧化层的厚度为300nm,将衬底依次置于丙酮、异丙醇、去离子水中用超声波清洗机依次清洗5分钟,然后用氮气枪吹干作为目标衬底备用;利用二维材料转移系统以及配套显微镜将(1)制备的PF凝胶膜上的二硫化铪薄膜转移到目标衬底上作为二维晶体管的半导体导电沟道;利用二维材料转移系统以及配套显微镜将(1)制备的PF凝胶膜上的石墨烯薄膜材料A及石墨烯薄膜材料B分别转移到步骤B目标衬底的二硫化铪薄膜的两端,所述石墨烯薄膜材料A、B与二硫化铪薄膜在各自最大长度的方向上呈水平堆叠,且两端重叠5-15μm,石墨烯薄膜材料A、B作为晶体管的二维源漏电极,中间露的二硫化铪薄膜作为半导体导电沟道。(2) Select a silicon dioxide/silicon (SiO 2 /Si) substrate, wherein the thickness of the silicon dioxide thermal oxide layer is 300nm, place the substrate in acetone, isopropanol, and deionized water in sequence with an ultrasonic cleaner Clean for 5 minutes, then dry it with a nitrogen gun as the target substrate; use the two-dimensional material transfer system and a supporting microscope to transfer the hafnium disulfide film on the PF gel film prepared in (1) to the target substrate as a two-dimensional material transfer system. The semiconductor conductive channel of the transistor; the graphene film material A and the graphene film material B on the PF gel film prepared in (1) are respectively transferred to the disulfide disulfide of the target substrate in step B by using a two-dimensional material transfer system and a supporting microscope. At the two ends of the hafnium film, the graphene film materials A, B and the hafnium disulfide film are horizontally stacked in the direction of their respective maximum lengths, and the two ends overlap by 5-15 μm, and the graphene film materials A and B are used as the two sides of the transistor. Dimensional source and drain electrodes, and the hafnium disulfide film exposed in the middle acts as a semiconductor conductive channel.

(3)利用二维材料转移系统将不锈钢掩模版固定在目标衬底的二硫化铪薄膜上,所述二硫化铪薄膜完全被掩模版掩模部分覆盖且两端露出石墨烯薄膜材料A和石墨烯薄膜材料B;采用常规的真空热蒸发法利用不锈钢掩模版在石墨烯薄膜材料A和石墨烯薄膜材料B上蒸镀得到厚度为50nm的金作为源、漏金属电极;制得所述二维薄膜晶体管。(3) Use a two-dimensional material transfer system to fix the stainless steel mask on the hafnium disulfide film of the target substrate. The hafnium disulfide film is completely covered by the mask of the mask and the graphene film material A and graphite are exposed at both ends. Graphene thin film material B; adopt conventional vacuum thermal evaporation method to utilize stainless steel mask plate to vapor-deposit on graphene thin film material A and graphene thin film material B and obtain the gold that thickness is 50nm as source, drain metal electrode; Make described two-dimensional thin film transistor.

对比例comparative example

单层金属作为源漏电极的传统二维薄膜晶体管制备方法:The traditional two-dimensional thin film transistor preparation method with a single layer of metal as the source and drain electrodes:

(1)将二硫化铪晶体块材置于英格兰蓝色胶带上,对折胶带,按压,然后撕开。在撕开的英格兰胶带上会自然黏附一层较厚的二硫化铪薄片,将所述胶带在新鲜胶带表面对撕3-5次,贴附到附在载玻片上的Gelpak机械剥离专用PF凝胶膜上再轻揭起,用光学显微镜观察所述PF凝胶膜,通过颜色判断二硫化铪薄膜的厚度,选择蓝色半透明、厚度为10-15nm、表面均匀且长度15-200μm的材料标记备用。(1) Place the hafnium disulfide crystal block on England blue tape, fold the tape in half, press it, and tear it apart. A thick layer of hafnium disulfide flakes will naturally adhere to the torn England tape, and the tape is torn 3-5 times on the surface of the fresh tape, and then attached to the Gelpak mechanical peeling special PF gel attached to the glass slide. Lightly lift off the adhesive film, observe the PF gel film with an optical microscope, judge the thickness of the hafnium disulfide film by color, and select a blue translucent material with a thickness of 10-15nm, a uniform surface and a length of 15-200μm Mark as spare.

(2)选择二氧化硅/硅(SiO2/Si)衬底,其中二氧化硅热氧化层的厚度为300nm,将衬底依次置于丙酮、异丙醇、去离子水中用超声波清洗机依次清洗5分钟,然后用氮气枪吹干作为目标衬底备用;利用二维材料转移系统以及配套显微镜将(1)制备的PF凝胶膜上的二硫化铪薄膜转移到目标衬底上作为二维晶体管的半导体导电沟道。(2) Select a silicon dioxide/silicon (SiO 2 /Si) substrate, wherein the thickness of the silicon dioxide thermal oxide layer is 300nm, place the substrate in acetone, isopropanol, and deionized water in sequence with an ultrasonic cleaner Clean for 5 minutes, then dry it with a nitrogen gun as the target substrate; use the two-dimensional material transfer system and a supporting microscope to transfer the hafnium disulfide film on the PF gel film prepared in (1) to the target substrate as a two-dimensional material transfer system. The semiconductor conducting channel of a transistor.

(3)利用二维材料转移系统将不锈钢掩模版固定在目标衬底的二硫化铪薄膜上,所述掩模部分两侧均露出部分二硫化铪薄膜,最后采用常规的真空热蒸发法利用不锈钢掩模版在转移到目标衬底上蒸镀得到厚度为50nm的金作为源、漏金属电极,制得所述二维晶体管。(3) Use a two-dimensional material transfer system to fix the stainless steel mask on the hafnium disulfide film of the target substrate, and part of the hafnium disulfide film is exposed on both sides of the mask part, and finally use the conventional vacuum thermal evaporation method to utilize the stainless steel The reticle is transferred to the target substrate and vapor-deposited to obtain gold with a thickness of 50 nm as the source and drain metal electrodes, so as to obtain the two-dimensional transistor.

实施例中所制备的将石墨烯作为源漏电极的二维薄膜晶体管与对比例中制备的传统二维晶体管的电学参数对比如下所示:表1是石墨烯作为源漏电极的二维薄膜晶体管相对于传统二维晶体管的电学参数对比;图3是石墨烯作为源漏电极的二维薄膜晶体管相对于传统二维晶体管的转移特性曲线图。对比表1、图3、可知,在二维半导体与金属电极之间插入一层石墨烯作为源漏电极优化的薄膜晶体管,其源漏电流大幅度增加,阈值电压有所减小,电流开关比增加了1个数量级,迁移率从0.01cm2V-1S-1增加了一个数量级到0.1cm2V-1S-1。因此,经本发明制备的以石墨烯作为二维薄膜晶体管的源漏电极,优化了传统二维晶体管的结构,其电学性能得到了显著提升,对以后二维晶体管到全二维晶体管的发展具有非常重要的意义。The comparison of the electrical parameters of the two-dimensional thin film transistor using graphene as the source and drain electrodes prepared in the embodiment and the traditional two-dimensional transistor prepared in the comparative example is as follows: Table 1 is the two-dimensional thin film transistor with graphene as the source and drain electrodes Compared with the electrical parameters of the traditional two-dimensional transistor; Figure 3 is a graph of the transfer characteristics of the two-dimensional thin film transistor with graphene as the source and drain electrodes relative to the traditional two-dimensional transistor. Comparing Table 1 and Figure 3, it can be seen that a layer of graphene is inserted between the two-dimensional semiconductor and the metal electrode as a thin film transistor with optimized source-drain electrodes, the source-drain current is greatly increased, the threshold voltage is reduced, and the current switch ratio An order of magnitude increase, the mobility increased by an order of magnitude from 0.01 cm 2 V -1 S -1 to 0.1 cm 2 V -1 S -1 . Therefore, the graphene prepared by the present invention as the source and drain electrodes of the two-dimensional thin film transistor optimizes the structure of the traditional two-dimensional transistor, and its electrical performance has been significantly improved, which is of great significance to the development of the two-dimensional transistor to the full two-dimensional transistor in the future. very important meaning.

二维晶体管中半导体层与金属源漏电极之间存在接触问题,会影响载流子的传输,利用二维材料石墨烯插入到半导体层和金属电极之间,由于石墨烯是零带隙半导体,与金属之间载流子传输非[常容易,且石墨烯的功函数为4.6eV,小于二硫化铪的功函数4.9eV,所以在一定程度上对二硫化铪形成了N型电子掺杂,促进了载流子的运输,改善了半导体层和金属电极之间的接触,增大了沟道中载流子浓度,故提升了传统的二维晶体管的电学性能。There is a contact problem between the semiconductor layer and the metal source and drain electrodes in the two-dimensional transistor, which will affect the transport of carriers. The two-dimensional material graphene is inserted between the semiconductor layer and the metal electrode. Since graphene is a zero-band gap semiconductor, Carrier transport between metal and metal is very easy, and the work function of graphene is 4.6eV, which is smaller than that of hafnium disulfide 4.9eV, so N-type electronic doping is formed on hafnium disulfide to a certain extent. The transportation of carriers is promoted, the contact between the semiconductor layer and the metal electrode is improved, and the concentration of carriers in the channel is increased, so the electrical performance of the traditional two-dimensional transistor is improved.

因此,通过本发明,利用石墨烯做源漏电极,不用复杂昂贵的电子束光刻技术,操作简单,成本低廉,从而实现半-全二维薄膜晶体管,并且改善二维材料和金属电极之间的接触问题,提升二维晶体管的电学性能,对之后实现全二维晶体管意义重大。Therefore, through the present invention, graphene is used as source and drain electrodes without complex and expensive electron beam lithography technology, simple operation and low cost, thereby realizing a semi-full two-dimensional thin film transistor, and improving the relationship between two-dimensional materials and metal electrodes. To improve the electrical performance of two-dimensional transistors, it is of great significance for the realization of full two-dimensional transistors in the future.

表1Table 1

晶体管电学参数Transistor Electrical Parameters 无石墨烯Graphene-free 有石墨烯There is graphene 开关比Switch ratio 10<sup>4</sup>10<sup>4</sup> 10<sup>6</sup>10<sup>6</sup> 迁移率(cm<sup>2</sup>V<sup>-1</sup>S<sup>-1</sup>)Mobility (cm<sup>2</sup>V<sup>-1</sup>S<sup>-1</sup>) 0.010.01 0.10.1 阈值电压(V)Threshold voltage (V) 5151 3535

Claims (2)

1. A preparation method of a two-dimensional thin film transistor with graphene as a source and drain electrode is characterized by comprising the following specific steps of:
step 1: preparation of two-dimensional material film
A1: preparation of hafnium disulfide semiconductor film
Placing the hafnium disulfide crystal block on an England blue adhesive tape, folding the adhesive tape in half, pressing, and then tearing; naturally adhering a layer of hafnium disulfide sheet on a torn England adhesive tape, oppositely tearing the adhesive tape on the surface of a fresh adhesive tape for 3-5 times, thinning the hafnium disulfide sheet, attaching the thinned hafnium disulfide sheet to a Gelpak mechanical peeling special PF gel film attached to a glass slide, slightly lifting the PF gel film, observing the PF gel film by using an optical microscope, judging the thickness of the hafnium disulfide film by color, and selecting a blue semitransparent material with the thickness of 10-15nm, uniform surface and the length of 15-200 mu m to mark for later use;
a2: preparation of graphene film material
Placing the graphene crystal block on an England blue adhesive tape, folding the adhesive tape in half, pressing, and then tearing; naturally adhering a layer of graphene sheet to a torn England adhesive tape, tearing the adhesive tape on the surface of a fresh adhesive tape for 3-5 times, thinning the graphene sheet, attaching the thinned graphene sheet to a special PF gel film for Gelpak mechanical stripping attached to a glass slide, slightly uncovering the PF gel film, observing the PF gel film by using an optical microscope, judging the thickness of the graphene film through color, selecting two graphene film materials with the thickness of 5-10nm, uniform surface and the length of 50-200 mu m for later use, and respectively marking the two graphene film materials as a graphene film material A and a graphene film material B;
step 2: transfer of hafnium disulfide and graphene two-dimensional thin film materials
B1: cleaning of substrates
Selecting a silicon dioxide/silicon substrate, wherein the thickness of a silicon dioxide thermal oxidation layer is 300nm, sequentially placing the substrate in acetone, isopropanol and deionized water, sequentially cleaning for 5 minutes by using an ultrasonic cleaning machine, and then blow-drying by using a nitrogen gun to serve as a target substrate for later use;
b2: transfer of hafnium disulfide film material
Transferring the hafnium disulfide film on the PF gel film prepared in the step A1 to the target substrate in the step B1 by using a two-dimensional material transfer system and a matched microscope to serve as a semiconductor conducting channel of the two-dimensional transistor;
b3: transfer of graphene film materials A and B
Respectively transferring the graphene film material A and the graphene film material B on the PF gel film prepared in the step A2 to two ends of a hafnium disulfide film of a target substrate in the step B2 by using a two-dimensional material transfer system and a matched microscope, wherein the graphene film materials A and B and the hafnium disulfide film are horizontally stacked in the direction of the maximum length of each material A and B, the two ends of each material A and B are overlapped by 5-15 micrometers, the graphene film materials A and B are used as two-dimensional source and drain electrodes of a transistor, and the hafnium disulfide film exposed in the middle is a semiconductor conducting channel;
and 3, step 3: preparation of source and drain metal electrode
C1: fixed mask
Fixing a stainless steel mask on a hafnium disulfide film of a target substrate by using a two-dimensional material transfer system, wherein the hafnium disulfide film is completely covered by the mask part of the mask and two sides of the hafnium disulfide film are exposed out of a graphene film material A and a graphene film material B;
c2: metal source and drain electrodes evaporated
Performing gold evaporation on the graphene film material A and the graphene film material B by using a stainless steel mask plate by adopting a conventional vacuum thermal evaporation method to obtain gold with the thickness of 50nm as a source and drain metal electrode; manufacturing the two-dimensional thin film transistor;
in step 3, the current of the gold evaporation plating is 80-90A, and the speed is 0.1-0.12nm/s.
2. The two-dimensional thin film transistor with the source electrode and the drain electrode made of the graphene according to the method of claim 1 is characterized in that the thickness of a hafnium disulfide semiconductor layer of the two-dimensional thin film transistor is 10-15nm, the thickness of a graphene layer is 5-10nm, the length of a transistor channel is 15-200 μm, and the thickness of a gold electrode is 50 nm.
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