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CN112323132B - PCB electroplating control method, device, equipment and storage medium - Google Patents

PCB electroplating control method, device, equipment and storage medium Download PDF

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Publication number
CN112323132B
CN112323132B CN202011133602.6A CN202011133602A CN112323132B CN 112323132 B CN112323132 B CN 112323132B CN 202011133602 A CN202011133602 A CN 202011133602A CN 112323132 B CN112323132 B CN 112323132B
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grid
pcb
electroplating
grids
area
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CN112323132A (en
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罗畅
刘湘龙
余德源
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Shenzhen Fastprint Circuit Tech Co Ltd
Guangzhou Fastprint Circuit Technology Co Ltd
Yixing Silicon Valley Electronic Technology Co Ltd
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Shenzhen Fastprint Circuit Tech Co Ltd
Guangzhou Fastprint Circuit Technology Co Ltd
Yixing Silicon Valley Electronic Technology Co Ltd
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    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D21/00—Processes for servicing or operating cells for electrolytic coating
    • C25D21/12—Process control or regulation
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/188—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Automation & Control Theory (AREA)
  • Electroplating Methods And Accessories (AREA)

Abstract

The invention discloses a PCB electroplating control method, a device, equipment and a storage medium. The PCB electroplating control method comprises the following steps: acquiring relevant parameters of electroplating areas corresponding to a plurality of first grids of the PCB; and controlling the electrifying area of a second grid of the electroplating anode corresponding to the first grid according to the electroplating area related parameters so as to carry out electroplating control on the PCB. According to the embodiment of the invention, the electrifying area of the electroplating anode is controlled according to the relevant parameters of the electroplating areas of the first grids of the PCB, so that different electroplating treatments are carried out on different areas of the PCB, thereby reducing the difference between the thickness of the electroplated copper in the dense hole area of the PCB and the thickness of the electroplated copper in the isolated hole area of the PCB, or the difference between the thickness of the electroplated copper in the dense hole area of the PCB and the thickness of the electroplated copper on the copper skin of the PCB, and improving the electroplating accuracy of the PCB.

Description

PCB electroplating control method, device, equipment and storage medium
Technical Field
The invention relates to the field of PCB electroplating, in particular to a PCB electroplating control method, a device, equipment and a storage medium.
Background
At present, in the electroplating process of a PCB, the problem that the thickness of a plating layer of a PCB dense hole and the thickness of a plating layer of a PCB isolated hole or the difference between the thickness of the plating layer of the PCB dense hole and the thickness of the plating layer of a PCB large copper sheet is overlarge is easily caused.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art. Therefore, the invention provides a PCB electroplating control method, a device, equipment and a storage medium, which can reduce the difference of the thickness of electroplated copper and improve the electroplating accuracy.
In a first aspect, an embodiment of the present invention provides a PCB plating control method, including: acquiring relevant parameters of electroplating areas corresponding to a plurality of first grids of the PCB; and controlling the electrifying area of a second grid of the electroplating anode corresponding to the first grid according to the electroplating area related parameters so as to carry out electroplating control on the PCB.
The PCB electroplating control method provided by the embodiment of the invention at least has the following beneficial effects: the electrifying area of the second grid corresponding to the first grid is controlled through the relevant parameters of the electroplating area of the first grid so as to carry out different electroplating treatments on different areas of the PCB, and the current density of each area of the PCB tends to be the same, thereby reducing the difference between the thickness of the electroplated copper in the dense hole area of the PCB and the thickness of the electroplated copper in the isolated hole area of the PCB, or the difference between the thickness of the electroplated copper in the dense hole area of the PCB and the thickness of the electroplated copper on the copper skin of the PCB, and improving the electroplating accuracy of the PCB.
According to another embodiment of the present invention, before obtaining parameters related to plating areas corresponding to a plurality of first grids of a PCB, the method further includes: performing segmentation processing on the PCB according to a first segmentation parameter so as to segment the PCB into a plurality of first grids; carrying out segmentation processing on the electroplating anode according to second segmentation parameters so as to segment the electroplating anode into a plurality of second sub-grids; and the second sub-grids adjacent to each other form the second grid, the first division parameter is N times of the second division parameter, and N is a positive integer greater than or equal to 2.
According to another embodiment of the present invention, the method for controlling electroplating of a PCB includes the steps of: acquiring actual surface areas of a plurality of the first grids; obtaining a non-porous surface area of a plurality of said first cells; obtaining the parameters related to the electroplating areas of the first grids according to the actual surface area and the non-porous surface area.
According to another embodiment of the present invention, the method for controlling electroplating of a PCB, wherein the controlling of the current-carrying area of a second grid of the electroplating positive electrode corresponding to the first grid according to the electroplating area related parameter includes: obtaining the calibration state of the first grid according to the relevant parameters of the electroplating area; and controlling the power-on area of the second grid corresponding to the first grid according to the calibration state.
According to other embodiments of the present invention, the calibration status includes: the calibration method comprises the following steps of (1) a first calibration state, a second calibration state and a third calibration state; the obtaining of the calibration state of the first grid according to the relevant parameters of the electroplating area comprises: calibrating the first grid with the electroplating area related parameter in a first threshold value range as the first calibration state; calibrating the first grid with the electroplating area related parameter in a second threshold value range as the second calibration state; and calibrating the first grid with the electroplating area related parameter in a third threshold value range as the third calibration state.
According to another embodiment of the present invention, the method for controlling PCB plating according to the calibration status includes: controlling the second grid corresponding to the first grid in the first calibration state to carry out power-on operation according to a first power-on rule; controlling the second grid corresponding to the first grid in the second calibration state to carry out power-on operation according to a second power-on rule; controlling the second grid corresponding to the first grid in the third calibration state to be electrified according to a third electrification rule; wherein the first power-on rule is that half of the second sub-grids in the second grid are powered on, the second power-on rule is that 3/4 of the second sub-grids in the second grid are powered on, and the third power-on rule is that all the second sub-grids in the second grid are powered on.
According to the PCB plating control method of the other embodiments of the present invention, a plurality of the second sub-grids are connected with a plurality of switches; the controlling, according to a first power-on rule, the second grid corresponding to the first grid in the first calibration state to perform a power-on operation includes: controlling the switch of the corresponding second sub-grid to be conducted according to the first calibration state and the first power-on rule; controlling the second grid corresponding to the first grid in the second calibration state to perform power-on operation according to a second power-on rule, wherein the method comprises the following steps: controlling the switch of the corresponding second sub-grid to be switched on according to the second calibration state and the second power-on rule; controlling the second grid corresponding to the first grid in the third calibration state to perform power-on operation according to a third power-on rule, comprising: and controlling the switch of the corresponding second sub-grid to be switched on according to the third calibration state and the third power-on rule.
In a second aspect, an embodiment of the present invention provides a PCB plating control apparatus, including: the cutting module is used for cutting the PCB into a plurality of first grids according to the first cutting parameters and cutting the electroplating anode into a plurality of second sub-grids according to the second cutting parameters; wherein a plurality of adjacent second sub-grids form a second grid; an electroplating area related parameter obtaining module connected to the dividing module, configured to obtain actual surface areas of the plurality of first grids and non-porous surface areas of the first grids, and obtain the electroplating area related parameter of the first grid according to the actual surface areas and the non-porous surface areas; and the electrifying area control module is connected with the electroplating area related parameter acquisition module and used for acquiring the calibration states of the first grids according to the electroplating area related parameters and controlling the electrifying area of the second grid according to the calibration states.
In a third aspect, an embodiment of the present invention provides a PCB plating control apparatus including: at least one processor, and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions for execution by the at least one processor to cause the at least one processor to implement the method of PCB plating control according to the first aspect when executing the instructions.
In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium storing computer-executable instructions for causing a computer to perform the PCB plating control method according to the first aspect.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the application. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
FIG. 1 is a schematic diagram of an embodiment of a PCB hole distribution in an embodiment of the invention;
FIG. 2 is a flow chart illustrating an embodiment of a PCB plating control method according to the present invention;
FIG. 3 is a flow chart illustrating another exemplary embodiment of a PCB plating control method according to the present invention;
FIG. 4 is a schematic diagram of one embodiment of PCB splitting in an embodiment of the present invention;
FIG. 5 is a schematic diagram of one embodiment of a split of the plated anode and a second grid current-carrying area in accordance with an embodiment of the present invention;
FIG. 6 is a flow chart illustrating another exemplary embodiment of a PCB plating control method according to the present invention;
FIG. 7 is a schematic structural diagram of an embodiment of a first grid in accordance with the present invention;
FIG. 8 is a flow chart illustrating another exemplary embodiment of a PCB plating control method according to the present invention;
FIG. 9 is a flow chart illustrating another exemplary embodiment of a PCB plating control method according to the present invention;
FIG. 10 is a schematic diagram of an embodiment of a first grid calibration state in accordance with the present invention;
FIG. 11 is a flow chart illustrating another exemplary embodiment of a PCB plating control method according to the present invention;
FIG. 12 is a flow chart illustrating another exemplary embodiment of a PCB plating control method according to the present invention;
fig. 13 is a block diagram of an embodiment of a PCB plating control apparatus according to an embodiment of the present invention.
Reference numerals:
the device comprises a segmentation module 100, an electroplating area related parameter acquisition module 200 and a power-on area control module 300.
Detailed Description
The concept and technical effects of the present invention will be clearly and completely described below in conjunction with the embodiments to fully understand the objects, features and effects of the present invention. It is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments, and those skilled in the art can obtain other embodiments without inventive effort based on the embodiments of the present invention, and all embodiments are within the protection scope of the present invention.
In the description of the embodiments of the present invention, if "a number" is referred to, it means one or more, if "a plurality" is referred to, it means two or more, if "greater than", "less than" or "more than" is referred to, it is understood that the number is not included, and if "greater than", "lower" or "inner" is referred to, it is understood that the number is included. If reference is made to "first" or "second", this should be understood to distinguish between features and not to indicate or imply relative importance or to implicitly indicate the number of indicated features or to implicitly indicate the precedence of the indicated features.
Referring to fig. 1, the current problem that the plating thickness of the dense hole region of the PCB and the plating thickness of the isolated hole region of the PCB are too different or the plating thickness of the dense hole region of the PCB and the plating thickness of the large copper skin (surface of the PCB) of the PCB are too large is easily caused by uneven distribution of holes on the PCB.
In some embodiments, the electroplated copper thickness T ═ jxt, where J is the current density and T is the electroplating duration. And the current density J is I/S, wherein I is the electroplating current, and S is the electroplating surface area. In the related electroplating method, the area of the electroplating anode is fixed, so that the area of the electroplating anode opposite to the PCB in unit size is the same, namely I is the same. When there is a difference in surface area per unit size of PCB (including PCB surface area and PCB hole internal area), J is caused to vary, thereby causing a difference in plated copper thickness per unit size of PCB.
Based on the method, the device, the equipment and the storage medium, the plating thickness of the dense hole area of the PCB and the plating thickness of the isolated hole area of the PCB can be reduced, or the difference between the plating thickness of the dense hole area of the PCB and the plating thickness of the large copper skin (PCB surface) of the PCB can be reduced, so that the accuracy of electroplating is improved.
It should be noted that, in the embodiment of the present application, both the large copper sheet of the PCB and the surface of the PCB refer to the surface of the PCB.
In a first aspect, an embodiment of the present application provides a method for controlling electroplating of a PCB.
Referring to fig. 2, in some embodiments, a PCB plating control method includes the steps of: s1000, obtaining relevant parameters of electroplating areas corresponding to a plurality of first grids of the PCB; s2000, controlling the electrifying area of the second grid of the electroplating anode corresponding to the first grid according to the electroplating area related parameters.
In step S1000, a specific implementation manner of obtaining relevant parameters of the plating areas corresponding to the plurality of first grids of the PCB is as follows: the PCB comprises a plurality of first grids, and relevant parameters of electroplating areas corresponding to the first grids are obtained through methods such as measurement and calculation so as to represent the hole containing conditions of the first grids in different areas and the areas needing electroplating. It will be appreciated that the plurality of first meshes cover different areas of the PCB, and thus the plurality of first meshes includes: a dense aperture region of the PCB and an isolated aperture region of the PCB.
Step S2000, a specific implementation manner of controlling the energization area of the second grid of the plating anode corresponding to the first grid according to the plating area related parameter is as follows: the electroplating positive electrode comprises a plurality of second grids, the second grids are arranged corresponding to the first grids, and the second grids are mutually insulated. And controlling the electrifying area of the second grid corresponding to the first grid according to the electroplating area related parameter, for example, controlling the second grid to be electrified or not electrified according to the electroplating area related parameter so as to change the whole area of the electroplating anode corresponding to the first grid. Different electroplating treatments are carried out according to the hole containing conditions of different first grid areas, so that the difference between the thickness of the electroplated copper in the dense hole area of the PCB and the thickness of the electroplated copper in the isolated hole area of the PCB or the difference between the thickness of the electroplated copper in the dense hole area of the PCB and the thickness of the electroplated copper on the copper skin of the PCB is reduced.
According to the PCB electroplating control method provided by the first aspect, the electrifying area of the second grid corresponding to the first grid is controlled through the relevant parameters of the electroplating area of the first grid, so that different electroplating treatments are carried out on different areas of the PCB, the current density of each area of the PCB tends to be the same, the difference between the thickness of the electroplated copper in the dense hole area of the PCB and the thickness of the electroplated copper in the isolated hole area of the PCB or the difference between the thickness of the electroplated copper in the dense hole area of the PCB and the thickness of the electroplated copper on the copper skin of the PCB is reduced, and the accuracy of PCB electroplating is improved.
Referring to fig. 3, in some embodiments, before step S1000, further includes: s3000, carrying out segmentation processing on the PCB according to the first segmentation parameters so as to segment the PCB into a plurality of first grids; and S4000, carrying out segmentation processing on the electroplating anode according to the second segmentation parameters so as to segment the electroplating anode into a plurality of second sub-grids.
In step S3000, the PCB is divided according to the first division parameter, and a specific implementation manner of dividing the PCB into a plurality of first grids is as follows: referring to fig. 4, in the engineering material, the PCB is subjected to a division process according to a first division parameter, for example, the PCB is subjected to a mesh division according to a size L to divide the PCB into a plurality of first meshes. It can be understood that the value range of the dimension L may be any one of 0.5inch to 2inch, and may also be adaptively adjusted according to actual needs.
Step S4000, performing a segmentation process on the electroplating anode according to the second segmentation parameter, so as to segment the electroplating anode into a plurality of second sub-grids, according to a specific embodiment: referring to fig. 5, the plating positive electrode is divided according to the second division parameter to divide the plating positive electrode into a plurality of second sub-grids. And the adjacent second sub-grids form a second grid, the first division is N times of a second division parameter, and N is a positive integer greater than or equal to 2. For example, the second segmentation parameter is L/2, i.e. the first segmentation parameter is twice the second segmentation parameter. And setting four adjacent second sub-grids after segmentation as one second grid. Each first grid is provided with a second grid opposite to the first grid, and the size of each second grid is L, so that the areas of the electroplating anodes opposite to the first grids in the initial state are the same, namely the areas of the second grids opposite to the first grids are the same. It can be understood that the second segmentation parameter and the number of the second sub-grids included in the second grid may be adaptively adjusted according to actual needs, but it should be ensured that the grid size of the second grid is the same as the grid size of the first grid, so that the first grid and the second grid are correspondingly arranged.
Referring to fig. 6, in some embodiments, step S1000 includes: s1100, acquiring actual surface areas of a plurality of first grids; s1200, obtaining the non-porous surface areas of the first grids; s1300, obtaining relevant parameters of the electroplating areas of the first grids according to the actual surface area and the non-porous surface area.
In step S1100, a specific implementation of obtaining the actual surface areas of the plurality of first grids is as follows: and acquiring the surface area of the first grid and the surface area in the holes contained in the first grid to obtain actual surface areas Sa corresponding to the first grids.
Step S1200, a specific implementation of obtaining the non-porous surface areas of the first grids is as follows: and calculating to obtain the non-porous surface area Sb of the first grid according to the grid size L of the first grid or the hole center distance D of the first grid.
Step S1300, a specific implementation of obtaining the parameters related to the plating areas of the plurality of first grids according to the actual surface area and the non-porous surface area is as follows: obtaining a parameter a related to the electroplating area of the first grid according to the actual surface area Sa and the non-porous surface area Sb of the first gridn＝Sa/Sb。
Referring to fig. 7, in some specific embodiments, the parameters related to the plating areas corresponding to the first grids of the PCB are specifically described by taking fig. 7 as an example. Figure 7 shows any one of several first grids,100 × 100 holes are uniformly distributed in the first grid, the thickness H of the PCB is 3.0mm, the diameter R of the holes is 0.15mm, and the center distance D of the holes is 0.8 mm. According to the data, the following can be calculated: the wall area of the single hole is S1 ═ pi × R × H ═ 1.413m2The area of the single hole reduced copper area (PCB surface area) S2 ═ pi × (R/H) × (0.01766 m2And the nonporous surface area Sb of the first grid is (D × 100) × (D × 100) ═ 6400m2Actual surface area Sa ═ Sb + ((S1-S2)/2) × 100 × 100 ═ 13376.6m2So that the plating area of the first grid is related to the parameter anSa/Sb 2.1. It is understood that, the embodiment of the present application is specifically described by taking the first grid including the holes uniformly distributed as an example, and in practical applications, the calculation manner of the actual surface areas of the plurality of first grids may be adjusted according to the distribution of the holes of the PCB. Referring to fig. 4, a parameter related to the plating area of the first grids of the PCB of fig. 1 is obtained according to the above calculation method.
Referring to fig. 8, in some embodiments, step S2000 includes: s2100, obtaining a calibration state of the first grid according to the relevant parameters of the electroplating area; s2200, controlling the power-on area of the second grid corresponding to the first grid according to the calibration state.
In step S2100, a specific implementation manner of obtaining the calibration state of the first grid according to the relevant parameters of the plating area is as follows: and acquiring the calibration state of each first grid according to the relevant parameters of the electroplating areas of the multiple first grids of the PCB shown in the figure 4 so as to represent the hole-containing condition of each area of the PCB.
Step S2200, a specific embodiment of controlling the energization area of the second grid corresponding to the first grid according to the calibration state is: and controlling the power-on area of a second grid corresponding to the first grid according to the calibration state of the first grid, namely controlling the second grid which is arranged opposite to the first grid to be powered on or powered off so as to control the area of the second grid which is arranged opposite to the first grid. According to the principle of the nearest distance of PCB electroplating, the surface electrons of the PCB and copper ions generated by the electroplating anode nearest to the surface electrons of the PCB are subjected to reduction reaction so as to realize electroplating operation. Therefore, the area of the electroplating anode corresponding to the first grid is changed, namely the quantity of the copper ions obtained by the first grid is changed, so that the electroplating densities of the multiple first grids of the PCB tend to be the same, different electroplating treatments are carried out on the multiple first grids, and the difference of the thickness of the electroplated copper in each area of the PCB is reduced.
Referring to fig. 9, in some embodiments, step S2100 includes: s2110, calibrating a first grid of which the electroplating area related parameter is in a first threshold value range to be in a first calibration state; s2120, calibrating the first grid with the electroplating area related parameter in the second threshold range to be in a second calibration state; s2130, calibrating the first grid with the electroplating area related parameters within the third threshold range to be in a third calibration state.
Specifically, the calibration state includes: a first calibration state a, a second calibration state b and a third calibration state c. Referring to fig. 10, in some embodiments, a first grid in which the plating area related parameter satisfies a first threshold range is designated as a first designated state a, a first grid in which the plating area related parameter satisfies a second threshold range is designated as a second designated state b, and a first grid in which the plating area related parameter satisfies a third threshold range is designated as a third designated state c. In some embodiments, the first threshold range is a plating area related parameter anLess than 1.5, the second threshold value range is that the relevant parameter of the electroplating area is more than or equal to 1.5 and anLess than or equal to 2.0, and the third threshold value range is the electroplating area related parameter anIs greater than 2.0. The plurality of first grids shown in fig. 4 are calibrated according to the threshold value ranges to obtain calibration states of the plurality of first grids shown in fig. 10. It can be understood that specific values of the first threshold range, the second threshold range, and the third threshold range may be adaptively adjusted according to actual needs.
Referring to fig. 11, in some embodiments, step S2200 includes: s2210, controlling a second grid corresponding to the first grid in the first calibration state to perform electrifying operation according to a first electrifying rule; s2220, controlling a second grid corresponding to the first grid in the second calibration state to be electrified according to a second electrification rule; and S2230, controlling a second grid corresponding to the first grid in the third calibration state to perform power-on operation according to the third power-on rule.
Specifically, referring to fig. 5, the on-state areas of a plurality of second grids corresponding to the calibration states of the plurality of first grids of the PCB shown in fig. 10 are shown, wherein the shaded second sub-grids indicate on-state and the unshaded second sub-grids indicate off-state. For example, the electroplating anode is divided according to a second division parameter L/2 to obtain a plurality of second sub-grids, and four adjacent second sub-grids are set as one second grid, and each second grid is set corresponding to each first grid. In some specific embodiments, the first energization rule energizes half of the second subgrids in the second grid, the second energization rule energizes 3/4 grids in the second grid, and the third energization rule energizes all of the second subgrids in the second grid. And controlling the second grid corresponding to the first grid in the first calibration state to perform power-on operation according to a first power-on rule, namely controlling two second sub-grids diagonally arranged in the second grid corresponding to the first grid to perform power-on. And controlling the second grid corresponding to the first grid in the second calibration state to perform power-on operation according to a second power-on rule, namely controlling any three second sub-grids in the second grid corresponding to the first grid to perform power-on and power-on. And controlling the second grid corresponding to the first grid in the third calibration state to perform power-on operation according to a third power-on rule, namely controlling all second sub-grids in the second grid corresponding to the first grid to perform power-on and power-on. Referring to fig. 5, power-on areas of a plurality of second meshes corresponding to the plurality of first meshes shown in fig. 10, wherein the shaded second sub-meshes indicate on-power and the unshaded second sub-meshes indicate off-power. It can be understood that the first power-on rule, the second power-on rule and the third power-on rule all specify the number of conducting power of the second sub-grid in the second grid, and therefore the number of conducting power of the second sub-grid expressed in the first power-on rule, the second power-on rule and the third power-on rule can be adaptively adjusted according to actual needs. The electrified area of the second grid is controlled through the calibration state of the first grid, so that the area of the electroplating anode right opposite to the first grid is adjusted according to the calibration state, the current density of different areas of the PCB is changed, and the thickness difference of the electroplated copper of different areas of the PCB is reduced.
Referring to fig. 12, in some embodiments, step S2210 includes: s2211, controlling the corresponding switch of the second sub-grid to be conducted according to the first calibration state and the first power-on rule; step S2220 includes: s2221, controlling the switch of the corresponding second sub-grid to be switched on according to the second calibration state and the second power-on rule; step S2230 includes: and S2231, controlling the switch of the corresponding second sub-grid to be switched on according to the third calibration state and the third power-on rule.
In particular, the plurality of second subgrids are connected with the plurality of switches, enabling the plurality of second subgrids to be individually controlled. And controlling the conduction state of the switch of the second sub-grid corresponding to the first grid according to the calibration state of the first grid so as to change the area of the second grid corresponding to the first grid, so that the current densities of different areas of the PCB tend to be the same. In some specific embodiments, the switch is a relay. And controlling the second sub-grids in the second grids to be conducted according to a first power-on rule, namely conducting relays of two second sub-grids diagonally arranged in the second grids, wherein the second grids are in a first calibration state just facing the arranged first grids. And controlling the second sub-grids in the second grid to be conducted according to a second power-on rule, namely conducting the relays of 3/4 second sub-grids in the second grid, wherein the first grid which is just opposite to the second grid is in a second calibration state. And controlling the second sub-grid in the second grid to be conducted according to a third electrification rule, namely controlling all relays of the second sub-grid in the second grid to be conducted, wherein the first grid which is just opposite to the second grid is in a third calibration state. It can be understood that the on-state of the switch may be controlled by a PLC or other controller, and the switch may also be another switching device such as a triode and a MOS transistor, which is not limited in this embodiment.
In a specific implementation, the PCB is subjected to a segmentation process according to a first segmentation parameter L so as to be segmented into a plurality of first grids; and carrying out segmentation treatment on the electroplating anode according to a second segmentation parameter L/2 so as to segment the electroplating anode into a plurality of second sub-grids, and setting four adjacent second sub-grids as one second grid. Obtaining relevant parameters of the electroplating areas of the first grids by obtaining the actual surface areas and the non-porous surface areas of the first grids, and calibrating the first grids to be in any one of the following calibration states according to the relevant parameters of the electroplating areas: a first calibration state a, a second calibration state b and a third calibration state c. According to the calibration state of the first grid, the PLC controls the conduction state of a second sub-grid switch in a second grid corresponding to the first grid, so that the second grid executes any one of the following power-on rules according to the calibration state of the first grid: the first electrification rule, the second electrification rule and the third electrification rule are used for changing the area of the electroplating anode opposite to different areas of the PCB, so that the current density of different areas of the PCB is changed, the difference between the thickness of the electroplated copper in the dense hole area of the PCB and the thickness of the electroplated copper in the isolated hole area of the PCB is reduced, or the difference between the thickness of the electroplated copper in the dense hole area of the PCB and the thickness of the electroplated copper on the copper skin of the PCB is reduced, and the electroplating accuracy of the PCB is improved.
In a second aspect, embodiments of the present application provide a PCB electroplating control apparatus.
Referring to fig. 13, in some embodiments, a PCB plating control apparatus includes: the device comprises a segmentation module 100, an electroplating area related parameter acquisition module 200 and a power-on area control module 300. The dividing module 100 is configured to divide the PCB into a plurality of first grids according to the dividing parameters, and divide the plating anode into a plurality of second sub-grids according to the second dividing parameters, where the second grids are formed by the adjacent second sub-grids. The plating area related parameter obtaining module 200 is connected to the dividing module 100, and is configured to obtain actual surface areas of the plurality of first grids and non-porous surface areas of the plurality of first grids, and obtain plating area related parameters of the plurality of first grids according to the actual surface areas and the non-porous surface areas. The energization area control module 300 is connected to the plating area related parameter obtaining module 200, and is configured to obtain calibration states of the plurality of first grids according to the plating area related parameters, and control the energization area of the second grid according to the calibration states.
Specifically, one end of the plating area related parameter acquiring module 200 is connected to the dividing module 100, and the other end of the plating area related parameter acquiring module 200 is connected to the energization area control module 300. The dividing module 100 divides the PCB according to the first division parameter, and divides the plating anode according to the second division parameter, so as to divide the PCB into a plurality of first meshes and divide the plating anode into a plurality of second sub-meshes. The plating area related parameter obtaining module 200 obtains the plating area related parameters of the plurality of first grids by obtaining the actual surface areas and the non-porous surface areas of the plurality of first grids, and calibrates the plurality of first grids to any one of the following calibration states according to different plating area related parameters: a first calibration state a, a second calibration state b and a third calibration state c. The conduction state of the corresponding second sub-grid switch is controlled by the power-on area control module 300 according to the calibration state of the first grid, so that the area of the first grid, which is just opposite to the electroplating anode, is changed by the power-on area control module 300 according to the calibration state, the current density of different areas of the PCB is changed, the difference between the thickness of the electroplated copper in the dense hole area of the PCB and the thickness of the electroplated copper in the isolated hole area of the PCB is reduced, or the difference between the thickness of the electroplated copper in the dense hole area of the PCB and the thickness of the electroplated copper on the copper skin of the PCB is reduced, and the electroplating accuracy of the PCB is improved.
In a third aspect, the embodiment of the application provides a PCB electroplating control device.
The PCB plating control apparatus includes: the system includes at least one processor, and a memory communicatively coupled to the at least one processor. Wherein the memory stores instructions that are executed by the at least one processor to cause the at least one processor to implement the PCB electroplating control method according to the first aspect when executing the instructions.
In a fourth aspect, embodiments of the present application provide a computer-readable storage medium storing computer-executable instructions for: the PCB plating control method of the first aspect is performed.
The above-described embodiments of the apparatus are merely illustrative, wherein the units illustrated as separate components may or may not be physically separate, i.e. may be located in one place, or may also be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment.
One of ordinary skill in the art will appreciate that all or some of the steps, systems, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present invention. Furthermore, the embodiments of the present invention and the features of the embodiments may be combined with each other without conflict.

Claims (8)

  1. The PCB electroplating control method is characterized by comprising the following steps:
    performing segmentation processing on the PCB according to a first segmentation parameter so as to segment the PCB into a plurality of first grids; wherein the first segmentation parameter comprises a side length of the first mesh;
    carrying out segmentation processing on the electroplating anode corresponding to the first grid according to second segmentation parameters so as to segment the electroplating anode into a plurality of second sub-grids; wherein a plurality of adjacent second submeshes make up the second grid; the second segmentation parameter comprises a side length of the second mesh;
    acquiring electroplating area related parameters corresponding to the first grids;
    controlling the electrifying area of the second grid according to the relevant parameters of the electroplating area so as to carry out electroplating control on the PCB;
    wherein, the obtaining of the relevant parameters of the electroplating areas corresponding to the first grids comprises:
    acquiring actual surface areas of a plurality of the first grids;
    obtaining a non-porous surface area of a plurality of said first cells;
    and acquiring the electroplating area related parameters of the first grids according to the ratio of the actual surface area to the non-porous surface area.
  2. 2. The PCB plating control method of claim 1,
    the first segmentation parameter is N times of the second segmentation parameter, and N is a positive integer greater than or equal to 2.
  3. 3. The PCB plating control method of claim 2, wherein the controlling the energizing area of the second grid according to the plating area related parameter comprises:
    obtaining the calibration state of the first grid according to the relevant parameters of the electroplating area;
    controlling the power-on area of the second grid corresponding to the first grid according to the calibration state;
    wherein the calibration state comprises: the calibration method comprises the following steps of (1) a first calibration state, a second calibration state and a third calibration state;
    the obtaining of the calibration state of the first grid according to the relevant parameters of the electroplating area comprises:
    calibrating the first grid with the electroplating area related parameter in a first threshold value range as the first calibration state;
    calibrating the first grid with the electroplating area related parameter in a second threshold value range as the second calibration state;
    and calibrating the first grid with the electroplating area related parameter in a third threshold value range as the third calibration state.
  4. 4. The PCB plating control method of claim 3, wherein the controlling the energizing area of the second grid corresponding to the first grid according to the calibration state comprises:
    controlling the second grid corresponding to the first grid in the first calibration state to carry out power-on operation according to a first power-on rule;
    controlling the second grid corresponding to the first grid in the second calibration state to carry out power-on operation according to a second power-on rule;
    controlling the second grid corresponding to the first grid in the third calibration state to be electrified according to a third electrification rule;
    wherein the first power-on rule is that half of the second sub-grids in the second grid are powered on, the second power-on rule is that 3/4 of the second sub-grids in the second grid are powered on, and the third power-on rule is that all the second sub-grids in the second grid are powered on.
  5. 5. The PCB plating control method of claim 4, wherein a plurality of the second subgrids are connected with a plurality of switches;
    the controlling, according to a first power-on rule, the second grid corresponding to the first grid in the first calibration state to perform a power-on operation includes: controlling the switch of the corresponding second sub-grid to be conducted according to the first calibration state and the first power-on rule;
    controlling the second grid corresponding to the first grid in the second calibration state to perform power-on operation according to a second power-on rule, wherein the method comprises the following steps: controlling the switch of the corresponding second sub-grid to be switched on according to the second calibration state and the second power-on rule;
    controlling the second grid corresponding to the first grid in the third calibration state to perform power-on operation according to a third power-on rule, comprising: and controlling the switch of the corresponding second sub-grid to be switched on according to the third calibration state and the third power-on rule.
  6. PCB electroplates controlling means, its characterized in that includes:
    the cutting module is used for cutting the PCB into a plurality of first grids according to the first cutting parameters and cutting the electroplating anode into a plurality of second sub-grids according to the second cutting parameters; wherein a plurality of adjacent second sub-grids form a second grid; the first segmentation parameter comprises a side length of the first grid, and the second segmentation parameter comprises a side length of the second grid;
    an electroplating area related parameter obtaining module connected with the dividing module and used for obtaining actual surface areas of the first grids and non-porous surface areas of the first grids and obtaining electroplating area related parameters of the first grids according to the ratio of the actual surface areas to the non-porous surface areas;
    and the electrifying area control module is connected with the electroplating area related parameter acquisition module and used for acquiring the calibration states of the first grids according to the electroplating area related parameters and controlling the electrifying area of the second grid according to the calibration states.
  7. PCB plating control equipment, characterized by, includes:
    at least one processor, and a memory communicatively coupled to the at least one processor;
    wherein the memory stores instructions for execution by the at least one processor to cause the at least one processor to implement the PCB plating control method of any of claims 1 to 5 when executing the instructions.
  8. 8. A computer-readable storage medium storing computer-executable instructions for causing a computer to perform the PCB plating control method according to any one of claims 1 to 5.
CN202011133602.6A 2020-10-21 2020-10-21 PCB electroplating control method, device, equipment and storage medium Active CN112323132B (en)

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Citations (2)

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Publication number Priority date Publication date Assignee Title
CN1506502A (en) * 2002-12-11 2004-06-23 国际商业机器公司 Method and equipment for controlling local electric current to obtain uniform electroplating thickness
CN108650796A (en) * 2018-04-04 2018-10-12 广州兴森快捷电路科技有限公司 Pcb board electro-plating method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1506502A (en) * 2002-12-11 2004-06-23 国际商业机器公司 Method and equipment for controlling local electric current to obtain uniform electroplating thickness
CN108650796A (en) * 2018-04-04 2018-10-12 广州兴森快捷电路科技有限公司 Pcb board electro-plating method

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