CN112259611B - Oxide semiconductor thin film transistor and method for manufacturing the same - Google Patents

Abstract

An oxide semiconductor thin film transistor comprises a substrate, a gate, a gate insulating layer, an oxide semiconductor layer and a source-drain metal layer sequentially arranged on the substrate, the source-drain metal layer comprises a source and a drain arranged at intervals, the oxide semiconductor layer comprises a first oxide layer and a second oxide layer stacked on the first oxide layer, the oxygen content of the first oxide layer is lower than that of the second oxide layer; part of the first oxide layer is exposed from both sides of the second oxide layer, the source and the drain are spaced from each other and are directly contacted and connected with the first oxide layer exposed from both sides of the second oxide layer, so that the source and the drain form a good ohmic contact with the oxide semiconductor layer, effectively improving the on-state current of the thin film transistor and optimizing the comprehensive performance of the thin film transistor. The present invention also relates to a method for manufacturing an oxide semiconductor thin film transistor.

Description

Oxide semiconductor thin film transistor and method for manufacturing the same

Technical Field

The present invention relates to the technical field of thin film transistors, and in particular to an oxide semiconductor thin film transistor and a manufacturing method thereof.

Background Art

At present, the switching elements used in displays are still amorphous silicon (a-Si) thin film transistors and polycrystalline silicon (p-Si) thin film transistors. Among them, amorphous silicon thin film transistors are the most widely used, but amorphous silicon thin film transistors have problems such as low electron mobility (only 0.3~ ^1cm2 /V·s) and poor light stability. Although polycrystalline silicon thin film transistors are much higher than amorphous silicon thin film transistors in terms of electron mobility, they have problems such as complex structure, large leakage current, and poor film uniformity. With the rapid development of display technology, video formats have changed from standard definition to high definition to ultra-high definition, and the requirements for display resolution have gradually increased, which has put forward higher and higher requirements on the performance and size of thin film transistors. Amorphous silicon thin film transistors and polycrystalline silicon thin film transistors can no longer fully meet these requirements, and high-temperature manufacturing processes cannot produce larger display panels.

In recent years, amorphous oxide semiconductor thin film transistors (Amorphous Oxide Semiconductor Thin Film Transistor, AOS TFT) have attracted extensive attention in academia and industry due to their good electrical and optical properties. In particular, amorphous indium gallium zinc oxide thin film transistors (a-IGZO TFT) are considered to be the core components of active matrix organic light emitting diodes (AMOLED) and active matrix liquid crystal displays (AMLCD) drive circuits due to their high electron mobility (>10cm ² /V·s), low power consumption, simple process (no need for high temperature production), fast response speed, good uniformity over a large area, and high transmittance in the visible light range. They are also considered to be the most competitive backplane drive technology as displays develop towards large size, flexibility, and lightness.

For a thin film transistor with excellent performance, it is necessary to have a larger threshold voltage, a higher on-off current ratio, a smaller subthreshold swing, and higher stability. Generally speaking, the greater the field effect mobility of the thin film transistor, the faster the pixel storage capacitor charges, the smaller the leakage current of the thin film transistor, the faster the pixel storage capacitor discharges, the smaller the subthreshold swing of the thin film transistor, the faster the on-off state conversion of the thin film transistor, and the more power-saving. However, these put forward higher requirements on the characteristics of the oxide semiconductor layer, such as the structure, surface defect state, carrier concentration, and carrier mobility.

As shown in FIG1 , an existing oxide semiconductor thin film transistor includes a substrate 1, a gate 2, a gate insulating layer 3, an oxide semiconductor layer 4 and a source-drain electrode layer 5 arranged on the substrate 1 in sequence. Among them, the oxide semiconductor layer 4 generally adopts a single-layer structure. In the process of manufacturing the oxide semiconductor layer 4, the carrier concentration is adjusted by controlling the oxygen content of the oxide semiconductor layer 4, so that the oxide semiconductor layer 4 has different electron mobilities. However, the oxide semiconductor layers 4 with different oxygen contents have advantages and disadvantages. For example, the oxide semiconductor layer 4 with a lower oxygen content has a high electron mobility and a larger threshold voltage, but the off-state current is also larger; the oxide semiconductor layer 4 with a higher oxygen content has a lower electron mobility and a smaller off-state current, but the threshold voltage is correspondingly smaller. The non-single feature of the oxide semiconductor layer 4 with a single-layer structure limits the improvement of the comprehensive performance of the thin film transistor.

In order to improve the comprehensive performance of thin film transistors, the prior art also proposes another oxide semiconductor thin film transistor using a double stacked oxide channel layer (Double Stacked Channel Layers, DSCL), as shown in FIG2, that is, the oxide semiconductor layer 4 of the oxide semiconductor thin film transistor includes two layers, the first oxide layer 41 located in the lower front channel is a metal oxide with a lower oxygen content, and the second oxide layer 42 located in the upper back channel is a metal oxide with a higher oxygen content. The thin film transistor of this structure has the characteristics of high electron mobility, small off-state current, and small subthreshold swing. The comprehensive performance is greatly improved compared with the thin film transistor using a single-layer oxide semiconductor layer. However, in this structure, the back channel directly contacting the source and drain in the source-drain electrode layer 5 uses a high-oxygen metal oxide. Due to its high resistivity, it is difficult to form an ideal ohmic contact. The on-state current of the DSCL oxide semiconductor thin film transistor is still not ideal, which affects the comprehensive performance of the DSCL oxide semiconductor thin film transistor.

Summary of the invention

The object of the present invention is to provide an oxide semiconductor thin film transistor, which effectively improves the on-state current of the thin film transistor and optimizes the comprehensive performance of the thin film transistor.

An embodiment of the present invention provides an oxide semiconductor thin film transistor, comprising a substrate, a gate, a gate insulating layer, an oxide semiconductor layer and a source-drain metal layer arranged in sequence on the substrate, the source-drain metal layer comprising a source and a drain arranged at intervals, the oxide semiconductor layer comprising a first oxide layer and a second oxide layer stacked on the first oxide layer, the oxygen content of the first oxide layer is lower than that of the second oxide layer; a portion of the first oxide layer is exposed from both sides of the second oxide layer, the source and the drain are spaced apart from each other and are respectively in direct contact and connection with the first oxide layer exposed from both sides of the second oxide layer.

Furthermore, the oxygen content of the first oxide layer is 0% to 50%, and the oxygen content of the second oxide layer is 4% to 60%.

Further, a width M of the first oxide layer exposed from each side of the second oxide layer is 1 to 8 micrometers.

Furthermore, the source electrode covers the first oxide layer exposed from one side of the second oxide layer and extends toward the second oxide layer to cover part of the second oxide layer, and the drain electrode covers the first oxide layer exposed from the other side of the second oxide layer and extends toward the second oxide layer to cover part of the second oxide layer.

Furthermore, a width N of a stacking position of the source electrode and the second oxide layer and a width N of a stacking position of the drain electrode and the second oxide layer is greater than or equal to 1 micrometer.

Furthermore, the thickness D1 of the first oxide layer is 10 to 90 nanometers, and the thickness D2 of the second oxide layer is 10 to 90 nanometers.

Furthermore, the width X1 of the first oxide layer is 10-20 microns, the width X2 of the second oxide layer is 4-18 microns, the distance between the source and the drain is 2-8 microns, and the width M of the first oxide layer exposed from both sides of the second oxide layer is 1-8 microns.

Furthermore, materials of the first oxide layer and the second oxide layer are both metal oxides.

The present invention also provides a method for manufacturing the above-mentioned oxide semiconductor thin film transistor, comprising: providing a substrate, patterning a gate on the substrate. Forming a gate insulating layer on the substrate and covering the gate. Preparing a first metal oxide layer and a second metal oxide layer located on the first metal oxide layer in sequence on the gate insulating layer, and making the oxygen content of the formed first metal oxide layer less than that of the second metal oxide layer. Coating a layer of photoresist material on the second metal oxide layer and patterning it to form a photoresist layer; the photoresist layer comprises a first photoresist region and a second photoresist region, the second photoresist region corresponds to a region where the second oxide layer is formed, and the first photoresist region corresponds to a region where the first oxide layer is formed and the second oxide layer is removed; the height T1 of the second photoresist region is greater than the height T2 of the first photoresist region. Etching and removing the second metal oxide layer and the first metal oxide layer that are not covered by the photoresist layer to form a first oxide layer. Thinning the photoresist layer to completely remove the photoresist material in the first photoresist region. Under the covering protection of the second photoresist region, etching and removing the second metal oxide layer located in the first photoresist region to form a second oxide layer and making part of the first oxide layer exposed from both sides of the second oxide layer. removing the photoresist material in the second photoresist region; and forming a source electrode and a drain electrode.

Furthermore, the first metal oxide layer and the second metal oxide layer are sputtered using the same target material, and the oxygen-argon flow ratio of the first metal oxide layer entering the coating chamber during the sputtering process is x:y, wherein the range of x is 0 to 3, and the range of y is 5 to 20; the oxygen-argon flow ratio of the second metal oxide layer entering the coating chamber during the sputtering process is a:b, wherein the range of a is 3 to 10, and the range of b is 5 to 20; and x:y is less than a:b.

An embodiment of the present invention provides an oxide semiconductor thin film transistor and a manufacturing method, wherein the oxide semiconductor thin film transistor includes a substrate, a gate, a gate insulating layer, an oxide semiconductor layer and a source-drain metal layer arranged in sequence on the substrate, the source-drain metal layer includes a source and a drain arranged at intervals, the oxide semiconductor layer includes a first oxide layer and a second oxide layer stacked on the first oxide layer, the oxygen content of the first oxide layer is lower than that of the second oxide layer; a portion of the first oxide layer is exposed from both sides of the second oxide layer, the source and the drain are spaced apart and are directly contacted and connected with the first oxide layer exposed from both sides of the second oxide layer, respectively, so that the source and the drain form a good ohmic contact with the oxide semiconductor layer, which effectively improves the on-state current of the thin film transistor and optimizes the comprehensive performance of the thin film transistor.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of the structure of an existing oxide semiconductor thin film transistor.

FIG. 2 is a schematic diagram of the structure of another existing oxide semiconductor thin film transistor.

FIG. 3 is a schematic cross-sectional structure diagram of an oxide semiconductor thin film transistor according to a preferred embodiment of the present invention.

4A to 4H are cross-sectional schematic diagrams of the manufacturing process of an oxide semiconductor thin film transistor according to a preferred embodiment of the present invention.

FIG. 5 is a front view of a partial structure of an oxide semiconductor thin film transistor according to a preferred embodiment of the present invention.

DETAILED DESCRIPTION

In order to further explain the technical methods and effects adopted by the present invention to achieve the predetermined invention purpose, the specific implementation methods, structures, features and effects of the present invention are described in detail below in conjunction with the accompanying drawings and embodiments.

FIG3 is a schematic diagram of the cross-sectional structure of an oxide semiconductor thin film transistor according to a preferred embodiment of the present invention. Referring to FIG3 , the oxide semiconductor thin film transistor comprises a substrate 110, a gate 120, a gate insulating layer 130, an oxide semiconductor layer 140 and a source-drain metal layer 150 sequentially arranged on the substrate 110, the source-drain metal layer 150 comprising a source 151 and a drain 152 arranged at intervals, the oxide semiconductor layer 140 comprising a first oxide layer 141 and a second oxide layer 142 stacked on the first oxide layer 141, the oxygen content of the first oxide layer 141 being lower than that of the second oxide layer 142; a portion of the first oxide layer 141 is exposed from both sides of the second oxide layer 142, and the source 151 and the drain 152 are directly in contact and connected with the first oxide layer 141 exposed from both sides of the second oxide layer 142, respectively.

The oxide semiconductor layer 140 is a conductive channel (i.e., an active layer) that short-circuits the source electrode 151 and the drain electrode 152. In the present invention, by placing the second oxide layer 142 with a high oxygen content above the first oxide layer 141 with a low oxygen content and exposing the first oxide layer 141 from both sides of the second oxide layer 142 to contact the source electrode 151 and the drain electrode 152 respectively, a good ohmic contact is formed between the first oxide layer 141 and the source electrode 151 and the drain electrode 152, thereby effectively improving the on-state current of the thin film transistor and optimizing the overall performance of the thin film transistor.

Furthermore, the oxygen content of the first oxide layer 141 is 0% to 50%, and the oxygen content of the second oxide layer 142 is 4% to 60%.

The first oxide layer 141 and the second oxide layer 142 are prepared by magnetron sputtering, and the oxygen content of the first oxide layer 141 and the second oxide layer 142 can be controlled by adjusting the volume ratio (oxygen-argon flow ratio) of the oxygen (O ₂ ) flow rate and the argon (Ar) flow rate entering the coating chamber during preparation. Since the first oxide layer 141 has a lower oxygen content and more oxygen vacancies, the carrier concentration is higher than that of the second oxide layer 142, and the electron mobility is also higher.

Furthermore, a width M of the first oxide layer 141 exposed from each side of the second oxide layer 142 is 1 to 8 micrometers.

Furthermore, the source electrode 151 and the drain electrode 152 are also connected to the part of the second oxide layer 142 in a stacked manner to completely cover the first oxide layer 141. Specifically, the source electrode 151 covers the first oxide layer 141 exposed from one side of the second oxide layer 142 and extends toward the second oxide layer 142 to cover part of the second oxide layer 142, and the drain electrode 152 covers the first oxide layer 141 exposed from the other side of the second oxide layer 142 and extends toward the second oxide layer 142 to cover part of the second oxide layer 142, and part of the second oxide layer 142 is exposed from the middle of the source electrode 151 and the drain electrode 152.

4H , the width N of the stacking position of the source 151 and the second oxide layer 142 and the stacking position of the drain 152 and the second oxide layer 142 are both greater than or equal to 1 micron, and the widths of the stacking position of the source 151, the drain 152 and the second oxide layer 142 may be equal.

Furthermore, as shown in FIG. 4G , the thickness D1 of the first oxide layer 141 is 10 to 90 nanometers, and the thickness D2 of the second oxide layer 142 is 10 to 90 nanometers.

Furthermore, as shown in Figures 4G and 4H, the width X1 of the first oxide layer 141 is 10 to 20 microns, and the width X2 of the second oxide layer 142 is 4 to 18 microns; the distance between the source 151 and the drain 152 (i.e., the channel length) is 2 to 8 microns; the width M of the portion of the first oxide layer 141 exposed from both sides of the second oxide layer 142 is 1 to 8 microns.

Furthermore, the materials of the first oxide layer 141 and the second oxide layer 142 are both metal oxides, such as indium gallium zinc oxide (IGZO).

Indium gallium zinc oxide is a mixed oxide based on zinc oxide (ZnO) doped with indium (In) and gallium (Ga). The main function of indium and gallium as doping elements is to adjust the carrier concentration. The carriers of indium gallium zinc oxide are mainly generated through oxygen vacancies (Oxygen Vacancy, OV). Under specific external conditions, metal oxides will cause oxygen in the lattice to be separated, leading to oxygen deficiency and forming oxygen vacancies. The more oxygen vacancies there are, the higher the carrier concentration, and vice versa. Therefore, controlling the oxygen content can adjust the carrier concentration so that the oxide semiconductor layer 140 has different electron mobility.

The oxide semiconductor thin film transistor of the present invention adopts an oxide semiconductor layer 140 with a double-layer structure having a first oxide layer 141 and a second oxide layer 142. By exposing the first oxide layer 141 with a lower oxygen content from both sides of the second oxide layer 142 with a higher oxygen content to contact and connect with the source 151 and the drain 152 respectively, a good ohmic contact is formed between the oxide semiconductor layer 140 and the source 151 and the drain 152, thereby increasing the on-state current of the thin film transistor and further improving the overall performance of the thin film transistor.

4A to 4H are cross-sectional schematic diagrams of the manufacturing process of the oxide semiconductor thin film transistor of the preferred embodiment of the present invention, please refer to them in sequence, the oxide semiconductor thin film transistor adopts grayscale mask (Half-tone Mask) exposure and dry etching technology, and can realize the above-mentioned special shape DSCL structure. Specifically, the manufacturing method of the oxide semiconductor thin film transistor includes:

As shown in FIG. 4A , a substrate 110 is provided, and a gate 120 is patterned on the substrate 110 . The method for forming the gate 120 is a well-known existing technology and will not be described in detail herein.

As shown in FIG4B , a gate insulating layer 130 is formed on the substrate 110 and covers the gate 120, and then two metal oxide layers are sequentially prepared on the gate insulating layer 130, the two metal oxide layers including a first metal oxide layer 141a directly in contact with the gate insulating layer 130 and a second metal oxide layer 142a located on the first metal oxide layer 141a, and the oxygen content of the formed first metal oxide layer 141a is less than that of the second metal oxide layer 142a. The first metal oxide layer 141a is used to form the first oxide layer 141 of the oxide semiconductor layer 140, and the second metal oxide layer 142a is used to form the second oxide layer 142 of the oxide semiconductor layer 140.

Specifically, the first metal oxide layer 141a and the second metal oxide layer 142a are sequentially prepared by magnetron sputtering. In this embodiment, the same target material is used for sputtering. Taking indium gallium zinc oxide as an example, the target material is formed by mixing zinc oxide, indium oxide, and gallium oxide in a specific ratio.

The method for forming the first metal oxide layer 141a with an oxygen content less than that of the second metal oxide layer 142a includes: when depositing the first metal oxide layer 141a, the oxygen-argon flow ratio entering the coating chamber is x:y, wherein x ranges from 0 to 3, and y ranges from 5 to 20; when depositing the second metal oxide layer 142a, the oxygen-argon flow ratio entering the coating chamber is a:b, wherein a ranges from 3 to 10, and b ranges from 5 to 20; and x:y is less than a:b, that is, the oxygen-argon flow ratio when depositing the second metal oxide layer 141a is higher than that when depositing the first metal oxide layer 141a.

Taking x:y=0:10 as an example, for example, when depositing the first metal oxide layer 141a, the oxygen flow rate entering the coating chamber is 0 standard state milliliters per minute (SCCM), and the argon flow rate is 10 standard state milliliters per minute (SCCM). Taking a:b=2:10 as an example, for example, when depositing the second metal oxide layer 141a, the oxygen flow rate entering the coating chamber is 2 standard state milliliters per minute (SCCM), and the argon flow rate is 10 standard state milliliters per minute (SCCM).

The present invention uses magnetron sputtering to prepare the oxide semiconductor layer 140. The material of the oxide semiconductor layer 140 is indium gallium zinc oxide. The growth and post-processing temperature below 350°C allows indium gallium zinc oxide to be grown on a glass substrate on a large scale by magnetron sputtering. Therefore, the structure of the oxide semiconductor thin film transistor of the present invention can be used to prepare a large-sized display panel.

As shown in FIG4C , a layer of photoresist material is coated on the second metal oxide layer 142a, and the photoresist material is patterned by a photomask process to form a photoresist layer 200, wherein the photoresist layer 200 includes a first photoresist region 201 and a second photoresist region 202, wherein the second photoresist region 202 corresponds to a region where the second oxide layer 142 is formed later, and the first photoresist region 201 corresponds to a region where the first oxide layer 141 is formed later, except for the region where the second oxide layer 142 is removed, that is, the region where the second oxide layer 142 is exposed from both sides of the first oxide layer 141. The height T1 of the second photoresist region 202 is greater than the height T2 of the first photoresist region 201. The photoresist material in other regions is completely removed.

Specifically, a half-tone mask or a gray-tone mask is used to half-expose the first photoresist region 201, wherein the half-tone mask is provided with a semi-transmissive film at the position of the first photoresist region 201, and the exposure energy of the photoresist on the first photoresist region 201 is reduced by the semi-transmissive film; the gray-tone mask is provided with a plurality of closely spaced slits at the position of the first photoresist region 201, and the light diffraction of the slits reduces the exposure energy of the first photoresist region 201. Taking positive photoresist as an example, during exposure, the photoresist of the second photoresist region 202 is not exposed, the photoresist of the first photoresist region 201 is half-exposed, and the photoresist of other regions is fully exposed, so that development is performed after exposure, so that in the photoresist layer 200 left after development, the photoresist thickness T2 of the first photoresist region 201 is less than the photoresist thickness T1 of the second photoresist region 202.

As shown in FIG4D , the second metal oxide layer 142a and the first metal oxide layer 141a that are not covered by the photoresist layer 200 are etched away. That is, the second metal oxide layer 142a and the first metal oxide layer 141a are etched with the photoresist layer 200 as a mask, and the second metal oxide layer 142a and the first metal oxide layer 141a that are not covered by the photoresist layer 200 are etched away in sequence, while the second metal oxide layer 142a and the first metal oxide layer 141a covered by the photoresist layer 200 are still retained after etching, wherein the retained first metal oxide layer 141a is the first oxide layer 141. This step can be performed by wet etching or dry etching.

As shown in FIG. 4E , the photoresist layer 200 is thinned to completely remove the photoresist material in the first photoresist region 201 .

Specifically, the photoresist material remaining in the first photoresist region 201 after the half exposure is completely removed to expose a portion of the second metal oxide layer 142a located in the first photoresist region 201. Although the photoresist thickness of the photoresist material in the second photoresist region 202 is also reduced in this step, since the photoresist thickness T1 of the second photoresist region 202 is much greater than the photoresist thickness T2 of the first photoresist region 201, a certain thickness of photoresist material will still remain on the first photoresist region 201. It should be pointed out here that the method for thinning the photoresist layer 200 includes a wet photoresist removal method (SPM process), a dry photoresist removal method, and an organic solvent cleaning method.

As shown in FIG4F , under the protection of the photoresist material in the second photoresist region 202, the second metal oxide layer 142a in the first photoresist region 201 is removed by etching to form the second oxide layer 142 and expose part of the first oxide layer 141 from both sides of the second oxide layer 142. This step is half etching (only the second metal oxide layer 142a in the first photoresist region 201 is removed), and the etching time needs to be precisely controlled, so dry etching is preferably used. The second metal oxide layer 142a that is not removed by etching is the second oxide layer 142.

As shown in FIG. 4G , the photoresist material of the second photoresist region 202 is completely removed. This step may be performed using the same method as the above-mentioned method for removing the photoresist material.

As shown in FIG3 , FIG4H and FIG5 , a source electrode 151 and a drain electrode 152 are formed. Specifically, the source electrode 151 and the drain electrode 152 are patterned and formed on the oxide semiconductor layer 140, and the source electrode 151 and the drain electrode 152 are spaced from each other; the source electrode 151 covers the first oxide layer 141 exposed from one side of the second oxide layer 142 and extends toward the second oxide layer 142 to cover part of the second oxide layer 142, and the drain electrode 152 covers the first oxide layer 141 exposed from the other side of the second oxide layer 142 and extends toward the second oxide layer 142 to cover part of the second oxide layer 142, and part of the second oxide layer 142 is exposed from the middle of the source electrode 151 and the drain electrode 152.

The oxide semiconductor thin film transistor provided by the present invention exposes the first oxide layer 141 located at the lower layer of the oxide semiconductor layer 140 with a double-layer channel from both sides of the second oxide layer 142 located at the upper layer to directly contact and connect with the source 151 and the drain 152 respectively, and the oxygen content of the first oxide layer 141 is lower than that of the second oxide layer 142, so that the source 151, the drain 152 and the oxide semiconductor layer 140 form a good ohmic contact, which effectively improves the on-state current of the thin film transistor and optimizes the comprehensive performance of the thin film transistor.

The above is only a preferred embodiment of the oxide semiconductor thin film transistor and the manufacturing method of the present invention, and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment as above, it is not used to limit the present invention. Any technician familiar with this profession can make some changes or modify the technical content disclosed above into an equivalent embodiment with equivalent changes without departing from the scope of the technical solution of the present invention. However, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention are still within the scope of the technical solution of the present invention.

Claims (9)

1. An oxide semiconductor thin film transistor, comprising a substrate (110), a gate electrode (120), a gate insulating layer (130), an oxide semiconductor layer (140) and a source-drain metal layer (150) which are sequentially arranged on the substrate (110), wherein the source-drain metal layer (150) comprises a source electrode (151) and a drain electrode (152) which are arranged at intervals, and the oxide semiconductor thin film transistor is characterized in that the oxide semiconductor layer (140) comprises a first oxide layer (141) and a second oxide layer (142) which is arranged above the first oxide layer (141) in a lamination manner, the materials of the first oxide layer (141) and the second oxide layer (142) are metal oxides, and the oxygen content of the first oxide layer (141) is lower than that of the second oxide layer (142); part of the first oxide layer (141) is exposed from both sides of the second oxide layer (142), and the source electrode (151) and the drain electrode (152) are spaced apart from each other and are respectively in ohmic contact with the first oxide layer (141) exposed from both sides of the second oxide layer (142).

2. The oxide semiconductor thin film transistor according to claim 1, wherein an oxygen content of the first oxide layer (141) is 0% to 50%, and an oxygen content of the second oxide layer (142) is 4% to 60%.

3. The oxide semiconductor thin film transistor according to claim 1, wherein a width M of the first oxide layer (141) exposed from each side of the second oxide layer (142) is 1 to 8 μm.

4. The oxide semiconductor thin film transistor according to claim 1, wherein the source electrode (151) covers the first oxide layer (141) exposed from one side of the second oxide layer (142) and extends a part of the second oxide layer (142) in a direction of the second oxide layer (142), and wherein the drain electrode (152) covers the first oxide layer (141) exposed from the other side of the second oxide layer (142) and extends a part of the second oxide layer (142) in a direction of the second oxide layer (142).

5. The oxide semiconductor thin film transistor according to claim 4, wherein a width N of a stacked position of the source electrode (151) and the second oxide layer (142) and a stacked position of the drain electrode (152) and the second oxide layer (142) is greater than or equal to 1 μm.

6. The oxide semiconductor thin film transistor according to claim 1, wherein a thickness D1 of the first oxide layer (141) is 10 to 90 nm, and a thickness D2 of the second oxide layer (142) is 10 to 90 nm.

7. The oxide semiconductor thin film transistor according to claim 1, wherein a width X1 of the first oxide layer (141) is 10 to 20 micrometers, a width X2 of the second oxide layer (142) is 4 to 18 micrometers, a distance between the source electrode (151) and the drain electrode (152) is 2 to 8 micrometers, and a width M of an exposed portion of the first oxide layer (141) from both sides of the second oxide layer (142) is 1 to 8 micrometers.

8. A method for manufacturing the oxide semiconductor thin film transistor according to any one of claims 1 to 7, comprising:

providing a substrate (110), and patterning a gate (120) on the substrate (110);

forming a gate insulating layer (130) on the substrate (110) and covering the gate electrode (120);

Sequentially preparing a first metal oxide layer (141 a) and a second metal oxide layer (142 a) on the first metal oxide layer (141 a) on the gate insulating layer (130) and making the oxygen content of the first metal oxide layer (141 a) formed smaller than the oxygen content of the second metal oxide layer (142 a);

Coating a photoresist layer on the second metal oxide layer (142 a) and patterning the photoresist layer to form a photoresist layer (200); the photoresist layer (200) comprises a first photoresist region (201) and a second photoresist region (202), the second photoresist region (202) corresponds to a region where the second oxide layer (142) is formed, and the first photoresist region (201) corresponds to a region where the first oxide layer (141) is formed and the second oxide layer (142) is removed; the height T1 of the second photoresist region (202) is greater than the height T2 of the first photoresist region (201);

etching away the second metal oxide layer (142 a) and the first metal oxide layer (141 a) not covering the photoresist layer (200) to form the first oxide layer (141);

Thinning the photoresist layer (200) to completely remove the photoresist material of the first photoresist region (201);

Etching away the second metal oxide layer (142 a) located in the first photoresist region (201) under the coverage protection of the second photoresist region (202) to form the second oxide layer (142) and expose part of the first oxide layer (141) from two sides of the second oxide layer (142);

removing the photoresist material of the second photoresist region (202); and

A source electrode (151) and a drain electrode (152) are formed.

9. The method of manufacturing an oxide semiconductor thin film transistor according to claim 8, wherein the first metal oxide layer (141 a) and the second metal oxide layer (142 a) are sputtered with the same target, and an oxygen-argon flow ratio of the first metal oxide layer (141 a) into the coating chamber during sputtering is x:y, wherein x ranges from 0 to 3, and y ranges from 5 to 20; the oxygen argon flow ratio of the second metal oxide layer (142 a) entering the coating chamber in the sputtering process is a to b, wherein the range of a is 3-10, and the range of b is 5-20; and x and y are smaller than a and b.