CN101533858A - Film transistor, manufacturing method thereof and image display device - Google Patents

Abstract

The invention discloses a thin film transistor, which comprises a gate electrode, a channel layer, a source region and a drain region arranged on a substrate, the channel layer is formed above the gate electrode, and the channel layer is formed on the channel layer. The dimension in the direction of the track length is smaller than the length of the gate electrode in the same direction and within the coverage of the length of the gate electrode, the source region and the drain region are formed on both sides of the gate electrode and are insulated from the gate electrode, The source region and the drain region are respectively in contact with two sides of the channel layer in the length direction to form Schottky junctions. The invention also discloses a manufacturing method of the thin film transistor and an image display device. The channel layer of the thin film transistor of the present invention is located within the coverage of the gate electrode, and the Schottky junction can be directly controlled and adjusted by the gate electrode. The Schottky thin film transistor with the back-gate structure can be realized in a low-temperature process, avoiding the short circuit between the gate and the source-drain caused by higher temperature.

Description

A kind of thin film transistor and its manufacturing method, image display device

technical field

The invention relates to a transistor, in particular to a schottky thin film transistor, a manufacturing method thereof and an image display device using the thin film transistor.

Background technique

Flat panel display technologies and devices have developed into mainstream technologies and devices for information display. For flat-panel displays, whether it is the currently dominant liquid crystal display, the organic light-emitting diode (OLED) display that is expected to become the mainstream of the next generation, or the flexible substrate display in the future, it is necessary to realize large-size and high-resolution displays. Thin film transistors must be used as integrated components for pixel switch control components or peripheral drive circuits. Most of the current thin film transistors use PN junction source-drain type, but some inherent defects limit the application of this type of thin film transistor.

Schottky source-drain transistor technology is a device technology with simple process and low cost. In the prior art, the structure of the Schottky transistor usually adopts a top-gate structure, that is, the channel layer and the source and drain regions on both sides are located on the substrate, and the gate electrode is formed above the channel layer. The Schottky junction is usually formed by the contact between metal silicide and silicon. In order to ensure that the Schottky contact is covered by the gate electrode, it is generally necessary to allow the metal silicide to expand sufficiently into the silicon channel. This expansion requires a high The temperature can only be achieved, which is not suitable for flat panel display devices with low temperature process requirements.

Contents of the invention

The technical problem to be solved by the present invention is to provide a thin film transistor capable of realizing Schottky source-drain contact at low temperature and an image display device using the thin film transistor. Another technical problem to be solved by the present invention is to provide A process preparation method for a TJT thin film transistor.

Technical problem of the present invention is solved by following technical scheme:

A thin film transistor, comprising a gate electrode, a channel layer, a source region and a drain region arranged on a substrate, the channel layer is formed above the gate electrode, and the channel layer is arranged in the channel length direction The dimension is smaller than the length of the same direction of the gate electrode and is within the coverage of the length of the gate electrode, the source region and the drain region are formed on both sides of the gate electrode and insulated from the gate electrode, the source region The drain region and the drain region are respectively in contact with the two sides of the channel layer in the length direction to form Schottky junctions.

The above-mentioned thin film transistor further includes a gate dielectric layer covering the gate electrode and the substrate, and the channel layer and source and drain regions on both sides thereof are formed on the gate dielectric layer.

The above-mentioned thin film transistor further includes a channel protection layer, and the channel protection layer is covered above the channel layer.

The source region and the drain region are formed of metal materials.

The above-mentioned source region and drain region adopt metals with low work function or metals with high work function. The metal with low work function refers to the metal with work function value less than 4.5eV. The metal with high work function refers to the metal with work function value greater than 4.5eV. 4.5eV metal.

A method for manufacturing a thin film transistor, comprising the steps of:

Step A, forming a gate electrode on the substrate;

Step C, forming a channel layer with a semiconductor material above the gate electrode, so that the size of the channel layer in the channel length direction is smaller than the length of the gate electrode in the same direction and within the coverage of the gate electrode described in step A;

Step D, forming a source region and a drain region on the gate dielectric layer on both sides of the channel layer formed in step C, so that the source region and the drain region are in contact with the two sides of the channel layer in the length direction to form a Schottky Knot.

After the above-mentioned step A and before the step C, the following steps are also included:

Step B, forming a gate dielectric layer on the gate electrode formed in step A;

The above step C also includes the step of continuously growing a channel protection layer on the channel layer.

The source region and the drain region are formed of metal materials.

The above step A is specifically realized by growing a conductive thin film and then performing photolithography and etching, or forming a gate electrode by photolithography, film formation with glue, and photoresist stripping.

An image display device includes a transparent substrate on which the above-mentioned thin film transistor is arranged.

The beneficial effect that the present invention compares with prior art is:

(1) In the existing Schottky source-drain transistors, the Schottky junction is formed by contacting the metal silicide with the channel silicon. In order to ensure that the Schottky contact is covered by the gate electrode, the silicide is generally made There is sufficient expansion in the channel, and this expansion needs a higher temperature to be realized; and the source region and the drain region of the present invention are connected with the channel layer to form a Schottky junction thin film transistor with a back gate structure, that is, the Schottky junction and The channel layer is formed above the gate electrode, so that the channel layer is easily within the length range of the gate electrode in the channel length direction, and the formed Schottky junction is directly controlled and regulated by the gate electrode. The Schottky thin film transistor with the back gate structure does not require high-temperature expansion, so it can be realized in a low-temperature process, and at the same time, it avoids the short circuit between the gate and the source-drain caused by the metal silicide at a higher temperature.

(2) The source region and the drain region of the present invention can be made of metal materials, for example, metal materials with low work function or high work function can be selected, so that the thin film transistor of the present invention can realize both n-type devices and p-type devices , CMOS amorphous silicon TFT (thin film transistor) circuits can be realized.

Description of drawings

FIG. 1 is a schematic cross-sectional structure diagram of a specific embodiment of a thin film transistor of the present invention;

Fig. 2 is a schematic diagram of forming a gate electrode in a specific embodiment of the manufacturing method of the present invention;

3 is a schematic diagram of gate dielectric layer growth in a specific embodiment of the manufacturing method of the present invention;

Fig. 4 is a schematic diagram of the growth and patterning of the channel layer and the channel protection layer of the specific embodiment of the manufacturing method of the present invention;

5 is a schematic diagram of the formation of source and drain regions in a specific embodiment of the manufacturing method of the present invention;

6 is a schematic diagram of the formation of a passivation layer and a contact hole in a specific embodiment of the manufacturing method of the present invention;

FIG. 7 is a schematic diagram of the formation of lead lines in the source and drain regions of a specific embodiment of the manufacturing method of the present invention.

Detailed ways

The present invention will be described in further detail below with specific embodiments in conjunction with the accompanying drawings.

A specific embodiment of the thin film transistor of the present invention, as shown in Figure 1, includes a substrate 1, a gate electrode 2, a gate dielectric layer 3, a channel layer 4, a channel protection layer 5, and a source region 6 and a drain region 7, the substrate 1 can be made of a transparent material. In this embodiment, the substrate 1 is a glass substrate or other materials, such as a plastic substrate.

The gate electrode 2 is arranged on the substrate 1. In this embodiment, the gate electrode 2 is made of a metal material, such as any one of chromium, molybdenum or aluminum, and is formed by a magnetron sputtering method or a thermal evaporation method; another In an implementation manner, the gate electrode 2 may be formed by a transparent conductive film, such as indium tin oxide (ITO), by magnetron sputtering. The thickness of the gate electrode is generally 100-300 nanometers.

The gate dielectric layer 3 covers the gate electrode 2 and the substrate 1. In this embodiment, the gate dielectric layer 3 can be an insulating medium such as silicon nitride or silicon oxide, and is formed by a plasma-enhanced chemical vapor deposition (PECVD) method. ; In another embodiment, metal oxides such as aluminum oxide and hafnium oxide may also be used, formed by magnetron sputtering, and the thickness of the gate dielectric 3 is generally 100-400 nanometers.

The channel layer 4 is located on the gate dielectric layer 3 covering the area of the gate electrode 2 , and its dimension in the length direction is smaller than that of the gate electrode 2 in the same direction and within the length range of the gate electrode 2 . In this embodiment, the channel layer 4 is made of amorphous silicon material and formed by PECVD method; in another embodiment, metal oxide semiconductor, such as zinc oxide-based material, is formed by magnetron sputtering or other methods. The thickness of the channel layer 4 is generally 20-200 nanometers.

The channel protection layer 5 is located on the channel layer 4 , and its planar size is the same as that of the channel layer 4 . In this embodiment, the channel protection layer 5 is formed by PECVD using an insulating medium such as silicon nitride or silicon oxide; in other embodiments, metal oxides such as aluminum oxide or hafnium oxide can be used to form by magnetron sputtering . The thickness of the channel protection layer 5 is 20-200 nanometers.

The source region 6 and the drain region 7 are located on the gate dielectric layer 3 and respectively connected to the two ends of the channel layer 4 in the longitudinal direction. The source region 6 and the drain region 7 are made of metal materials, usually formed by magnetron sputtering, and the thickness is generally 100-300 nanometers. For n-type TFTs, the source region 6 and drain region 7 generally use metal materials with a small work function (less than 4.5eV), such as aluminum, titanium, molybdenum, etc.; for p-type TFTs, the source region 6 and drain region 7 generally use work function Metal materials with large function (greater than 4.5eV), such as nickel, gold and platinum.

The manufacturing method of the thin film transistor of the present invention, one embodiment thereof, comprises the following steps:

Step 101 , as shown in FIG. 2 , the substrate 1 is a transparent glass substrate. Magnetron sputtering grows a metal chromium film with a thickness of 100 to 200 nanometers on the glass substrate, and then photolithography and etching form the gate electrode 2; in other embodiments, photolithography, film formation with glue, and photoresist stripping to form a gate electrode;

Step 102, as shown in FIG. 3 , grow a layer of silicon nitride film with a thickness of 100-300 nanometers by PECVD to form the gate dielectric layer 3 of the gate electrode 2;

Step 103, as shown in FIG. 4, continuously deposit a layer of amorphous silicon with a thickness of 100-200 nanometers and a silicon nitride layer of 20-80 nanometers by PECVD, and photolithographically and etch the silicon nitride and amorphous silicon layer, forming the channel layer 4 and the channel protection layer 5. The patterns of the channel layer 4 and the channel protection layer 5 are determined by the same mask. The size of the formed channel layer 4 in the channel length direction is smaller than the size of the gate electrode 2 in the same direction and is within the length coverage of the gate electrode 2;

Step 104, as shown in FIG. 5 , deposit 150-300 nanometer-thick metallic nickel by magnetron sputtering, anneal for 30 minutes under vacuum conditions at a temperature of 300° C., and then photolithography and etching form the source of the transistor Region 6 and drain region 7;

Step 105, as shown in FIG. 6, deposit a silicon oxide layer 8 with a thickness of 100 to 300 nanometers by magnetron sputtering, and then photolithography and etching form the contact holes 9 and 10 of the electrodes;

Step 106, as shown in Figure 7, deposit a layer of metal aluminum film with a thickness of 100-300 nanometers by magnetron sputtering, then photolithography and etching to form the source metal lead-out electrode 11 and the drain metal of the thin film transistor Extract the electrode 12.

In an image display device (such as a liquid crystal display or an organic light-emitting diode (OLED) display), the above-mentioned manufacturing method can be used to form a Schottky thin film transistor on a transparent substrate, and the Schottky thin film transistor is used as a pixel switch element or Integrated components for peripheral drive circuits.

The image display device using the Schottky thin film transistor simplifies the manufacturing method, reduces product scrapping caused by short-circuit defects, thereby improving the yield and reducing the cost. Moreover, the Schottky thin film transistor can realize both n-type devices and p-type devices, so it can realize CMOS circuits and expand the scope of application.

The above content is a further detailed description of the present invention in conjunction with specific preferred embodiments, and it cannot be assumed that the specific implementation of the present invention is limited to these descriptions. For those of ordinary skill in the technical field of the present invention, without departing from the concept of the present invention, some simple deduction or replacement can be made, which should be regarded as belonging to the protection scope of the present invention.

Claims (10)

1. thin-film transistor, comprise the gate electrode, channel layer, source region and the drain region that are arranged on the substrate, it is characterized in that, described channel layer is formed at the top of described gate electrode, described channel layer the size on the orientation less than gate electrode equidirectional length and being within the coverage of described gate electrode length, described source region and drain region be formed at described gate electrode both sides and with described grid electrode insulating, described source region and the drain region formation schottky junction that contacts with the two sides of described channel layer length direction respectively.

2. thin-film transistor according to claim 1 is characterized in that, also comprises gate dielectric layer, and described gate dielectric layer covers on described gate electrode and the substrate, the source region of described channel layer and both sides thereof and drain region be formed at described gate dielectric layer above.

3. thin-film transistor according to claim 2 is characterized in that, also comprises channel protective layer, and described channel protective layer covers the top in described channel layer.

4. according to the arbitrary described thin-film transistor of claim 1 to 3, it is characterized in that described source region and drain region adopt metal material to form.

5. thin-film transistor according to claim 4, it is characterized in that, the metal of low work function or the metal of high work function are adopted in described source region and drain region, the metal of described low work function is meant the metal of work function value less than 4.5eV, and the metal of described high work function is meant the metal of work function value greater than 4.5eV.

6. the manufacture method of a thin-film transistor is characterized in that, may further comprise the steps:

Steps A, on substrate, form gate electrode;

Step C, above gate electrode, form channel layer with semi-conducting material, make channel layer the size on the orientation less than gate electrode equidirectional length and being within the coverage of the described gate electrode of steps A;

Step D, form at step C on the gate dielectric layer of channel layer both sides and form source region and drain region, make described source region and drain region and described channel layer length direction the two sides formation schottky junction that contacts.

7. method according to claim 6 is characterized in that, after described steps A and step C before further comprising the steps of:

Step B, on the gate electrode that steps A forms, form gate dielectric layer;

Described step C also is included in the step of the channel protective layer of growing continuously on the channel layer.

8. method according to claim 7 is characterized in that, described source region and drain region adopt metal material to form.

9. method according to claim 6 is characterized in that, described steps A specifically by the growth conductive film again through photoetching with etching is realized or by photoetching, band glue film forming and photoresist lift off formation gate electrode.

10. an image display device comprises transparency carrier, it is characterized in that, each described thin-film transistor in the power 1 to 5 is set on described transparency carrier.

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