CN112186033A - Gallium nitride junction barrier Schottky diode with slant field plate and manufacturing method thereof - Google Patents
Gallium nitride junction barrier Schottky diode with slant field plate and manufacturing method thereof Download PDFInfo
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- 229910002601 GaN Inorganic materials 0.000 title claims abstract description 76
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 title claims abstract description 44
- 230000004888 barrier function Effects 0.000 title claims abstract description 19
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000002184 metal Substances 0.000 claims abstract description 139
- 229910052751 metal Inorganic materials 0.000 claims abstract description 139
- 238000002161 passivation Methods 0.000 claims abstract description 70
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 239000010410 layer Substances 0.000 claims description 234
- 238000000034 method Methods 0.000 claims description 64
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- 238000001259 photo etching Methods 0.000 claims description 29
- 238000005566 electron beam evaporation Methods 0.000 claims description 27
- 239000007789 gas Substances 0.000 claims description 27
- 238000005530 etching Methods 0.000 claims description 21
- 238000001020 plasma etching Methods 0.000 claims description 17
- 229910015844 BCl3 Inorganic materials 0.000 claims description 16
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 claims description 16
- 238000001704 evaporation Methods 0.000 claims description 14
- 239000000463 material Substances 0.000 claims description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 12
- 238000000151 deposition Methods 0.000 claims description 12
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 11
- 229910000480 nickel oxide Inorganic materials 0.000 claims description 11
- GNRSAWUEBMWBQH-UHFFFAOYSA-N oxonickel Chemical compound [Ni]=O GNRSAWUEBMWBQH-UHFFFAOYSA-N 0.000 claims description 11
- 238000000137 annealing Methods 0.000 claims description 10
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 10
- 229910052737 gold Inorganic materials 0.000 claims description 7
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 6
- 229910052681 coesite Inorganic materials 0.000 claims description 6
- 229910052593 corundum Inorganic materials 0.000 claims description 6
- 229910052906 cristobalite Inorganic materials 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 6
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- 229910052682 stishovite Inorganic materials 0.000 claims description 6
- 229910052905 tridymite Inorganic materials 0.000 claims description 6
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 6
- 239000002356 single layer Substances 0.000 claims description 5
- 238000004544 sputter deposition Methods 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 4
- 229910052697 platinum Inorganic materials 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
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- 230000015556 catabolic process Effects 0.000 abstract description 7
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 20
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 20
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
- H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
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- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
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- H—ELECTRICITY
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
- H10D64/112—Field plates comprising multiple field plate segments
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- H—ELECTRICITY
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/01—Manufacture or treatment
- H10D8/051—Manufacture or treatment of Schottky diodes
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- H—ELECTRICITY
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Abstract
The invention discloses a gallium nitride junction barrier Schottky diode with an oblique field plate and a manufacturing method thereof, and mainly solves the problems of low breakdown voltage and poor reliability in the prior art. The Schottky diode comprises an ohmic cathode metal layer (4), an N + gallium nitride substrate layer (1), an N-gallium nitride epitaxial layer (2), a P-type junction layer (3) and a Schottky anode metal layer (5) from bottom to top, wherein a first passivation medium layer (6) is arranged above two ends of the Schottky anode metal layer (5); a first metal field plate layer (7) is arranged above the Schottky anode metal layer (5) and the first passivation dielectric layer (6); a second passivation dielectric layer (8) is arranged above two ends of the first metal field plate layer (7); and a second metal field plate layer (9) is arranged above the first metal field plate layer (7) and the second passivation dielectric layer (8). The invention increases the reverse breakdown voltage of the GaN junction barrier Schottky diode, reduces the reverse leakage of the GaN junction barrier Schottky diode, and can be used for high-frequency high-power electronic equipment.
Description
Technical Field
The invention belongs to the technical field of microelectronics, and particularly relates to a gallium nitride junction barrier Schottky diode which can be used for manufacturing various high-power electronic devices.
Background
The gallium nitride power device attracts the rapid development of the gallium nitride power device in the application field of the power device due to the characteristics of high breakdown, high mobility, high frequency, high efficiency and the like. Compared with the traditional material, the Schottky diode prepared by adopting the gallium nitride material has high reliability and stability, so that the performance of the Schottky diode can be well exerted under severe working conditions of high power, high temperature and the like. The conventional vertical gan schottky diode has a forward and reverse operation principle that barrier height changes when metal and semiconductor are in contact, but the reverse withstand voltage characteristic is not outstanding, so that the actual breakdown voltage deviates from a theoretical value to a certain extent. In order to increase the breakdown voltage and reduce the reverse leakage effect, the junction barrier Schottky diode structure is applied.
With the development of the integrated circuit industry, the requirements for high-power and high-frequency devices are increasingly greater at the present stage, and the performance of the power device directly determines the quality and efficiency of the product. Taking a diode as an example, in such a working environment, the device is required to have the capability of fast turning on and off and the superior performance of voltage resistance and high temperature resistance, and the forward and reverse characteristics of the diode are particularly important. In addition, the reduction of reverse leakage achieves the aims of saving energy and reducing consumption while improving the product efficiency.
The conventional junction barrier Schottky diode structure is shown in figure 1 and comprises an ohmic cathode metal layer 4, an N + gallium nitride substrate layer 1 and an N-gallium nitride epitaxial layer 2 from bottom to top, wherein a P-type junction layer 3 is arranged in the N-gallium nitride epitaxial layer 2, and a Schottky anode metal layer 5 is arranged on the N-gallium nitride epitaxial layer 2. At present, relatively few research reports about the gallium nitride junction barrier Schottky diode exist, so that the gallium nitride junction barrier Schottky diode has great research value. However, the conventional junction barrier schottky diode structure is not protected by a terminal structure, so that the reverse performance of the device is not outstanding enough. In addition, because the P-type junction of the existing structure is made of a homogeneous material, the depletion degree is not high when the device works reversely, and the leakage current is large.
Disclosure of Invention
The invention aims to provide a gallium nitride junction barrier Schottky diode with an oblique field plate and a manufacturing method thereof aiming at the defects of the prior art, so that the reverse breakdown voltage of the gallium nitride diode is effectively increased, the leakage current is reduced, and the performance of a device is improved.
The technical scheme of the invention is realized as follows:
1. the utility model provides a gallium nitride junction barrier schottky diode with oblique field board, its includes ohm cathode metal layer, N + gallium nitride substrate layer, N-gallium nitride epitaxial layer, P type junction layer and schottky anode metal layer from bottom to top, its characterized in that: a first passivation dielectric layer is arranged above two ends of the Schottky anode metal layer; a first metal field plate layer is arranged above the Schottky anode metal layer and the first passivation dielectric layer; a second passivation dielectric layer is arranged above two ends of the first metal field plate layer; and a second metal field plate layer is arranged above the first metal field plate layer and the second passivation dielectric layer.
Furthermore, the thickness of the N-gallium nitride epitaxial layer is 3-10 um, the carrier concentration is 1E15 cm-3-1E 16cm-3, and the carrier concentration of the N + gallium nitride substrate layer is 1E17 cm-3-1E 18 cm-3.
Furthermore, the P-type junction layer (3) is made of a P-type nickel oxide material, and the junction depth is 300 nm-500 nm.
Further, the first passivation dielectric layer and the second passivation dielectric layer are made of one of SiO2, Al2O3 and Si3N4, and the thickness of the first passivation dielectric layer and the second passivation dielectric layer is 50 nm-200 nm; the first metal field plate layer and the second metal field plate are made of Ti/Au, and the thickness of the first metal field plate layer and the second metal field plate layer is 50 nm-200 nm.
Further, the ohmic cathode metal layer is a single layer or multiple layers formed by multiple materials formed by one of Ti, Al, Ni, Au and Pt; the Schottky anode metal layer is formed by a single layer or multiple layers of materials formed by one of Ni, Au and W metals.
2. A method for manufacturing a GaN junction barrier Schottky diode is characterized by comprising the following steps:
1) on an epitaxial wafer sequentially comprising an N + gallium nitride substrate layer and an N-gallium nitride epitaxial layer from bottom to top, forming a pattern on the lower surface of the N + gallium nitride substrate layer by adopting one-time photoetching, growing ohmic cathode metal in the pattern region by adopting an electron beam evaporation process, and carrying out thermal annealing treatment to form an ohmic cathode metal layer;
2) forming a pattern on the N-gallium nitride epitaxial layer by adopting secondary photoetching, and etching the whole sample wafer downwards by adopting a reactive ion etching process for 300-500 nm to form a plurality of finger-inserting grooves;
3) growing P-type nickel oxide with the thickness of 300-500 nm on the N-gallium nitride epitaxial layer by adopting a sputtering process to form a P-type junction layer;
4) forming a pattern on the N-gallium nitride epitaxial layer by adopting three times of photoetching, growing a Schottky anode metal layer in the pattern region by adopting an electron beam evaporation process, and carrying out thermal annealing treatment;
5) forming patterns at two ends of the Schottky anode metal layer by adopting four times of photoetching, and etching the pattern region to a position 30-150 nm below the surface of the N-gallium nitride epitaxial layer by adopting a buffer oxide etching process, wherein the etched wall surface is an inclined wall surface;
6) depositing a first passivation dielectric layer with the thickness of 50 nm-200 nm on the whole sample wafer by adopting a chemical vapor deposition process;
7) forming a pattern on the first passivation dielectric layer by adopting five times of photoetching, and forming holes with the depth of 50-200 nm in a pattern area by adopting a reactive ion etching process;
8) growing a first metal field plate layer with the thickness of 50-200 nm on the upper surface of the whole sample wafer by adopting an electron beam evaporation process;
9) depositing a second passivation dielectric layer with the thickness of 50-200 nm on the first metal field plate layer by adopting a plasma enhanced chemical vapor deposition process;
10) forming a pattern on the second passivation dielectric layer by adopting six times of photoetching, and forming holes with the depth of 50-200 nm in a pattern area by adopting an etching process;
11) and (3) growing a second metal field plate layer with the thickness of 50-200 nm on the upper surface of the whole sample wafer by adopting an electron beam evaporation process to finish the manufacture of the whole device.
Compared with the prior art, the invention has the following advantages and effects:
firstly, because the P-type junction layer of the invention adopts a P-type nickel oxide material, when the device works in the reverse direction, the formed depletion region is wider, the depletion effect is stronger, and the reverse leakage current can be reduced;
secondly, because the double-layer oblique field plate structure is added on the Schottky anode metal, a strong electric field at the edge of the Schottky anode metal of the device is transferred to the metal field plate, the field intensity at the edge of the Schottky anode metal is reduced, the breakdown voltage is further increased, and the performance of the device is improved.
Drawings
FIG. 1 is a schematic cross-sectional view of a conventional GaN junction barrier Schottky diode;
FIG. 2 is a schematic cross-sectional view of a GaN junction barrier Schottky diode with slant field plate according to the present invention;
fig. 3 is a schematic flow chart of manufacturing the schottky diode of fig. 2 according to the present invention.
Detailed Description
The following describes the practice of the present invention in further detail with reference to the accompanying drawings:
referring to fig. 2, the schottky diode with slant field plate comprises an ohmic cathode metal 4, an N + gan substrate layer 1, an N-gan epitaxial layer 2, a P-type junction layer 3, an ohmic cathode metal layer 4, a schottky anode metal 5, a first passivation dielectric layer 6, a first metal field plate layer 7, a second passivation dielectric layer 8 and a second metal field plate layer 9. Wherein: the ohmic cathode metal layer 4 is a single layer or a plurality of layers formed by a plurality of materials of Ti, Al, Ni, Au and Pt; the carrier concentration of the N + gallium nitride substrate layer 1 is 10E17 cm-3-10E 18cm-3, and the N + gallium nitride substrate layer is located on the upper portion of the ohmic cathode metal layer 4; the thickness of the N-gallium nitride epitaxial layer 2 is 3 um-10 um, the carrier concentration is 10E15 cm-3-10E 16cm-3, and the N-gallium nitride epitaxial layer is positioned on the upper part of the N + gallium nitride substrate layer 2; the P-type junction layer 3 is integrated in the N-gallium nitride epitaxial layer 2, and the junction depth is 300 nm-500 nm; the Schottky anode metal layer 5 is positioned above the N-gallium nitride epitaxial layer 2, one of W, Ni/Au can be adopted for growth, grooves are formed in the two ends of the Schottky anode metal layer, and the depth of each groove is 30-150 nm; the first passivation dielectric layer 6 is made of any one of SiO2, Al2O3 and SiN, has a thickness of 50-200 nm, and is located above the Schottky anode metal layer 5; the first metal field plate layer 7 is of an inclined plane field plate structure, the thickness of the first metal field plate layer is 50-200 nm, and the first metal field plate layer is located above the first passivation dielectric layer 6; the material and the thickness of the second passivation dielectric layer 8 are the same as those of the first passivation dielectric layer 6, and the second passivation dielectric layer is positioned above the first metal field plate layer 7; the second metal field plate layer 9 is made of the same material and has the same thickness as the first metal field plate layer 7, and is located above the second passivation dielectric layer 8.
Referring to fig. 3, the method for manufacturing the gan schottky diode with the slant field plate according to the present invention provides the following three embodiments:
example 1: and manufacturing the Schottky diode with the P-type junction depth of 300nm, the ohmic cathode metal of Ti/Au, the Schottky anode metal of Ni/Au, the SiN as the first passivation dielectric layer and the second passivation dielectric layer and the thickness of the first metal field plate layer and the second metal field plate layer of 50 nm.
Step 1: the epitaxial wafer is cleaned as shown in fig. 3 (a).
The epitaxial wafer used in the embodiment comprises an N + gallium nitride substrate layer and an N-gallium nitride epitaxial layer from bottom to top, wherein the thickness of the N + gallium nitride substrate layer is 3um, and the thickness of the N-gallium nitride epitaxial layer is 5 um;
and (3) sequentially ultrasonically cleaning the epitaxial wafer in acetone, ethanol and plasma water for 5min, and finally blowing the epitaxial wafer by using a nitrogen gun.
Step 2: an ohmic cathode metal layer is deposited as shown in fig. 3 (b).
Forming a pattern on the lower surface of the N + gallium nitride substrate layer of the epitaxial wafer by adopting one-time photoetching, putting the epitaxial wafer into an electron beam evaporation table, and evaporating Ti/Au with the thickness of 20/45nm on the surface of the N + gallium nitride substrate layer at the speed of 0.1nm/s to serve as ohmic cathode metal;
and removing redundant metal on the surface of the sample wafer by adopting a stripping process, and annealing at 860 ℃ for 30s to form an ohmic cathode metal layer.
And step 3: a P-type junction layer is deposited as shown in fig. 3 (c).
Forming a pattern on the N-gallium nitride epitaxial layer by adopting secondary photoetching, and etching the whole sample wafer downwards by adopting a reactive ion etching process under the conditions that the power is 150W, the pressure is 5mTorr, and the flow rate ratio of gas Cl2 to BCl3 is 75sccm:30sccm for 300 nm;
sputtering a P-type nickel oxide layer on the upper surface of the etched sample wafer by adopting a magnetron sputtering process, wherein the thickness of the P-type nickel oxide layer is 300nm, removing redundant metal on the surface of the sample wafer by adopting a stripping process, sequentially carrying out ultrasonic cleaning in acetone, ethanol and plasma water for 3min respectively, and finally blowing the sample wafer by using a nitrogen gun.
And 4, step 4: schottky anode metal deposition as shown in fig. 3 (d).
Forming a pattern on the N-gallium nitride epitaxial layer by adopting three times of photoetching, then placing the sample wafer into an electron beam evaporation table, and evaporating W with the thickness of 120nm on the surface at the speed of 0.1nm/s to be used as Schottky anode metal;
and removing redundant metal on the surface of the whole sample wafer by adopting a stripping process, and annealing for 5min at the temperature of 450 ℃ to form the Schottky anode metal layer.
And 5: a first passivation dielectric layer is deposited as shown in fig. 3 (e).
Four times of photoetching are adopted to form a pattern on the Schottky anode metal layer, and then a reactive ion etching process is adopted, wherein the power is 150W, the pressure is 5mTorr, and the flow rates of gas Cl2 and BCl3 are 75sccm: etching the whole sample wafer under the condition of 30sccm to form a groove which is as deep as 80nm below the surface of the N-gallium nitride epitaxial layer;
putting the sample wafer into a plasma enhanced chemical vapor deposition device, depositing at the temperature of 220 ℃ in a cavity, and reacting in a reaction chamber with SiH 4: N2O: n2 flow rate ratio 40 sccm: 710 sccm: and depositing a first passivation dielectric layer of Si3N4 with the thickness of 100nm under the condition of 180 sccm.
Step 6: the first passivation dielectric layer is opened as shown in fig. 3 (f).
And forming a pattern on the first passivation dielectric layer by adopting five times of photoetching, and then adopting a reactive ion etching process, wherein the power is 150W, the pressure is 5mTorr, and the flow rate ratio of gas Cl2 to BCl3 is 75sccm: etching the whole sample wafer downwards by 100nm under the condition of 30 sccm;
and (3) ultrasonically cleaning the etched sample wafer in acetone, ethanol and plasma water for 3min in sequence, and drying by using a nitrogen gun.
And 7: a first metal field plate layer is fabricated as shown in fig. 3 (g).
And (3) putting the epitaxial wafer after the steps into an electron beam evaporation table by adopting an electron beam evaporation process, and evaporating Ti/Au metal with the thickness of 25/25nm on the first passivation dielectric layer and the Schottky anode metal layer at the speed of 0.1nm/s to form a first metal field plate layer.
And 8: a second passivation dielectric layer is formed as shown in fig. 3 (h).
Putting the sample wafer into a plasma enhanced chemical vapor deposition device, and reacting a reaction chamber gas SiH 4: N2O: n2 flow rate ratio 40 sccm: 710 sccm: and depositing a Si3N4 second passivation dielectric layer with the thickness of 100nm under the condition of 180 sccm.
And step 9: and (5) opening the second passivation dielectric layer, as shown in figure 3 (i).
And forming a pattern on the second passivation dielectric layer by adopting sixth photoetching, and then adopting a reactive ion etching process, wherein the power is 150W, the pressure is 5mTorr, and the flow rate ratio of gas Cl2 to BCl3 is 75sccm: etching the whole sample wafer downwards by 100nm under the condition of 30 sccm;
and (3) ultrasonically cleaning the etched sample wafer in acetone, ethanol and plasma water for 3min in sequence, and drying by using a nitrogen gun.
Step 10: a second metal field plate layer is fabricated as shown in fig. 3 (j).
And (3) putting the sample wafer subjected to the steps into an electron beam evaporation table by adopting an electron beam evaporation process, evaporating Ti/Au metal with the thickness of 25/25nm on the second passivation dielectric layer and the Schottky anode metal layer at the speed of 0.1nm/s to form a second metal field plate layer, and finishing the manufacture of the gallium nitride Schottky diode with the inclined field plate.
Example 2: and manufacturing the Schottky diode with the P-type junction depth of 400nm, the ohmic cathode metal of Ti/Al/Ni/Au, the Schottky anode metal of Ni/Au, the SiO2 as a first passivation dielectric layer and a second passivation dielectric layer, and the thicknesses of the first metal field plate layer and the second metal field plate layer of 100 nm.
Step A: the epitaxial wafer is cleaned as shown in fig. 3 (a).
Step a of this example is the same as step 1 in example 1.
And B: an ohmic cathode metal layer is deposited as shown in fig. 3 (b).
B1) Forming a pattern on the lower surface of the N + gallium nitride substrate layer of the epitaxial wafer by adopting first photoetching, then placing the epitaxial wafer into an electron beam evaporation table, and evaporating Ti/Al/Ni/Au with the thickness of 20/145/50/45nm on the surface of the N + gallium nitride substrate layer at the speed of 0.1nm/s as ohmic cathode metal;
B2) and removing redundant metal on the surface of the sample wafer by adopting a stripping process, and annealing at 860 ℃ for 30s to form an ohmic cathode metal layer.
And C: a P-type junction layer is deposited as shown in fig. 3 (c).
C1) And forming a pattern on the N-gallium nitride epitaxial layer by adopting second photoetching, and then adopting a reactive ion etching process, wherein the power is 150W, the pressure is 5mTorr, and the flow rate ratio of gas Cl2 to BCl3 is 75sccm: etching the whole sample wafer downwards by 400nm under the condition of 30 sccm;
C2) sputtering a P-type nickel oxide layer on the upper surface of the etched sample wafer by adopting a magnetron sputtering process, wherein the thickness of the P-type nickel oxide layer is 400nm, removing redundant metal on the surface of the sample wafer by adopting a stripping process, sequentially carrying out ultrasonic cleaning in acetone, ethanol and plasma water for 3min respectively, and finally blowing the sample wafer by using a nitrogen gun.
Step D: schottky anode metal deposition as shown in fig. 3 (d).
D1) Forming a pattern on the N-gallium nitride epitaxial layer by adopting third photoetching, putting the sample wafer into an electron beam evaporation table, and evaporating Ni/Au with the thickness of 60nm/120nm on the surface at the speed of 0.1nm/s to be used as Schottky anode metal;
D2) and removing redundant metal on the surface of the whole sample wafer by adopting a stripping process, and annealing for 5min at the temperature of 450 ℃ to form the Schottky anode metal layer.
Step E: a first passivation dielectric layer is deposited as shown in fig. 3 (e).
E1) And forming a pattern on the Schottky anode metal layer by adopting fourth photoetching, and then adopting a reactive ion etching process, wherein the power is 150W, the pressure is 5mTorr, and the flow rates of Cl2 gas and BCl3 gas are 75sccm: etching the whole sample wafer under the condition of 30sccm to form a groove which is as deep as 80nm below the surface of the N-gallium nitride epitaxial layer;
E2) putting the sample wafer into a plasma enhanced chemical vapor deposition device, and performing Plasma Enhanced Chemical Vapor Deposition (PECVD) under the conditions that the cavity temperature is 220 ℃, and the gas flow rate ratio of SiH4 to O2 in a reaction chamber is 40 sccm: and depositing a first passivation dielectric layer of SiO2 with the thickness of 200nm under the condition of 710 sccm.
Step F: the first passivation dielectric layer is opened as shown in fig. 3 (f).
F1) And forming a pattern on the first passivation dielectric layer by adopting a fifth photoetching, and then adopting a reactive ion etching process, wherein the power is 150W, the pressure is 5mTorr, and the flow rate ratio of gas Cl2 to BCl3 is 75sccm: etching the whole sample wafer downwards by 200nm under the condition of 30 sccm;
F2) and (3) ultrasonically cleaning the etched sample wafer in acetone, ethanol and plasma water for 3min in sequence, and drying by using a nitrogen gun.
Step G: a first metal field plate layer is fabricated as shown in fig. 3 (g).
And (3) putting the epitaxial wafer subjected to the steps into an electron beam evaporation table by adopting an electron beam evaporation process, and evaporating Ti/Au metal with the thickness of 50/50nm on the first passivation dielectric layer and the Schottky anode metal layer at the speed of 0.1nm/s to form a first metal field plate layer.
Step H: a second passivation dielectric layer is formed as shown in fig. 3 (h).
Putting the sample wafer with the first metal field plate layer into a plasma enhanced chemical vapor deposition device, wherein the temperature of a cavity is 220 ℃, and the gas flow rate ratio of SiH4 to O2 in a reaction chamber is 40 sccm: and depositing a SiO2 second passivation dielectric layer with the thickness of 200nm under the condition of 710 sccm.
Step I: and (5) opening the second passivation dielectric layer, as shown in figure 3 (i).
I1) Forming a pattern on the second passivation dielectric layer by adopting sixth photoetching, and etching the whole sample wafer downwards by adopting a reactive ion etching process under the conditions that the power is 150W, the pressure is 5mTorr, and the flow rate ratio of gas Cl2 to BCl3 is 75sccm:30 sccm;
I2) and (3) ultrasonically cleaning the etched sample wafer in acetone, ethanol and plasma water for 3min in sequence, and drying by using a nitrogen gun.
Step J: a second metal field plate layer is fabricated as shown in fig. 3 (j).
And (3) putting the sample wafer subjected to the steps into an electron beam evaporation table by adopting an electron beam evaporation process, evaporating Ti/Au metal with the thickness of 50/50nm on the second passivation dielectric layer and the Schottky anode metal layer at the speed of 0.1nm/s to form a second metal field plate layer, and finishing the manufacture of the gallium nitride Schottky diode with the inclined field plate.
Example 3: and manufacturing the Schottky diode with the P-type junction depth of 500nm, the ohmic cathode metal of Ti/Al/Au, the Schottky anode metal of W, the Al2O3 as the first passivation dielectric layer and the second passivation dielectric layer, and the thicknesses of the first metal field plate layer and the second metal field plate layer of 200 nm.
The method comprises the following steps: the epitaxial wafer is cleaned as shown in fig. 3 (a).
Step one of this example is the same as step 1 in example 1.
Step two: an ohmic cathode metal layer is deposited as shown in fig. 3 (b).
Firstly, forming a pattern on the lower surface of an N + gallium nitride substrate layer of an epitaxial wafer by adopting first photoetching, then placing the epitaxial wafer into an electron beam evaporation table, and evaporating Ti/Al/Au with the thickness of 20/145/45nm on the surface of the N + gallium nitride substrate layer at the speed of 0.1nm/s as ohmic cathode metal;
and then, removing redundant metal on the surface of the sample wafer by adopting a stripping process, and annealing for 30s at 860 ℃ to form an ohmic cathode metal layer.
Step three: a P-type junction layer is deposited as shown in fig. 3 (c).
Firstly, forming a pattern on an N-gallium nitride epitaxial layer by adopting second photoetching, and then adopting a reactive ion etching process, wherein the power is 150W, the pressure is 5mTorr, and the flow rate ratio of gas Cl2 to BCl3 is 75sccm: etching the whole sample wafer downwards by 500nm under the condition of 30 sccm;
and then, sputtering a P-type nickel oxide layer on the upper surface of the etched sample wafer by adopting a magnetron sputtering process, wherein the thickness of the P-type nickel oxide layer is 500nm, removing redundant metal on the surface of the sample wafer by adopting a stripping process, sequentially carrying out ultrasonic cleaning in acetone, ethanol and plasma water for 3min respectively, and finally blowing the sample wafer by using a nitrogen gun.
Step four: schottky anode metal deposition as shown in fig. 3 (d).
Firstly, forming a pattern on an N-gallium nitride epitaxial layer by adopting third photoetching, then placing a sample wafer into an electron beam evaporation table, and evaporating W with the thickness of 150nm on the surface at the speed of 0.1nm/s as Schottky anode metal;
and then, removing the redundant metal on the whole surface of the sample wafer by adopting a stripping process, and annealing for 5min at the temperature of 450 ℃ to form the Schottky anode metal layer.
Step five: and depositing a first passivation dielectric layer as shown in fig. 3 (e).
Firstly, forming a pattern on the Schottky anode metal layer by adopting fourth photoetching, and then adopting a reactive ion etching process, wherein the power is 150W, the pressure is 5mTorr, and the flow rates of Cl2 gas and BCl3 gas are 75sccm: etching the whole sample wafer under the condition of 30sccm to form a groove which is as deep as 80nm below the surface of the N-gallium nitride epitaxial layer;
and then, putting the sample wafer into plasma enhanced chemical vapor deposition equipment, wherein the temperature of a cavity is 220 ℃, the gas flow rate Ar of a reaction chamber is as follows: N2O: TMA ratio of 700 sccm: 800 sccm: and depositing a first passivation dielectric layer of Al2O3 with the thickness of 150nm on the whole sample wafer under the condition of 100 sccm.
Step six: the first passivation dielectric layer is opened as shown in fig. 3 (f).
Firstly, forming a pattern on a first passivation dielectric layer by adopting fifth photoetching, and then adopting a reactive ion etching process, wherein the power is 150W, the pressure is 5mTorr, and the flow rate ratio of gas Cl2 to BCl3 is 75sccm: etching the whole sample wafer downwards by 150nm under the condition of 30 sccm;
and then, ultrasonically cleaning the etched sample wafer in acetone, ethanol and plasma water for 3min respectively in sequence, and drying by using a nitrogen gun.
Step seven: a first metal field plate layer is fabricated as shown in fig. 3 (g).
And (3) putting the epitaxial wafer after the steps into an electron beam evaporation table by adopting an electron beam evaporation process, and evaporating Ti/Au metal with the thickness of 100/100nm on the first passivation dielectric layer and the Schottky anode metal layer at the speed of 0.1nm/s to form a first metal field plate layer.
Step eight: a second passivation dielectric layer is formed as shown in fig. 3 (h).
And (3) putting the sample wafer on which the first metal field plate layer is manufactured into plasma enhanced chemical vapor deposition equipment, wherein the temperature of a cavity is 220 ℃, the gas flow rate Ar of a reaction chamber is as follows: N2O: TMA ratio of 700 sccm: 800 sccm: and depositing a 150 nm-thick Al2O3 second passivation dielectric layer on the whole sample wafer under the condition of 100 sccm.
Step nine: and (5) opening the second passivation dielectric layer, as shown in figure 3 (i).
Firstly, forming a pattern on a second passivation dielectric layer by adopting sixth photoetching, and then adopting a reactive ion etching process, wherein the power is 150W, the pressure is 5mTorr, and the flow rate ratio of gas Cl2 to BCl3 is 75sccm: etching the whole sample wafer downwards by 150nm under the condition of 30 sccm;
and then, ultrasonically cleaning the etched sample wafer in acetone, ethanol and plasma water for 3min respectively in sequence, and drying by using a nitrogen gun.
Step ten: a second metal field plate layer is fabricated as shown in fig. 3 (j).
And (3) putting the sample wafer subjected to the steps into an electron beam evaporation table by adopting an electron beam evaporation process, evaporating Ti/Au metal with the thickness of 100/100nm on the second passivation dielectric layer and the Schottky anode metal layer at the speed of 0.1nm/s to form a second metal field plate layer, and finishing the manufacture of the gallium nitride Schottky diode with the inclined field plate.
The above examples are only for illustrating the technical concept and features of the present invention, and the purpose thereof is to enable those skilled in the art to understand the content of the present invention and to implement the present invention, and not to limit the scope of the present invention, for example, the selection of the cathode and anode metals is not limited to the metal materials given in the examples, but also includes Mo and Pt, but all equivalent changes or modifications made according to the spirit of the present invention should be covered in the scope of the present invention.
Claims (10)
1. A GaN junction barrier Schottky diode with slant field plate comprises an ohmic cathode metal layer (4) and N from bottom to top+Gallium nitride substrate layer (1), N-Gallium nitride epitaxial layer (2), P type junction layer (3) and schottky anode metal layer (5), its characterized in that: a first passivation dielectric layer (6) is arranged above two ends of the Schottky anode metal layer (5); a first metal field plate layer (7) is arranged above the Schottky anode metal layer (5) and the first passivation dielectric layer (6); a second passivation dielectric layer (8) is arranged above two ends of the first metal field plate layer (7); and a second metal field plate layer (9) is arranged above the first metal field plate layer (7) and the second passivation dielectric layer (8).
2. The diode of claim 1, wherein:
said N is-The thickness of the gallium nitride epitaxial layer (2) is 3 um-10 um, and the carrier concentration range is 1E15cm-3～1E16cm-3Said N is+The gallium nitride substrate layer (1) has a carrier concentration of 1E17cm-3～1E18cm-3。
3. The diode of claim 1, wherein the P-type junction layer (3) is made of P-type nickel oxide and has a junction depth of 300nm to 500 nm.
4. The diode of claim 1, wherein:
the first passivation dielectric layer (6) and the second passivation dielectric layer (8) are made of SiO2、Al2O3、Si3N4One of the two, the thickness is 50 nm-200 nm;
the first metal field plate layer (7) and the second metal field plate layer (9) are of a double-layer slant field plate structure, the adopted material is Ti/Au or Au, and the thickness of the material is 50 nm-200 nm.
5. The diode of claim 1, wherein:
the ohmic cathode metal layer (1) is a single layer or a plurality of layers formed by one or more materials of Ti, Al, Ni, Au and Pt;
the Schottky anode metal layer (5) is formed by a single layer or multiple layers of materials formed by one of Ni, Au and W metals.
6. A method for preparing a gallium nitride junction barrier Schottky diode with an oblique field plate is characterized by comprising the following steps:
1) sequentially comprises N from bottom to top+Gallium nitride substrate layer (1), N-On the epitaxial wafer of the gallium nitride epitaxial layer (2), one-time photoetching is adopted to carry out N+Forming a pattern on the lower surface of the gallium nitride substrate layer (1), growing ohmic cathode metal in the pattern area by adopting an electron beam evaporation process, and carrying out thermal annealing treatment to form an ohmic cathode metal layer (4);
2) by using secondary photoetching on N-Forming a pattern on the gallium nitride epitaxial layer (2), and etching the whole sample wafer downwards by 300-500 nm by adopting a reactive ion etching process to form a plurality of finger-shaped grooves;
3) by sputtering process on N-Growing P-type nickel oxide with the thickness of 300-500 nm on the gallium nitride epitaxial layer (2) to form a P-type junction layer (3);
4) using triple lithography on N-Forming a pattern on the gallium nitride epitaxial layer (2), growing a Schottky anode metal layer (5) in the pattern region by adopting an electron beam evaporation process, and carrying out thermal annealing treatment;
5) four times of photoetching are adopted to form patterns at two ends of the Schottky anode metal layer (5), and then the pattern area is etched to N degree by adopting a buffer oxide etching process-The surface of the gallium nitride epitaxial layer (2) is 30-150 nm downward, and the etched wall surface is an inclined wall surface;
6) depositing a first passivation dielectric layer (6) with the thickness of 50 nm-200 nm on the whole sample wafer by adopting a chemical vapor deposition process;
7) forming a pattern on the first passivation dielectric layer (6) by adopting five times of photoetching, and forming holes with the depth of 50-200 nm in a pattern area by adopting a reactive ion etching process;
8) growing a first metal field plate layer (7) with the thickness of 50-200 nm on the upper surface of the whole sample wafer by adopting an electron beam evaporation process;
9) depositing a second passivation dielectric layer (8) with the thickness of 50-200 nm on the first metal field plate layer (7) by adopting a plasma enhanced chemical vapor deposition process;
10) forming a pattern on the second passivation dielectric layer (8) by adopting six times of photoetching, and forming holes with the depth of 50-200 nm in a pattern area by adopting an etching process;
11) and (3) growing a second metal field plate layer (9) with the thickness of 50-200 nm on the upper surface of the whole sample wafer by adopting an electron beam evaporation process to finish the manufacture of the whole device.
7. The method of claim 6, wherein the etching in step (2) is performed by a reactive ion etching process under the following process conditions:
reaction chamber pressure: the number of the 5mtorr is 5mtorr,
reaction chamber gas: cl2And BCl3，
Reaction chamber gas flow rate ratio: cl2：BCl3＝75sccm：30sccm，
RF radio frequency source: 150W to 200W.
8. The method of claim 6, wherein the buffered oxide etching is used in step (5) under the following process conditions:
reaction chamber pressure: the number of the 5mtorr is 5mtorr,
reaction chamber gas: cl2And BCl3，
Reaction chamber gas flow rate ratio: cl2：BCl3＝75sccm：30sccm，
RF radio frequency source: 150W to 200W.
9. The method of claim 6 wherein steps (7) and (9) employ enhanced chemical vapor deposition
The process conditions are as follows:
reaction chamber pressure: the number of the terminal pins is 2000mtorr,
reaction chamber gas: SiH4、N2O、N2These three kinds of gases are, for example,
reaction chamber gas flow rate ratio: SiH4：N2O：N2＝40sccm：710sccm：180sccm，
Temperature of the reaction chamber: at the temperature of between 320 and 370 ℃,
RF radio frequency source: 20W to 30W.
10. The method of claim 6, wherein the process conditions of electron beam evaporation are used in steps (8) and (11)
The following were used:
working vacuum: 5E-4Pa, and the like,
reaction chamber gas: the Ti and the Au are mixed together,
evaporation rate: the concentration of the carbon dioxide is 0.1nm/s,
evaporation power: 30W to 40W.
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