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CN112134550A - Power-on reset circuit - Google Patents

Power-on reset circuit Download PDF

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Publication number
CN112134550A
CN112134550A CN202011010827.2A CN202011010827A CN112134550A CN 112134550 A CN112134550 A CN 112134550A CN 202011010827 A CN202011010827 A CN 202011010827A CN 112134550 A CN112134550 A CN 112134550A
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China
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triode
resistive element
electrically connected
electrode
power
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CN202011010827.2A
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Chinese (zh)
Inventor
孙波
杨逢春
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Suzhou Kunyuan Microelectronics Co ltd
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Suzhou Kunyuan Microelectronics Co ltd
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Priority to CN202011010827.2A priority Critical patent/CN112134550A/en
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22Modifications for ensuring a predetermined initial state when the supply voltage has been applied

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Abstract

The invention discloses a power-on reset circuit. The method comprises the following steps: the circuit comprises a first resistive element, a second resistive element, a third resistive element, a fourth resistive element, a first triode, a second triode, a third triode, a first inverter and a second inverter; the first resistive element is electrically connected with the input end of the power-on reset circuit, and the second end of the first resistive element is electrically connected with the collector electrode of the first triode and the base electrode of the first triode; the emitter of the first triode is grounded; the first end of the second resistive element is electrically connected with the first end of the first resistive element, and the second end of the second resistive element is electrically connected with the collector electrode of the second triode; the base electrode of the second triode is electrically connected with the base electrode of the first triode, the emitting electrode of the second triode is electrically connected with the first end of the third resistive element, and the second end of the third resistive element is grounded; the base electrode of the third triode is electrically connected with the collector electrode of the second triode, the emitter electrode of the third triode is grounded, and the collector electrode of the third triode is electrically connected with the input end of the first inverter. The invention can generate accurate threshold voltage without band gap reference.

Description

Power-on reset circuit
Technical Field
The embodiment of the invention relates to a power-on reset technology, in particular to a power-on reset circuit.
Background
As the Power On Reset (POR) circuit is applied more and more widely in various chip systems, the performance requirement of the Power On Reset circuit is higher and higher.
The existing power-on reset circuit generally adopts a structure based on an MOS tube, however, the threshold voltage of the power-on reset circuit based on the MOS tube structure is greatly influenced by the MOS tube process, and the precision range is low; or a bandgap reference (bandgap reference) -based structure is adopted, however, the bandgap structure is complex, and the bandgap needs to be started first, which is inconvenient to use.
Disclosure of Invention
The invention provides a power-on reset circuit which can generate accurate threshold voltage without band gap reference.
An embodiment of the present invention provides a power-on reset circuit, where the power-on reset circuit includes: the circuit comprises a first resistive element, a second resistive element, a third resistive element, a fourth resistive element, a first triode, a second triode, a third triode, a first inverter and a second inverter; the first resistive element is electrically connected with the input end of the power-on reset circuit, and the second end of the first resistive element is electrically connected with the collector electrode of the first triode and the base electrode of the first triode; the emitting electrode of the first triode is grounded; the first end of the second resistive element is electrically connected with the first end of the first resistive element, and the second end of the first resistive element is electrically connected with the collector electrode of the second triode; a base electrode of the second triode is electrically connected with a base electrode of the first triode, an emitting electrode of the second triode is electrically connected with a first end of the third resistive element, and a second end of the third resistive element is grounded; a first end of the fourth resistive element is electrically connected with a first end of the first resistive element, and a second end of the fourth resistive element is electrically connected with a collector electrode of the third triode; the base electrode of the third triode is electrically connected with the collector electrode of the second triode, the emitter electrode of the third triode is grounded, the collector electrode of the third triode is electrically connected with the input end of the first phase inverter, the output end of the first phase inverter is electrically connected with the input end of the second phase inverter, and the output end of the second phase inverter is electrically connected with the output end of the power-on reset circuit.
Optionally, an emitter area of the second transistor is larger than an emitter area of the first transistor, and an emitter area of the third transistor is equal to the emitter area of the first transistor.
Optionally, the first resistive element and the second resistive element have the same resistance value.
Optionally, the first resistive element, the second resistive element, and the third resistive element are all adjustable resistors.
Optionally, N fourth triodes are connected in series between the collector of the first triode and the second end of the first resistive element, and N fifth triodes are connected in series between the third triode and the second end of the second resistive element; n is a positive integer;
when N is 1, a collector electrode of the fourth triode is electrically connected with the second end of the first resistive element, an emitter electrode of the fourth triode is electrically connected with a collector electrode of the first triode, and a collector electrode of the fourth triode is electrically connected with a base electrode of the fourth triode; a collector electrode of the fifth triode is electrically connected with the second end of the second resistive element, an emitter electrode of the fifth triode is electrically connected with the first end of the third resistive element, and a base electrode of the fifth triode is electrically connected with a base electrode of the fourth triode;
when N is greater than or equal to 2, a collector electrode of the 1 st fourth triode is electrically connected with the second end of the first resistive element, an emitter electrode of the Nth fourth triode is electrically connected with a collector electrode of the first triode, a collector electrode of the fourth triode is electrically connected with a base electrode of the fourth triode, and an emitter electrode of the mth fourth triode is electrically connected with a collector electrode of the (m +1) th fourth triode; a collector electrode of the 1 st fifth triode is electrically connected with the second end of the second resistive element, an emitter electrode of the nth fifth triode is electrically connected with the first end of the third resistive element, and an emitter electrode of the mth fifth triode is electrically connected with a collector electrode of the (m +1) th fifth triode; the base electrode of the kth third triode is electrically connected with the base electrode of the kth fifth triode; m is more than or equal to 1 and less than N, k is more than or equal to 1 and less than or equal to N; m and N are integers.
Optionally, the area of the emitter of the fourth triode is the same as the area of the emitter of the first triode;
and the emitter area of the fifth triode is the same as that of the second triode.
Optionally, the power-on reset circuit further includes: a fifth resistive element and a sixth resistive element; a first end of the fifth resistive element is electrically connected with a collector of the first triode, and a second end of the fifth resistive element is grounded; and the first end of the sixth resistive element is electrically connected with the collector of the second triode, and the second end of the sixth resistive element is grounded.
Optionally, the fifth resistive element and the sixth resistive element have the same resistance value.
Optionally, the fifth resistive element and the sixth resistive element are both adjustable resistors.
Optionally, a base of at least one of the first transistor, the second transistor, and the third transistor is grounded through a capacitor.
According to the technical scheme of the embodiment, the threshold voltage of the power-on reset circuit is only related to the resistance values of the VBE of the triode, the first resistive element and the third resistive element, and the VBE of the triode is less affected by the process, so that the power-on reset circuit can realize accurate threshold voltage without band gap reference, and the application range of the power-on reset circuit can be greatly enlarged.
Drawings
Fig. 1 is a schematic circuit structure diagram of a power-on reset circuit according to an embodiment of the present invention;
fig. 2 is a schematic circuit diagram of a power-on reset circuit according to another embodiment of the present invention;
fig. 3 is a schematic circuit diagram of a power-on reset circuit according to another embodiment of the present invention;
fig. 4 is a schematic circuit structure diagram of another power-on reset circuit according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a schematic circuit structure diagram of a power-on reset circuit according to an embodiment of the present invention, and referring to fig. 1, the power-on reset circuit includes: a first resistive element R1, a second resistive element R2, a third resistive element R3, a fourth resistive element R4, a first transistor Q1, a second transistor Q2, a third transistor Q3, a first inverter INV1, and a second inverter INV 2; the first resistive element R1 is electrically connected to the input Vin of the power-on reset circuit, and the second end of the first resistive element R1 is electrically connected to the collector of the first triode Q1 and the base of the first triode Q1; the emitter of the first triode Q1 is grounded; a first terminal of the second resistive element R2 is electrically connected to a first terminal of the first resistive element R1, and a second terminal of the first resistive element R1 is electrically connected to a collector of the second transistor Q2; the base electrode of the second triode Q2 is electrically connected with the base electrode of the first triode Q1, the emitter electrode of the second triode Q2 is electrically connected with the first end of the third resistive element R3, and the second end of the third resistive element R3 is grounded; a first terminal of the fourth resistive element R4 is electrically connected to a first terminal of the first resistive element R1, and a second terminal of the fourth resistive element R4 is electrically connected to a collector of the third transistor Q3; the base of the third triode Q3 is electrically connected with the collector of the second triode Q2, the emitter of the third triode Q3 is grounded, the collector of the third triode Q3 is electrically connected with the input end of the first inverter INV1, the output end of the first inverter INV1 is electrically connected with the input end of the second inverter INV2, and the output end of the second inverter INV2 is electrically connected with the output end Vout of the power-on reset circuit.
Specifically, the power-on reset circuit can be used for generating a reset signal when the system is just powered on and the power supply voltage does not reach the expected stable state, so as to initialize the system and prevent the voltage and the logic level of each node in the system from being damaged due to the unknown state. The resistive element may be a resistor, the transistor may be an NPN transistor, for example, and the first inverter INV1 and the second inverter INV2 may be configured to filter an analog voltage output from the collector of the third transistor Q3, and then convert the filtered analog voltage into a standard voltage, i.e., a constant digital signal, and then output the standard voltage, so that the system starts initialization. When the output end Vout of the power-on reset circuit just outputs, namely, the power-on reset circuit is powered on at the momentThe voltage input by the input end Vin of the reset circuit is the threshold voltage of the power-on reset circuit; to explain the calculation of the threshold voltage of the power-on reset circuit in detail, for convenience of calculation, the emitter area of the second transistor Q2 may be set to be larger than the area of the first transistor Q1, for example, the emitter area of the second transistor Q2 may be set to be n times the emitter area of the first transistor Q1, and the emitter area of the first transistor Q1 may be set to be the same as the emitter area of the third transistor Q3; and sets the resistance value R of the first resistive element R11And a resistance value R of the second resistive element R22The same is true. When the output end Vout of the power-on reset circuit just outputs, the input voltage of the input end Vin of the power-on reset circuit is set to be Vtpor, and the Vtpor is also the threshold voltage of the power-on reset circuit; at this time IR1=(Vtpor-VBE1)/R1VBE1 ═ VBE3, available as IR1*R1=IR2*R2(ii) a According to formula I of current of triodeE=I0*e(VBE/Vt)VBE ═ Vt × ln (I) can be obtainedE/I0) (ii) a Then there is
VBE1-VBE2=Vt*ln(IE1/I0)-Vt*ln[IE2/(nI0)]=Vt*ln(n*IE1/IE2)=Vt*ln(n*R2/R1),IR3=(VBE1-VBE2)/R3=Vt*ln(n*R2/R1)/R3=IR2
Because R is1=R2Then Vt x ln (n/R)3)=(Vtpor-VBE1)/R1
Thus, Vtpor VBE + Vt (R) can be obtained1/R3) Lnn. VBE1 is the voltage between the base and emitter of the first triode, IR1The voltage between the base and the emitter of the third triode is VBE3, the voltage between the base and the emitter of the second triode is VBE2, and I is the current flowing through the first resistive elementR2Is the current flowing through the second resistive element R2, IR3Is the current flowing through the third resistive element R3, R3The resistance value of the third resistive element R3, that is, the final threshold voltage calculation formula, the voltage between the base electrode and the emitter electrode of the triode, and the resistances of the first resistive element and the third resistive elementThe values are related, and because the NPN triode is a bipolar device, the VBE of the NPN triode is subjected to small process fluctuation deviation, so that Vtpor is relatively accurate, that is, the power-on reset circuit in this embodiment can realize accurate threshold voltage without bandgap, and the circuit structure is relatively simple, which is beneficial to expanding the application range of the power-on reset circuit.
According to the technical scheme of the embodiment, the threshold voltage of the power-on reset circuit is only related to the resistance values of the VBE of the triode, the first resistive element and the third resistive element, and the VBE of the triode is less affected by the process, so that the power-on reset circuit can realize accurate threshold voltage without band gap reference, and the application range of the power-on reset circuit can be greatly enlarged.
Optionally, the first resistive element R1, the second resistive element R2, and the third resistive element R3 are both adjustable resistors. Specifically, Vtpor and R can be seen from the expression of the threshold voltage Vtpor of the power-on reset circuit1And R2In other words, the resistance values of the first resistive element, the second resistive element, and the third resistive element are all adjustable resistors, so that the value of Vtpor is adjustable, for example, by reasonably setting R1And R2Such that Vtpor is about the reference voltage (i.e., the voltage of the bandgap reference, bandgap reference VREF-VBE + K Vt, where K is a constant).
Optionally, fig. 2 is a schematic circuit structure diagram of another power-on reset circuit according to an embodiment of the present invention, and referring to fig. 2, N fourth transistors Q4k are connected in series between a collector of the first transistor Q1 and a second end of the first resistive element R1, and N fifth transistors Q5k are connected in series between the third transistor Q1 and a second end of the second resistive element R2; n is a positive integer; when N is 1, a collector of the fourth triode Q4k is electrically connected to the second end of the first resistive element R1, an emitter of the fourth triode Q4k is electrically connected to a collector of the first triode Q1, and a collector of the fourth triode Q4k is electrically connected to a base of the fourth triode Q4 k; a collector of the fifth triode Q5k is electrically connected to the second end of the second resistive element, an emitter of the fifth triode Q5k is electrically connected to the first end of the third resistive element R3, and a base of the fifth triode Q5k is electrically connected to a base of the fourth triode Q4 k; when N is greater than or equal to 2, the collector of the 1 st fourth triode Q4k is electrically connected to the second end of the first resistive element R1, the emitter of the nth fourth triode Q4k is electrically connected to the collector of the first triode Q1, the collector of the fourth triode Q4k is electrically connected to the base thereof, and the emitter of the mth fourth triode Q4k is electrically connected to the collector of the m +1 th fourth triode Q4 k; a collector of the 1 st fifth transistor Q5k is electrically connected to the second end of the second resistive element R2, an emitter of the nth fifth transistor Q5k is electrically connected to the first end of the third resistive element R3, and an emitter of the mth fifth transistor Q5k is electrically connected to a collector of the m +1 th fifth transistor Q5 k; the base electrode of the kth fourth triode Q4k is electrically connected with the base electrode of the kth fifth triode Q5 k; m is more than or equal to 1 and less than N, k is more than or equal to 1 and less than or equal to N; m and N are integers.
In this embodiment, through increasing fourth triode and fifth triode, the degree of freedom that power-on reset circuit Vtpor adjusted can be multiplicable for Vtpor's value range can be more extensive. For convenience of calculation, the area of the emitter of the fourth triode is the same as that of the emitter of the first triode, and the area of the emitter of the fifth triode is the same as that of the emitter of the second triode. Can be equivalent to N +1 first triodes Q1 and N +1 second triodes Q2, when the voltage of the input end of the power-on reset circuit reaches the threshold voltage Vtpor, I is providedR1=(Vtpor-(N+1)*VBE1)/R1VBE1 ═ VBE3, available as IR1*R1=IR2*R2(ii) a According to formula I of current of triodeE=I0*e(VBE/Vt)VBE ═ Vt × ln (I) can be obtainedE/I0) (ii) a Then VBE1-VBE2 ═ Vt × ln (I)E1/I0)-Vt*ln[IE2/(nI0)]=Vt*ln(n*IE1/IE2)=Vt*ln(n*R2/R1),IR3=(VBE1-VBE2)/R3=Vt*ln(n*R2/R1)/R3=IR2
Because R is1=R2Then Vt x ln (n/R)3)=(Vtpor-(N+1)*VBE1)/R1
Thus, Vtpor (N +1) VBE + Vt (R) can be obtained1/R3) Lnn. That is, the threshold voltage of the power-on reset circuit is related to the number of the fourth triodes and the number of the fifth triodes which are connected in series, the freedom degree of threshold voltage adjustment is correspondingly increased, the design of the power-on reset circuit is facilitated, and the application range is further expanded.
Optionally, fig. 3 is a schematic circuit structure diagram of another power-on reset circuit provided in an embodiment of the present invention, and referring to fig. 3, the power-on reset circuit further includes a fifth resistive element R5 and a sixth resistive element R6; a first end of the fifth resistive element R5 is electrically connected to the collector of the first transistor Q1, and a second end of the fifth resistive element R5 is grounded; a first terminal of the sixth resistive element R6 is electrically connected to the collector of the second transistor Q2, and a second terminal of the sixth resistive element R6 is grounded.
In this embodiment, by adding the fifth resistive element R5 and the sixth resistive element R6, and the fifth resistive element R5 and the sixth resistive element R6 may be resistors, for example, so that the threshold voltage of the power-on reset circuit is related to the fifth resistive element R5 and the sixth resistive element R6, and thus the freedom of adjusting the threshold voltage of the power-on reset circuit is increased, the adjustment range of the threshold voltage is wider, and the application of the power-on reset circuit is facilitated.
For convenience of calculation, the fifth resistive element R5 and the sixth resistive element R6 have the same resistance value, and when the voltage at the input terminal of the power-on reset circuit reaches the threshold voltage Vtpor, I is defined asR1=(Vtpor-VBE1)/R1VBE1 ═ VBE3, available as IR1*R1=IR2*R2(ii) a According to formula I of current of triodeE=I0*e(VBE/Vt)VBE ═ Vt × ln (I) can be obtainedE/I0) (ii) a Then there is
VBE1-VBE2=Vt*ln(IE1/I0)-Vt*ln[IE2/(nI0)]=Vt*ln(n*IE1/IE2)=Vt*ln(n*R2/R1),IR3=(VBE1-VBE2)/R3=Vt*ln(n*R2/R1)/R3=IR2-VBE/R5,Vt*ln(n/R3)+VBE/R5=(Vtpor-VBE1)/R1Thus, Vtpor VBE (1+ R) can be obtained1/R5)+Vt*(R1/R3) Lnn. Wherein R is5Is the resistance of the fifth resistive element, i.e. Vtpor is also equal to R5Correlation, can be achieved by reasonably setting R1、R3And R5The threshold voltage of the power-on reset circuit can be made to be any multiple of the reference voltage.
Optionally, the fifth resistive element R5 and the sixth resistive element R6 are both adjustable resistors.
So arranged, R can be conveniently adjusted5To thereby facilitate adjustment of R1/R5The threshold voltage of the power-on reset circuit can be adjusted more easily, and the setting of a plurality of threshold voltages can be realized by using one power-on reset circuit, so that the application of the power-on reset circuit is facilitated.
Optionally, the base of at least one of the first transistor Q1, the second transistor Q2, and the third transistor Q3 is grounded through a capacitor.
Specifically, as shown in fig. 4, fig. 4 is a schematic circuit structure diagram of another power-on reset circuit according to an embodiment of the present invention, in fig. 4, a base of each transistor is grounded through a capacitor, that is, a base of the first transistor Q1 is grounded through a first capacitor C1, a base of the second transistor Q2 is grounded through a second capacitor C2, and a base of the third transistor Q3 is grounded through a third capacitor C3; the capacitor can play a role in filtering, so that the voltage of the base electrode of the triode is more stable, noise waves are prevented from interfering the triode, and the working stability of the power-on reset circuit is enhanced.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (10)

1. A power-on-reset circuit, comprising:
the circuit comprises a first resistive element, a second resistive element, a third resistive element, a fourth resistive element, a first triode, a second triode, a third triode, a first inverter and a second inverter;
the first resistive element is electrically connected with the input end of the power-on reset circuit, and the second end of the first resistive element is electrically connected with the collector electrode of the first triode and the base electrode of the first triode; the emitting electrode of the first triode is grounded; the first end of the second resistive element is electrically connected with the first end of the first resistive element, and the second end of the first resistive element is electrically connected with the collector electrode of the second triode; a base electrode of the second triode is electrically connected with a base electrode of the first triode, an emitting electrode of the second triode is electrically connected with a first end of the third resistive element, and a second end of the third resistive element is grounded; a first end of the fourth resistive element is electrically connected with a first end of the first resistive element, and a second end of the fourth resistive element is electrically connected with a collector electrode of the third triode; the base electrode of the third triode is electrically connected with the collector electrode of the second triode, the emitter electrode of the third triode is grounded, the collector electrode of the third triode is electrically connected with the input end of the first phase inverter, the output end of the first phase inverter is electrically connected with the input end of the second phase inverter, and the output end of the second phase inverter is electrically connected with the output end of the power-on reset circuit.
2. The power-on-reset circuit of claim 1,
the area of the emitting electrode of the second triode is larger than that of the emitting electrode of the first triode, and the area of the emitting electrode of the third triode is equal to that of the emitting electrode of the first triode.
3. The power-on-reset circuit of claim 1,
the first resistive element and the second resistive element have the same resistance value.
4. The power-on-reset circuit of claim 1,
the first resistive element, the second resistive element and the third resistive element are all adjustable resistors.
5. The power-on reset circuit according to claim 1, wherein N fourth transistors are connected in series between the collector of the first transistor and the second end of the first resistive element, and N fifth transistors are connected in series between the third transistor and the second end of the second resistive element; n is a positive integer;
when N is 1, a collector electrode of the fourth triode is electrically connected with the second end of the first resistive element, an emitter electrode of the fourth triode is electrically connected with a collector electrode of the first triode, and a collector electrode of the fourth triode is electrically connected with a base electrode of the fourth triode; a collector electrode of the fifth triode is electrically connected with the second end of the second resistive element, an emitter electrode of the fifth triode is electrically connected with the first end of the third resistive element, and a base electrode of the fifth triode is electrically connected with a base electrode of the fourth triode;
when N is greater than or equal to 2, a collector electrode of the 1 st fourth triode is electrically connected with the second end of the first resistive element, an emitter electrode of the Nth fourth triode is electrically connected with a collector electrode of the first triode, a collector electrode of the fourth triode is electrically connected with a base electrode of the fourth triode, and an emitter electrode of the mth fourth triode is electrically connected with a collector electrode of the (m +1) th fourth triode; a collector electrode of the 1 st fifth triode is electrically connected with the second end of the second resistive element, an emitter electrode of the nth fifth triode is electrically connected with the first end of the third resistive element, and an emitter electrode of the mth fifth triode is electrically connected with a collector electrode of the (m +1) th fifth triode; the base electrode of the kth third triode is electrically connected with the base electrode of the kth fifth triode; m is more than or equal to 1 and less than N, k is more than or equal to 1 and less than or equal to N; m and N are integers.
6. The power-on-reset circuit of claim 5,
the area of an emitting electrode of the fourth triode is the same as that of the emitting electrode of the first triode;
and the emitter area of the fifth triode is the same as that of the second triode.
7. The power-on-reset circuit of claim 1,
the power-on reset circuit further comprises:
a fifth resistive element and a sixth resistive element;
a first end of the fifth resistive element is electrically connected with a collector of the first triode, and a second end of the fifth resistive element is grounded;
and the first end of the sixth resistive element is electrically connected with the collector of the second triode, and the second end of the sixth resistive element is grounded.
8. The power-on-reset circuit of claim 7,
the fifth resistive element and the sixth resistive element have the same resistance value.
9. The power-on-reset circuit of claim 7,
and the fifth resistive element and the sixth resistive element are both adjustable resistors.
10. The power-on-reset circuit of claim 1, wherein a base of at least one of the first transistor, the second transistor, and the third transistor is coupled to ground via a capacitor.
CN202011010827.2A 2020-09-23 2020-09-23 Power-on reset circuit Pending CN112134550A (en)

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CN110971218A (en) * 2019-12-18 2020-04-07 成都海光微电子技术有限公司 Power-on reset circuit
CN111682503A (en) * 2020-06-17 2020-09-18 苏州纳芯微电子股份有限公司 Undervoltage protection circuit

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Publication number Priority date Publication date Assignee Title
CN202737831U (en) * 2012-09-06 2013-02-13 代玲玲 Novel power-on reset circuit
CN107066018A (en) * 2017-06-29 2017-08-18 英麦科(厦门)微电子科技有限公司 A kind of accurate por circuit
CN107707232A (en) * 2017-10-31 2018-02-16 上海贝岭股份有限公司 The electrification reset circuit of reset threshold level-variable
CN110875733A (en) * 2018-09-03 2020-03-10 雅特力科技(重庆)有限公司 Power-on reset signal generator and related electronic device
CN110971218A (en) * 2019-12-18 2020-04-07 成都海光微电子技术有限公司 Power-on reset circuit
CN111682503A (en) * 2020-06-17 2020-09-18 苏州纳芯微电子股份有限公司 Undervoltage protection circuit

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Application publication date: 20201225