CN111884191B - A power failure protection circuit and its application - Google Patents
A power failure protection circuit and its application Download PDFInfo
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- CN111884191B CN111884191B CN202010838444.8A CN202010838444A CN111884191B CN 111884191 B CN111884191 B CN 111884191B CN 202010838444 A CN202010838444 A CN 202010838444A CN 111884191 B CN111884191 B CN 111884191B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
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Abstract
本发明公开了一种停电保护电路及其应用，包括主电路、电源电路、检测电路和逻辑控制电路，主电路为带光电隔离器U4的双向可控硅开关电路；电源电路为半波整流电路；电源电路与检测电路之间设有开关SW1，检测电路包括延时电路和开关状态检测电路，可实现对电网和开关SW1的状态检测；逻辑控制电路包括与非逻辑控制器U1、U2、U3，控制U4的输入脚2电平，从而控制U4“1”和“2”脚之间的电压差实现对双向可控硅的控制。当工作电路运行时突然停电，电网和开关检测信号异常，电路停止运行，开关SW1未断开；上电后电网检测正常，但检测到开关处于闭合状态，逻辑控制电路不会输出触发信号，启动主电路，需对开关进行断开再闭合操作才可正常运行。
The invention discloses a power failure protection circuit and its application, including a main circuit, a power supply circuit, a detection circuit and a logic control circuit. The main circuit is a bidirectional thyristor switch circuit with a photoelectric isolator U4; the power supply circuit is a half-wave rectifier circuit; a switch SW1 is arranged between the power supply circuit and the detection circuit, the detection circuit includes a delay circuit and a switch state detection circuit, and can realize the state detection of the power grid and the switch SW1; the logic control circuit includes a non-AND logic controller U1, U2, and U3, which controls the level of the input pin 2 of U4, thereby controlling the voltage difference between the "1" and "2" pins of U4 to realize the control of the bidirectional thyristor. When the working circuit is running, the power is suddenly cut off, the power grid and the switch detection signal are abnormal, the circuit stops running, and the switch SW1 is not disconnected; after power-on, the power grid detection is normal, but it is detected that the switch is in a closed state, the logic control circuit will not output a trigger signal, start the main circuit, and the switch needs to be disconnected and then closed before it can run normally.
Description
Technical Field
The invention belongs to the technical field of power electronic protection, and particularly relates to a power failure protection circuit and application thereof.
Background
Common household appliances such as electric furnaces, electric lamps, electric tools and the like adopt a common on-off switch as a main element for switching on and off a circuit, when the electric furnace, the electric lamp, the electric tool and the like are powered on again after sudden power failure, the circuit can be restarted automatically, and great potential safety hazards exist for the electric furnaces, the electric tools and the like, and waste of electric energy can be caused for an illumination circuit; therefore, a new circuit with a power failure protection function needs to be designed.
Disclosure of Invention
The invention aims to provide a power failure protection circuit and application thereof, and solves the problem of automatic restarting of the circuit after power failure.
The invention is realized by the following technical scheme:
a power failure protection circuit comprises a power supply circuit, a detection circuit, a logic control circuit and a main circuit;
a power supply circuit for converting alternating current into direct current;
A switch SW1 is arranged between the power supply circuit and the detection circuit, the detection circuit comprises a delay circuit and a switch state detection circuit, the delay circuit is used for detecting the state of the power grid, and the switch state detection circuit is used for detecting the state of the switch SW 1;
The logic control circuit comprises a NAND logic controller U1, a NAND logic controller U2 and a NAND logic controller U3, wherein the NAND logic controller U1 comprises an input pin 1, an input pin 2 and an output pin 3, the NAND logic controller U2 comprises an input pin 4, an input pin 5 and an output pin 6, and the NAND logic controller U3 comprises an input pin 9, an input pin 10 and an output pin 11;
the switch SW1 is connected with the input pin 4 and the input pin 9 through a switch state detection circuit, the delay circuit is connected with the input pin 2, the output pin 3 is connected with the input pin 5, the input pin 1 is connected with the output pin 6, and the input pin 10 is connected with the output pin 6;
The main circuit is a bidirectional thyristor circuit with drive, one input end of the main circuit is connected with the output end of the power circuit, the other input end of the main circuit is connected with the output pin 11 of the NAND logic controller U3, and when the output pin 11 outputs high level, the bidirectional thyristor circuit is not conducted; when the output pin 11 outputs a low level, the triac turns on for powering the load.
Further, when the switch SW1 is in the off state, the switch state detection circuit outputs a low level, and the input pin 4 and the input pin 9 are in the low level; when SW1 is in the closed state, the switch state detection circuit outputs a high level, and the input pin 4 and the input pin 9 are at a high level;
when the input end of the power supply circuit is not connected to the power grid, the input pin 2 is in a low level, and when the input end of the power supply circuit is connected to the power grid, the input pin 2 is in a high level.
Further, the power circuit comprises a diode D1, a resistor R1, a voltage-stabilizing diode D2 and a capacitor C1, wherein the diode D1, the resistor R1 and the capacitor C1 are sequentially connected, and the voltage-stabilizing diode D2 and the capacitor C1 are arranged in parallel;
The diode D1 is used for converting alternating current into direct current, the resistor R1 and the internal resistance of the circuit form a voltage dividing circuit, the capacitor C1 is used for filtering, and the voltage stabilizing diode D2 is used for protecting a later-stage circuit.
Further, the main circuit comprises a photoelectric isolator U4 and a bidirectional thyristor TRIAC1, wherein an input pin1 of the photoelectric isolator U4 is connected with an output end of the power supply circuit through a resistor R5, and an input pin 2 of the photoelectric isolator U4 is connected with an output pin 11 of the NAND logic controller U3;
An output pin 4 of the photoelectric isolator U4 is connected with one end of the bidirectional thyristor TRIAC1 through a resistor R7, and an output pin 6 of the photoelectric isolator U4 is connected with the other end of the bidirectional thyristor TRIAC 1;
The resistor R5, the photoelectric isolator U4 and the resistor R7 form a driving circuit of the bidirectional thyristor TRIAC 1.
Further, the model of the TRIAC1 is BAT06-600.
Further, the delay circuit comprises a resistor R4 and a capacitor C3, wherein the input end of the resistor R4 is connected with the output end of the power supply circuit, the output end of the resistor R4 is respectively connected with one end of the capacitor C3 and the input pin 2 of the U1, and the other end of the capacitor C3 is connected with the negative electrode of the power supply.
Further, the switch state detection circuit comprises a diode D3, a resistor R3, a capacitor C2 and a resistor R6, wherein the diode D3, the resistor R3 and the resistor R6 are sequentially connected, the resistor R6 is arranged in parallel with the capacitor C2, and the output end of the resistor R3 is connected with the input pin 4 of the U2 and the input pin 9 of the U3;
The diode D3 is used for converting alternating current into direct current, and the resistor R3 and the resistor R6 form a voltage dividing circuit; the capacitor C2 is used for filtering to obtain a flat switching signal.
Further, the nand logic controller U1, the nand logic controller U2, and the nand logic controller U3 all employ schmitt nand gates.
The invention also discloses application of the power failure protection circuit, and the switch SW1 is used as a control switch of the electric appliance to control the on-off of the circuit of the electric appliance.
Compared with the prior art, the invention has the following beneficial technical effects:
The invention discloses a power failure protection circuit, which comprises a main circuit, a power supply circuit, a detection circuit and a logic control circuit, wherein the main circuit is a bidirectional thyristor circuit with a drive, and the detection circuit comprises a delay circuit and a switch state detection circuit and can realize state detection of a power grid and a switch SW 1; the logic control circuit comprises NAND logic controllers U1, U2 and U3, and determines the working modes of the NAND logic controllers according to the high-low level signals of the pins of the U1, U2 and U3. When the output pin 11 of the U3 outputs a high level, the bidirectional thyristor is not conducted; when the output pin 11 of the U3 outputs a low level, the triac is turned on for powering the load. When the working circuit runs, the power is suddenly cut off, the power grid and the switch detect signals are abnormal, the circuit stops running, and the switch SW1 is not disconnected; after the power is on, the power grid is normally detected, but the switch is detected to be in a closed state, the logic control circuit does not output a trigger signal, the main circuit is started, and the normal operation can be realized only by opening and reclosing the switch.
Further, the main circuit comprises a photoelectric isolator U4 and a bidirectional thyristor TRIAC1, one of two input pins of the photoelectric isolator is connected with a power supply circuit, the other input pin is connected with an output pin of the NAND logic controller U3, and the bidirectional thyristor is controlled by controlling the voltage difference between the two input pins of the U4.
Further, the diode D1 converts the alternating current into direct current, and the grid voltage converts the alternating current into direct current through the diode D1; because the amplitude of the rectified power grid voltage is higher, the voltage is reduced by using a voltage dividing circuit, the voltage dividing circuit consists of a resistor R1 and the internal resistance of the circuit, and the resistor R1 and the internal resistance of the circuit are divided to obtain the required voltage grade; the rectified direct current is pulsating direct current, the stable operation of the circuit needs the direct current with smaller fluctuation, the capacitor C1 is a filter circuit, and the pulsation of the direct current is reduced; and filtering by a capacitor C1 to obtain a flat direct current, and protecting a later-stage circuit by using a voltage stabilizing diode D2 in order to prevent the surge abrupt change of the power grid voltage, so that the later-stage circuit can be protected by transient overvoltage of the circuit, and the voltage stabilizing diode D2 is overvoltage protection for preventing the power grid surge.
The invention also discloses application of the power failure protection circuit, and safety, stability and energy conservation of household appliances or circuits can be realized.
Drawings
Fig. 1 is a schematic circuit diagram of an inventive power outage protection circuit.
Detailed Description
The invention will now be described in further detail with reference to specific examples, which are intended to illustrate, but not to limit, the invention.
As shown in FIG. 1, the power failure protection circuit disclosed by the invention comprises a main circuit, a power supply circuit, a detection circuit and a logic control circuit. The main circuit is a bidirectional thyristor circuit with a drive; the power supply circuit is a half-wave rectification circuit and is used for converting alternating current into direct current; a switch SW1 is arranged between the power supply circuit and the detection circuit, the detection circuit comprises a delay circuit and a switch state detection circuit, the delay circuit is used for detecting the state of the power grid, and the switch state detection circuit is used for detecting the state of the switch SW 1; the logic control circuit comprises three NAND logic controllers, and the level of a pin 2 of the photoelectric isolator U4 is controlled through the connection of the three NAND logic controllers, so that the voltage difference between the pins 1 and 2 of the photoelectric isolator U4 is controlled, and the control of the bidirectional triode thyristor is realized.
The main circuit comprises a photoelectric isolator U4 and a bidirectional thyristor TRIAC1, wherein an input pin 1 of the photoelectric isolator U4 is connected with the power circuit, an input pin 2 of the photoelectric isolator U4 is connected with an output pin 11 of the NAND logic controller U3, and an output pin of the photoelectric isolator U4 is connected with the bidirectional thyristor TRIAC 1. The photoelectric isolator U4 is used as a driving device, and the level of a '2' pin of the photoelectric isolator U4 is controlled through the connection of three NAND logic controllers, so that the voltage difference between the '1' pin and the '2' pin of the photoelectric isolator U4 is controlled, and the control of the bidirectional thyristor is realized.
Specifically, the logic control circuit includes a nand logic controller U1, a nand logic controller U2, and a nand logic controller U3, the nand logic controller U1 includes an input pin 1, an input pin 2, and an output pin 3, the nand logic controller U2 includes an input pin 4, an input pin 5, and an output pin 6, and the nand logic controller U3 includes an input pin 9, an input pin 10, and an output pin 11.
Specifically, the power supply circuit comprises a diode D1, a resistor R1, a zener diode D2 and a capacitor C1, wherein the diode D1, the resistor R1 and the capacitor C1 are sequentially connected, and the zener diode D2 is connected with the capacitor C1 in parallel; the circuit needs a direct current power supply to work, so that an alternating current/direct current conversion circuit is formed by a diode D1, a resistor R1, a voltage stabilizing diode D2 and a capacitor C1, and the direct current power supply is provided for a system. The rectification part of the power supply circuit uses a simplest half-wave rectification circuit, wherein a diode D1 converts alternating current into direct current, and the power grid voltage converts the alternating current into direct current through the diode D1; because the amplitude of the rectified power grid voltage is higher, the voltage is reduced by using a voltage dividing circuit, the voltage dividing circuit consists of a resistor R1 and the internal resistance of the circuit, and the resistor R1 and the internal resistance of the circuit are divided to obtain the required voltage grade; the rectified direct current is pulsating direct current, the stable operation of the circuit needs the direct current with smaller fluctuation, the capacitor C1 is a filter circuit, and the pulsation of the direct current is reduced; and filtering by a capacitor C1 to obtain a flat direct current, and protecting a later-stage circuit by using a voltage stabilizing diode D2 in order to prevent the surge abrupt change of the power grid voltage, so that the later-stage circuit can be protected by transient overvoltage of the circuit, and the voltage stabilizing diode D2 is overvoltage protection for preventing the power grid surge.
As shown in fig. 1, the input end of the resistor R4 is connected with the output end of the resistor R1, the output end of the resistor R4 is respectively connected with one end of the capacitor C3 and the input pin 2 of the U1, and the other end of the capacitor C3 is connected with the negative electrode of the power supply. After the AC input is connected to the power grid, the DC power supply outputs stable DC power supply, the DC power supply can provide DC power for the system, and the DC power supply is not controlled by the switch SW1, so that the power failure protection circuit can work only by connecting the power failure protection circuit to the mains supply, the power grid working state (normal power supply or power failure state) can be judged by detecting the DC power supply output through the delay circuit consisting of the resistor R4 and the capacitor C3, when the power grid is normally powered, the input pin 2 of the U1 is at a high level after the delay circuit consisting of the resistor R4 and the capacitor C3 is charged, and otherwise, the input pin 2 of the U1 is at a low level when the power grid is in power failure.
The switch state detection circuit composed of the diode D3, the resistor R3, the capacitor C2 and the resistor R6 outputs a low level when the switch SW1 is in an off state, i.e. the input pin 4 of the U2 is at a low level. When SW1 is in the closed state, the switch state detection circuit will output a high level, i.e. the input pin 4 of U2 will be at a high level.
Similar to a power supply circuit, the switch state detection circuit composed of the diode D3, the resistor R3, the capacitor C2 and the resistor R6 uses the half-wave rectification circuit to convert alternating current into direct current, the main part of the circuit is the diode D3, the voltage level is reduced by using the voltage dividing circuit, the voltage dividing circuit is composed of the resistor R3 and the equivalent resistor R6 of a pin, in order to reduce voltage fluctuation, the capacitor C2 is used for filtering, a relatively straight switch signal is obtained, and when the switch SW1 is in an off state, the switch state detection circuit outputs a low level, namely the input pin 4 of the U2 is in a low level. When SW1 is in the closed state, the switch state detection circuit will output a high level, i.e. the input pin 4 of U2 will be at a high level.
The resistor R5, the photoelectric isolator U4 and the resistor R7 form a bidirectional thyristor drive circuit, the input pin 1 of the U4 is connected with the resistor R1 through the resistor R5, the output pin 4 of the U4 is connected with one end of the bidirectional thyristor TRIAC1 through the resistor R7, and the output pin 6 of the U4 is connected with the other end of the bidirectional thyristor TRIAC 1; the input pin 2 of the U4 is connected with the output pin 11 of the U3, and the output pin 6 of the U4 is connected with the pin 3 of the bidirectional thyristor. One end of the resistor R7 is connected with the 2 pin of the bidirectional thyristor, and the other end is connected with the output pin 4 of the U4.
When the pin 2 of the U4 is at a high level, the light emitting diode in the U4 is not conducted, the controlled diode connected with the pin 6 and the pin 4 of the U4 in the U4 is not conducted, the conduction of the TRIAC1 cannot be triggered, and otherwise, if the pin 2 of the U4 is at a low level, the TRIAC1 is conducted. R7 is a limiting resistor to prevent the conduction current from being excessive when the controlled diode in the U4 is conducted. The 3 pin of the TRIAC1 is the gate electrode of the TRIAC, so long as the 2 pin of the U4 is low level, the 3 pin of the TRIAC1 will have a trigger signal, the 1 pin and the 2 pin of the TRIAC1 are on, if the 2 pin of the U4 is high level, the 3 pin of the TRIAC1 has no trigger signal, and the 1 pin and the 2 pin of the TRIAC are off.
U1, U2, U3 constitute the logic control circuit of power failure protection circuit. Judging the power supply state of the power grid through the high-low level state of the 2 pins of the U1; the switching state of the switch SW1 is determined by determining the 4-pin high-low state of U2.
Let 1 represent a high level and 0 represent a low level. The following modes of operation are presented in tables 1-7 for the pin levels of circuits U1, U2, U3 and U4 in each operating state.
Modality I: when the input end of the power failure protection circuit is connected to the power grid, and the switch SW1 is in an off state. At this time, since the resistor R4 and the capacitor C3 form a delay circuit, the pin 2 of the U1 is at a low level before the voltage of the capacitor C3 does not reach the threshold voltage of the U1. At the same time, since switch SW1 is in the off state, pin 4 of U2 is also at a low level. Therefore, the 3 pin of U1 and the 6 pin of U2 output high level, the 1 pin of U1 is connected with the 6 pin of U2, and the 1 pin of U1 is also high level. Since pin 9 of U3 is connected to pin 4 of U2, pin 11 of U3 also outputs a high level. Therefore, the pin 2 of the U4 is at a high level, the light emitting diode in the U4 cannot be conducted, and the TRIAC1 is in an off state and cannot supply power to a load. The truth tables of U1, U2 and U3 pins are shown in Table 1.
TABLE 1 truth table of U1, U2, U3 pins at modality I
Modality II: when the input end of the power failure protection circuit is connected to the power grid, the switch SW1 is still in an off state. At this time, the delay circuit composed of the resistor R4 and the capacitor C3 has completed the charging process, i.e. the voltage on the capacitor C3 has reached the threshold voltage of U1, and the pin 2 of U1 is at high level. Since pin 1 of U1 is also at the level at this time, pin 3 of U1 outputs a low level at this time. Since pin 5 of U2 is connected with pin 3 of U1, pin 5 of U2 is also low level; since switch SW1 is still in the off state, pin 4 of U2 is still in the low state, so pin 6 of U2 is still high. Meanwhile, the level states of the 9 pin and the 10 pin of the U3 are kept unchanged, so that the output of the 11 pin of the U3 is still at a high level, and the in-vivo light emitting diode of the U4 is disconnected. At this time, the truth tables of U1, U2 and U3 pins are shown in Table 2.
TABLE 2 Modal II U1, U2, U3 Pin truth table
Modality III: in the mode II state, the switch SW1 is closed. The switch state detection circuit composed of the diode D3, the resistor R3, the capacitor C2 and the resistor R6 outputs high level, and at the moment, the 4 pin of the U2 and the 9 pin of the U3 are converted from low level to high level. The state of U1 is unchanged, pin 5 of U2 is still at a low level, so pin 6 of U2 is still outputting a high level, so pin 10 of U3 is still at a high level, and pin 11 of U3 is outputting a low level. The in-vivo light emitting diode of U4 is conducted to trigger the conduction of the bidirectional thyristor TRIAC1, and power is supplied to an electric load connected with the output end. At this time, the truth tables of U1, U2 and U3 pins are shown in Table 3.
TABLE 3 Modal III U1, U2, U3 Pin truth table
Modality IV: when the power grid supplies power normally, the pin states of the switches SW1, U1, U2 and U3 are turned off, the pin states in the mode II are restored, and the bidirectional thyristor TRIAC1 is turned off as shown in the table 4.
Table 4 Modal IV U1, U2, U3 Pin truth table
V: in the state of the mode III, the power grid suddenly fails, the switch SW1 is still in a closed state, and the power grid resumes power supply after a period of time. Because of the presence of the delay circuit in the grid state detection circuit, the capacitor C3 remains low on pin 2 of U1 until the threshold voltage of U1 is not reached, and therefore pin 3 of U1 outputs a high level. Since the switch detection circuit outputs a high level, pin 4 of U2 is high, while pin 5 of U2 is connected to pin 3 of U1 and also at a high level, pin 6 of U2 outputs a low level. Therefore, the 10 pin of the U3 is in a low level, the 11 pin of the U3 outputs a high level, the light emitting diode in the U4 body is not conducted, and the U4 does not send out a trigger signal, so that the TRIAC1 is not conducted. Therefore, even if the switch SW1 is in the closed state, power is not supplied to the electric load. At this time, the truth tables of U1, U2 and U3 pins are shown in Table 5.
Table 5 Modal V U, U2, U3 Pin truth table
Mode VI: after the capacitor C3 is charged for a period of time, when the voltage of the capacitor C3 reaches the threshold voltage of U1, the pin 2 of U1 changes from low level to high level, at this time, since the pin 1 of U1 is still at low level, the pin levels of U2 and U3 do not change, so the output of pin U13 is still at high level, pin U4 is not turned on, and TRIAC1 is still turned off. At this time, the truth tables of U1, U2 and U3 pins are shown in Table 6.
Table 6 Modal VI U1, U2, U3 Pin truth Table
Mode VII: in the state of VI, the switch SW1 is turned off, pin 4 of U2 is turned from high to low, so pin 6 of U2 outputs high, pin 9 of U3 is turned from high to low, pin 10 of U3 is turned from low to high, so pin 11 of U3 still outputs high, and TRIAC1 is turned off. Meanwhile, the 1 pin of the U1 is converted from a low level to a high level, the 2 pin of the U1 is still at a high level, so the 3 pin of the U1 outputs a low level, and the 5 pin of the U2 is also converted from a high level to a low level. At this time, the truth tables of U1, U2 and U3 pins are shown in Table 7.
TABLE 7 Modal VII U1, U2, U3 Pin truth Table
It can be seen from tables 7 and 2 that state VII has the same logical state as state II. The logic state of the power outage protection circuit will be in state III when switch SW1 is closed again.
As is clear from the above analysis, the power failure protection circuit shown in fig. 1 has a function of recovering power supply when the power supply is interrupted, and even if the switch or the power outlet switch is in the closed state, the power supply can be cut off, and the power supply is not supplied to the electric appliance, and the power supply is recovered only after the switch is operated again.
The parameters of the circuit elements of the invention are shown in Table 8:
TABLE 8 parameters and model of circuit elements
Claims (5)
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