CN111752167A - A Generalized Satellite Simulation Test System - Google Patents

Abstract

The invention provides a universal satellite simulation test system which comprises a main controller board, a bus motherboard, a first programmable intelligent interface board, a second programmable intelligent interface board, a third programmable intelligent interface board and an upper monitor, wherein the main controller board is connected with the upper monitor through an Ethernet port, and is respectively connected with the first programmable intelligent interface board, the second programmable intelligent interface board and the third programmable intelligent interface board through the bus motherboard. The invention has the beneficial effects that: the universality of the satellite simulation test system is improved.

Description

A Generalized Satellite Simulation Test System

technical field

The invention relates to a satellite simulation test system, in particular to a generalized satellite simulation test system.

Background technique

In the test system of large satellites, each test equipment is generally not reusable, and the simulator needs to be partially or completely redesigned according to each equipment, which is not conducive to the short development cycle of commercial microsatellites.

Although various simplification methods have appeared in the simulation test of commercial microsatellites, it is still necessary to develop one device for one model, which is difficult to be completely universal and the efficiency is still low.

SUMMARY OF THE INVENTION

In order to solve the problems in the prior art, the present invention provides a generalized satellite simulation test system.

The invention provides a generalized satellite simulation test system, comprising a main controller board, a bus motherboard, a first programmable intelligent interface board, a second programmable intelligent interface board, a third programmable intelligent interface board and a host monitoring computer , the main controller board is connected to the upper monitoring machine through an Ethernet port, and the main controller board is connected to the first programmable intelligent interface board, the second programmable intelligent interface board, the third programmable intelligent interface board through the bus motherboard, respectively. Three programmable intelligent interface board connections.

As a further improvement of the present invention, the first programmable intelligent interface board, the second programmable intelligent interface board, and the third programmable intelligent interface board are respectively connected to the onboard aircraft system.

As a further improvement of the present invention, the first programmable intelligent interface board includes a shared memory space, and the shared memory space allocates a continuous space for each component.

As a further improvement of the present invention, the shared memory space allocates a communication space for each component.

As a further improvement of the present invention, the shared memory space includes a component data area and a component protocol data area, the component data area is a component type code, the component protocol data area includes a command check data area, and the command check The data area is used to configure the verification method for the DSP board to receive the command data sent by the satellite carrier.

As a further improvement of the present invention, the content definitions of the first programmable intelligent interface board and the second programmable intelligent interface board are the same, but when the data is imported, the set-in functions called by the upper monitor are different.

As a further improvement of the present invention, the third programmable intelligent interface board provides 64 DA outputs.

As a further improvement of the present invention, the main controller board is a standard X86 architecture board, which is responsible for the execution and operation of all models required for the specified simulation. And dynamically specify the desired programmable general-purpose controller board for the component model.

As a further improvement of the present invention, the upper monitoring machine cuts the model according to the needs of the simulation test, and downloads the real-time board of the main controller board, and the system operation process performs component testing and closed-loop simulation according to the needs of the simulation test.

The beneficial effects of the present invention are: through the above scheme, the versatility of the satellite simulation test system is improved.

Description of drawings

FIG. 1 is a schematic diagram of a generalized satellite simulation test system of the present invention.

FIG. 2 is a function definition diagram of the first programmable intelligent interface board.

FIG. 3 is a function definition diagram of the second programmable intelligent interface board.

FIG. 4 is a system simulation work flow chart of Embodiment 1 of a generalized satellite simulation test system of the present invention.

FIG. 5 is a schematic diagram of the simulation of Embodiment 2 of a generalized satellite simulation test system of the present invention.

FIG. 6 is a closed-loop simulation access diagram of a real gyro according to Embodiment 2 of a generalized satellite simulation test system of the present invention.

Detailed ways

The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

As shown in Figure 1, a generalized satellite simulation test system, the core is a standard bus-based general controller board and a series of general programmable intelligent interface boards, including a main controller board 4, a bus motherboard 5, a first programmable The intelligent interface board 1, the second programmable intelligent interface board 2, the third programmable intelligent interface board 3 and the upper monitor 6, the main controller board 4 is connected with the upper monitor 6 through the Ethernet port, the The main controller board 4 is respectively connected with the first programmable intelligent interface board 1 , the second programmable intelligent interface board 2 and the third programmable intelligent interface board 3 through the bus motherboard 5 .

Programmable intelligent interface board: general board based on different electrical interfaces, electrical interfaces such as AD, DA, OC, IO, 422/485, CAN, LVDS, potentiometer and most of the electrical interfaces, and the digital logic on the board can be programmed by fpga , fully adapt to the timing and protocol of various communication interfaces. Communication between the general controller board and the general interface board is through a high-speed standard bus.

The PXI board is defined as 5659 according to actual use: 8 serial ports and 2 CAN. 5871: 8-way FPGA, 10-way IO. 5487: Road 64 DA. No more than this envelope can satisfy the simulation system development of this type of satellite, and this configuration is the minimum system. When the hardware requires more communication interfaces, it is only necessary to add boards with related functions to upgrade to meet the actual use requirements.

The first programmable intelligent interface board 1 is a 5659 board, and the software convention is as follows:

1. Shared memory: The shared memory space of the board allocates a continuous space for each component, and each protocol of the component allocates a separate space in the shared memory space of the component as a communication channel with the VxWorks software, and the shared memory is used to organize way as shown. At the same time, in order to facilitate the subsequent allocation of shared memory of different models, the 40KB memory space occupied by the board is equally divided into 20 copies, and each 2KB space is used as the communication space of a component (one share is not enough, and more points can be occupied).

2. Part type code:

The part type code is 4 bytes long:

3. Command verification data area:

The command verification data is used to configure the verification method of the command data received by the DSP board from the satellite carrier.

Command verification configuration data format

The second programmable intelligent interface board 2 is a 5871 board, and the software convention is as follows:

1. The functions in shared memory are defined as follows:

In Figure 3, the protocol 1 command checks the data synchronization word, the protocol 1 command checks the frame header content, the protocol 1 command data synchronization word, the protocol 1 command data verification pass mark, the protocol 1 command data area, the protocol 1 response data synchronization word, The response data area of protocol 1 is the content that needs to be filled according to the actual protocol. The content definition is the same as that of 5659. The difference between the two is when the data is imported, the write function called by the host computer will be different.

The third programmable intelligent interface board 3 is a 5487 board: it provides 64-channel DA output, and only needs to select an appropriate matching resistor, and does not involve software protocol conventions.

The main controller board 4 is a general-purpose main controller board: it is a standard X86 architecture board, which is responsible for specifying the execution and operation of all models required for simulation. The desired programmable general-purpose controller board is dynamically specified to the component model.

The upper monitor 6 cuts the model according to the needs of the simulation test, and downloads the real-time board of the main controller board. The system running process is according to the needs of the simulation test, such as component test and closed-loop simulation.

Therefore, the system hardware of the present invention includes: a standard bus-based universal controller board, a standard bus-based universal interface board series, a standard bus-based chassis motherboard, and a host PC.

The system software of the present invention includes:

The integrated host computer model library based on simulink includes dynamic simulation model, flywheel simulator model, gyro simulator model, magnetic torquer simulator model, magnetometer simulator model, and measurement and control component simulator model. It is realized by simulink graphical programming combined with s-function based on C function, which is not only intuitive and convenient, but also convenient to design the communication with the PXI bus.

Real-time operating system: used to code and compile the simulink module to generate executable code. It can be dynamically loaded when the controller board real-time system is running.

Programmable smart board program: dsp software implementation, fgpa software implementation, including standard bus communication with the host computer. Therefore, it is convenient to meet the requirements of various communication timing protocols.

The first implementation example of the present invention is for the closed-loop simulation test of switching between different models or multiple units of the same model, as shown in Figure 4:

The software model of the invention realizes the operating principle: based on rapid prototyping development, using the RealTimeWorshop tool, the simulink model library of the host computer is graphically filed to directly generate optimized and portable personalized codes, and automatically generate a variety of real-time codes according to the target configuration The program under the system is downloaded to the real-time system of the controller board to load and run.

The upper computer model can be replaced with modules that meet the actual needs. For example, if the momentum wheel adopts speed control, the speed feedback loop model is selected. If the acceleration model is adopted, it can be directly replaced from the developed model library without affecting any changes in the lower computer. . The principle is the same for other modules.

The lower-position motor gauge wheel is originally RS422 communication, and it is replaced by CAN communication. It is necessary to replace the definition of 5871 in the software configuration item of the upper computer with the content of 5659, and the lower computer does not need to be changed. At this time, the communication link will be from the node of 5871. Switch to the corresponding node of 5659. The communication methods of other components can also be switched quickly.

The controller board normally only needs to save the real-time system boot program. The model and the real-time system itself are dynamically downloaded by the host computer, which is convenient for modification. To monitor the system status, it only needs to send the controller board to the monitoring machine through the network port.

This simulation platform is aimed at the on-orbit model, and can be switched to the required model test platform within 15 minutes under the condition that the tasks do not conflict. If you need multiple devices to test the same model synchronously, and you don't need to develop software, you just need to update the hardware address in the protocol to the address assigned to the device, and you can run it directly.

The second implementation example of the present invention, the pure digital closed-loop simulation of the attitude control system is quickly realized, as shown in Figure 5:

The model establishes a model library, and the replacement can be directly selected. If not, it is no problem to add it after development. The general intelligent interface board has developed corresponding general software through architecture design, which has been decoupled from the data transmission of the host computer. As long as it is a protocol supported by the design (currently designed two types of CAN and serial ports, and needs to continue to develop), it can be directly Use, without further development, can form a rapid simulation of each component of the attitude control system, and perform closed-loop testing.

Realization of Semi-Physical Simulation of Attitude Control System

This system can also easily access real components. According to the content of the protocol added, add 5659 or 5871 boards to communicate with the turntable, that is, only need to communicate with the components to achieve semi-physical closed-loop simulation, as shown in Figure 6 for the real gyro Closed-loop simulation access.

The invention provides a generalized satellite simulation test system, the simulation system platform hardware and protocol are standardized, the communication protocol and the component simulation model can be switched quickly. The simulator model is cut by the host computer and downloaded to the control board to run, and the hardware interface timing protocol of the simulator can be quickly realized by dsp or fpga. The high-speed connection and interconnection between the model and the hardware interface are realized by the standard bus. It realizes the functions of switching operation and rapid transformation of the same equipment of multiple models without debugging, and the rapid prototyping development method of dynamic simulation software. That is, it is based on matlab graphical programming, and can be downloaded and implemented quickly, saving the time of writing code. Separation of model development and model development, greater compatibility for emergent missions.

The invention provides a generalized satellite simulation test system, which standardizes the memory definition of the underlying hardware, standardizes the principle of protocol writing, performs protocol framing according to actual needs, and quickly replaces the model. , protocol, data storage, and reading functions are decoupled. Realize the direct use of different types of software versions under the same hardware, and the same software version is no longer directly used for software development on different hardware.

The invention provides a generalized satellite simulation test system, which can simulate and test all sub-systems on the satellite. More professional systems can be simulated, and the mathematical meaning of the model needs to be continuously upgraded.

The above content is a further detailed description of the present invention in conjunction with specific preferred embodiments, and it cannot be considered that the specific implementation of the present invention is limited to these descriptions. For those of ordinary skill in the technical field of the present invention, without departing from the concept of the present invention, some simple deductions or substitutions can be made, which should be regarded as belonging to the protection scope of the present invention.

Claims (9)

1. A generalized satellite simulation test system is characterized in that: the intelligent monitoring system comprises a main controller board, a bus motherboard, a first programmable intelligent interface board, a second programmable intelligent interface board, a third programmable intelligent interface board and an upper monitor, wherein the main controller board is connected with the upper monitor through an Ethernet port, and the main controller board is respectively connected with the first programmable intelligent interface board, the second programmable intelligent interface board and the third programmable intelligent interface board through the bus motherboard.

2. The generalized satellite simulation test system of claim 1, wherein: the first programmable intelligent interface board, the second programmable intelligent interface board and the third programmable intelligent interface board are respectively connected with the satellite borne machine system.

3. The generalized satellite simulation test system of claim 1, wherein: the first programmable intelligent interface board comprises a shared memory space, and the shared memory space is a section of continuous space allocated to each component.

4. The generalized satellite simulation test system of claim 3, wherein: the shared memory space is allocated with a communication space for each component.

5. The generalized satellite simulation test system of claim 3, wherein: the shared memory space comprises a component data area and a component protocol data area, the component data area is a component type code, the component protocol data area comprises a command verification data area, and the command verification data area is used for configuring a verification mode of the DSP board card for receiving command data sent by the satellite borne aircraft.

6. The generalized satellite simulation test system of claim 3, wherein: the first programmable intelligent interface board and the second programmable intelligent interface board have the same content definition, but the first programmable intelligent interface board and the second programmable intelligent interface board have different access functions called by the upper monitor when data is imported.

7. The generalized satellite simulation test system of claim 3, wherein: the third programmable smart interface board provides 64 paths of DA output.

8. The generalized satellite simulation test system of claim 1, wherein: the main controller board is a standard X86-structured board card and is responsible for specifying the implementation and operation of all models required by simulation, the model library comprises a dynamic model and a posture control component model load component model, and a programmable universal controller board required by dynamic specification of the component models is specified.

9. The generalized satellite simulation test system of claim 1, wherein: and the upper monitor cuts the model according to the simulation test requirement, downloads the real-time board card of the master control board, and performs component test and closed-loop simulation according to the simulation test requirement in the system running process.

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