CN111509966B - Ultra-low voltage negative feedback modulation energy harvesting circuit - Google Patents

Abstract

The embodiment of the invention provides an ultralow voltage negative feedback modulation energy collection circuit, which relates to the technical field of transformation modulation and comprises the following components: a MOS tube group; first diode D ₁ The method comprises the steps of carrying out a first treatment on the surface of the Second diode D ₂ The method comprises the steps of carrying out a first treatment on the surface of the A transformer; first capacitor C ₁ The method comprises the steps of carrying out a first treatment on the surface of the Second capacitor C ₂ The method comprises the steps of carrying out a first treatment on the surface of the A negative voltage generator; a first comparator and an amplifier; second resistor R ₂ The method comprises the steps of carrying out a first treatment on the surface of the Third resistor R ₃ The method comprises the steps of carrying out a first treatment on the surface of the Fourth resistor R ₄ Fifth resistor R ₅ The method comprises the steps of carrying out a first treatment on the surface of the The MOS tube group comprises a first MOS tube M ₁ Second MOS tube M ₂ Third MOS tube M ₃ Fourth MOS tube M ₄ The method comprises the steps of carrying out a first treatment on the surface of the The circuit components and the connection mode thereof can improve the energy transmission efficiency of induction power supply in the prior art and improve the load carrying capacity of the energy transmission circuit.

Description

Ultra-low voltage negative feedback modulation energy harvesting circuit

technical field

The invention relates to the technical field of DC conversion and current conversion, in particular to an ultra-low voltage negative feedback modulation energy collection circuit.

Background technique

With the application of the Internet of Things and the development of wireless sensor networks, the disadvantages of the traditional battery charging system-based power supply method are becoming more and more obvious due to the inherent shortcomings of the battery; in contrast, energy harvesting is based on the weak energy in the environment. Source and convert it into electrical energy, so as to realize the self-power supply of wireless sensor network, because of its many advantages, it has gained more and more attention and attention.

The sources of energy harvesting mainly include vibration energy, temperature difference energy, friction energy and solar energy. These energies are converted into electrical energy through the sensor, through the self-excited oscillation formed by the positive feedback loop formed by the transformer, combined with related modulation, and finally achieve high voltage output. In traditional transformer-based energy harvesting designs, Zener diodes are usually used to achieve output modulation, as shown in Figure 1. The heat energy harvesting caused by temperature changes is taken as an example in the figure, through transformers (L ₀ , L ₁ ) and MOS transistors M ₁ Form a positive feedback loop to generate self-excited oscillation, and transfer the energy collected from the environment from the input to the load through the conversion of electric energy-magnetic energy-electric energy. However, as the input increases, when the traditional design meets the power consumption of the output load, it will The excess energy is released to the ground through the diode D _Z to stabilize the output voltage, which causes a waste of collected energy, reduces the utilization of energy, and further reduces the conversion efficiency of the system. Therefore, it is the content of the present invention to find a more optimized modulation scheme to improve the conversion efficiency of the system.

Contents of the invention

In view of this, the object of the present invention is to provide an ultra-low voltage negative feedback modulation energy harvesting circuit, so as to alleviate the technical problem of low energy conversion rate in the energy harvesting circuit in the prior art.

In the first aspect, the present invention provides an ultra-low voltage negative feedback modulation energy harvesting circuit, comprising: MOS tube group; first diode D ₁ ; second diode D ₂ ; transformer; first capacitor C ₁ ; The second capacitor C ₂ ; the negative voltage generator; the first comparator and the amplifier; the second resistor R ₂ ; the third resistor R ₃ ; the fourth resistor R ₄ and the fifth resistor R ₅ ;

The MOS transistor group includes a first MOS transistor M ₁ , a second MOS transistor M ₂ , a third MOS transistor M ₃ and a fourth MOS transistor M ₄ ;

Both the source of the first MOS transistor _M1 and the source of the second MOS transistor _M2 are grounded;

The gate of the first MOS transistor _M1 is connected to the output terminal of the negative voltage generator;

The gate of the second MOS transistor _M2 is connected to the gate of the third MOS transistor _M3 ;

The source of the third MOS transistor _M3 is grounded, and the drain of the third MOS transistor _M3 is connected to the anode of the first diode _D1 ;

The cathode of the first diode _D1 is connected to the output port;

The first port of the negative voltage generator is grounded;

The second port of the negative voltage generator is connected to the drain of the fourth MOS transistor _M4 ;

The third port of the negative voltage generator is connected to the output port;

The output port is connected to one end of the third resistor _R3 , the other end of the third resistor _R3 is connected to one end of the fourth resistor _R4 , and the other end of the fourth resistor _R4 is connected to One end of the fifth resistor _R5 is connected, and the other end of the fifth resistor _R5 is grounded;

The other end of the third resistor _R3 is connected to the non-inverting input end of the first comparator, and the inverting input end of the first comparator is connected to the inverting input end of the amplifier;

The output terminal of the first comparator is connected to the enabling terminal of the amplifier;

The non-inverting input terminal of the amplifier is connected to one end of the fifth resistor _R5 , and the output terminal of the amplifier is connected to the gate of the fourth MOS transistor _M4 ;

The source of the fourth MOS transistor _M4 is connected to one end of the second resistor _R2 , and the other end of the second resistor _R2 is grounded;

One end of the primary side of the transformer is connected to the input port, and the other end of the primary side of the transformer is connected to the drain of the first MOS transistor _M1 ;

One end of the secondary side of the transformer is connected to one end of the second capacitor _C2 , and the other end of the secondary side of the transformer is grounded;

The other end of the second capacitor _C2 is connected to the anode of the second diode _D2 , and the cathode of the second diode _D2 is connected to the output port;

One end of the first capacitor _C1 is connected to one end of the second capacitor _C2 , and the other end of the second capacitor _C1 is connected to the gate of the third MOS transistor _M3 .

Preferably, the negative voltage generator includes a second comparator, a fifth MOS transistor M ₅ , a sixth MOS transistor M ₆ , a seventh MOS transistor M ₇ , a third capacitor C ₃ , a fourth capacitor C ₄ and a fourth Diode _D4 ;

The first port of the negative voltage generator is connected to the inverting input terminal of the second comparator;

The first port of the negative voltage generator is connected to the non-inverting input terminal of the second comparator;

The second comparator is respectively connected to the gate of the fifth MOS transistor _M5 , the gate of the sixth MOS transistor _M6 , and the gate of the seventh MOS transistor _M7 ;

The source of the fifth MOS transistor _M5 is connected to the third port of the negative voltage generator;

The drain of the fifth MOS transistor _M5 is connected to the drain of the seventh MOS transistor _M7 ;

The drain of the seventh MOS transistor _M7 is connected to one end of the third capacitor _C3 , and the other end of the third capacitor _C3 is connected to the drain of the sixth MOS transistor _M6 ;

The source of the sixth MOS transistor _M6 is grounded;

The drain of the sixth MOS transistor _M6 is connected to the cathode of the fourth diode _D4 , and the anode of the fourth diode _D4 is connected to the output terminal of the negative voltage generator;

One end of the fourth capacitor _C4 is connected to the drain of the seventh MOS transistor _M7 , and the other end of the fourth capacitor _C4 is connected to the output end of the negative voltage generator;

Preferably, both the first MOS transistor M ₁ and the second MOS transistor M ₂ are depletion-type NMOS transistors;

Both the third MOS transistor M ₃ and the fourth MOS transistor M ₄ are enhanced NMOS transistors.

The embodiment of the invention brings the following beneficial effects: the embodiment of the invention provides an ultra-low voltage negative feedback modulation energy harvesting circuit, including: MOS tube group; the first diode D ₁ ; the second diode D ₂ ; Transformer; first capacitor C ₁ ; second capacitor C ₂ ; negative voltage generator; first comparator and amplifier; second resistor R ₂ ; third resistor R ₃ ; fourth resistor R ₄ and fifth resistor R ₅ ; The MOS transistor group includes a first MOS transistor M ₁ , a second MOS transistor M ₂ , a third MOS transistor M ₃ and a fourth MOS transistor M ₄ ; the inductive power supply in the prior art can be improved through the above circuit components and their connection methods The energy transmission efficiency is improved, and the load capacity of the energy transmission circuit is improved.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

In order to make the above-mentioned objects, features and advantages of the present invention more comprehensible, preferred embodiments will be described in detail below together with the accompanying drawings.

Description of drawings

In order to more clearly illustrate the specific implementation of the present invention or the technical solutions in the prior art, the following will briefly introduce the accompanying drawings that need to be used in the specific implementation or description of the prior art. Obviously, the accompanying drawings in the following description The drawings show some implementations of the present invention, and those skilled in the art can obtain other drawings based on these drawings without any creative work.

Fig. 1 is the circuit diagram of the ultra-low voltage negative feedback modulation energy harvesting circuit provided in the prior art;

2 is a circuit diagram of an ultra-low voltage negative feedback modulation energy harvesting circuit provided by an embodiment of the present invention;

Fig. 3 is the circuit diagram of the negative voltage generator of the ultra-low voltage negative feedback modulation energy harvesting circuit provided by the embodiment of the present invention;

Fig. 4 (a) is an energy flow diagram of the ultra-low voltage negative feedback modulation energy harvesting circuit provided by the embodiment of the present invention;

Figure 4(b) is another energy flow diagram of the ultra-low voltage negative feedback modulation energy harvesting circuit provided by the embodiment of the present invention;

Detailed ways

In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, not all of them. the embodiment. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

At present, when the traditional design satisfies the power consumption of the output load, the excess energy is released to the ground through the diode _DZ to stabilize the output voltage, which causes waste of collected energy, reduces the utilization of energy, and further reduces the conversion efficiency of the system. , based on this, the purpose of an ultra-low voltage negative feedback modulation energy harvesting circuit provided by the embodiment of the present invention is to provide a high-efficiency, high-speed self-starting energy harvesting circuit, which is composed of two energy transmission schemes, consisting of a New stage control circuit (SSC) management. One energy transfer scheme is based on a transformer and the other is based on a boost converter. The circuit provided by the invention can improve the energy transmission efficiency of the inductive power supply in the prior art, and improve the load capacity of the energy transmission circuit.

In order to facilitate the understanding of this embodiment, an ultra-low voltage negative feedback modulation energy harvesting circuit disclosed in the embodiment of the present invention is firstly introduced in detail.

1 to 1, the embodiment of the present invention provides an ultra-low voltage negative feedback modulation energy collection circuit, including: the present invention provides an ultra-low voltage negative feedback modulation energy collection circuit, including: MOS tube group; The first diode D ₁ ; the second diode D ₂ ; the transformer; the first capacitor C ₁ ; the second capacitor C ₂ ; the negative voltage generator; the first comparator and amplifier; the second resistor R ₂ ; the third Resistor R ₃ ; fourth resistor R4 and fifth resistor R ₅ ;

The MOS transistor group includes a first MOS transistor M ₁ , a second MOS transistor M ₂ , a third MOS transistor M ₃ and a fourth MOS transistor M ₄ ;

Both the source of the first MOS transistor _M1 and the source of the second MOS transistor _M2 are grounded;

The gate of the first MOS transistor _M1 is connected to the output terminal of the negative voltage generator;

The gate of the second MOS transistor _M2 is connected to the gate of the third MOS transistor _M3 ;

The source of the third MOS transistor _M3 is grounded, and the drain of the third MOS transistor _M3 is connected to the anode of the first diode _D1 ;

The cathode of the first diode _D1 is connected to the output port;

The first port of the negative voltage generator is grounded;

The second port of the negative voltage generator is connected to the drain of the fourth MOS transistor _M4 ;

The third port of the negative voltage generator is connected to the output port;

The output port is connected to one end of the third resistor _R3 , the other end of the third resistor _R3 is connected to one end of the fourth resistor _R4 , and the other end of the fourth resistor _R4 is connected to One end of the fifth resistor _R5 is connected, and the other end of the fifth resistor _R5 is grounded;

The other end of the third resistor _R3 is connected to the non-inverting input end of the first comparator, and the inverting input end of the first comparator is connected to the inverting input end of the amplifier;

The output terminal of the first comparator is connected to the enabling terminal of the amplifier;

The non-inverting input terminal of the amplifier is connected to one end of the fifth resistor _R5 , and the output terminal of the amplifier is connected to the gate of the fourth MOS transistor _M4 ;

The source of the fourth MOS transistor _M4 is connected to one end of the second resistor _R2 , and the other end of the second resistor _R2 is grounded;

One end of the primary side of the transformer is connected to the input port, and the other end of the primary side of the transformer is connected to the drain of the first MOS transistor _M1 ;

One end of the secondary side of the transformer is connected to one end of the second capacitor _C2 , and the other end of the secondary side of the transformer is grounded;

The other end of the second capacitor _C2 is connected to the anode of the second diode _D2 , and the cathode of the second diode _D2 is connected to the output port;

One end of the first capacitor _C1 is connected to one end of the second capacitor _C2 , and the other end of the second capacitor _C1 is connected to the gate of the third MOS transistor _M3 .

Preferably, the negative voltage generator includes a second comparator, a fifth MOS transistor M ₅ , a sixth MOS transistor M ₆ , a seventh MOS transistor M ₇ , a third capacitor C ₃ , a fourth capacitor C ₄ and a fourth Diode _D4 ;

The first port of the negative voltage generator is connected to the inverting input terminal of the second comparator;

The first port of the negative voltage generator is connected to the non-inverting input terminal of the second comparator;

The second comparator is respectively connected to the gate of the fifth MOS transistor _M5 , the gate of the sixth MOS transistor _M6 , and the gate of the seventh MOS transistor _M7 ;

The source of the fifth MOS transistor _M5 is connected to the third port of the negative voltage generator;

The drain of the fifth MOS transistor _M5 is connected to the drain of the seventh MOS transistor _M7 ;

The drain of the seventh MOS transistor _M7 is connected to one end of the third capacitor _C3 , and the other end of the third capacitor _C3 is connected to the drain of the sixth MOS transistor _M6 ;

The source of the sixth MOS transistor _M6 is grounded;

The drain of the sixth MOS transistor _M6 is connected to the cathode of the fourth diode _D4 , and the anode of the fourth diode _D4 is connected to the output terminal of the negative voltage generator;

One end of the fourth capacitor _C4 is connected to the drain of the seventh MOS transistor _M7 , and the other end of the fourth capacitor _C4 is connected to the output end of the negative voltage generator.

Preferably, both the first MOS transistor M ₁ and the second MOS transistor M ₂ are depletion-type NMOS transistors.

Embodiment two:

Embodiment 2 of the present invention provides an introduction to the working mode of an ultra-low voltage negative feedback modulation energy harvesting circuit described in Embodiment 1:

In the embodiment provided by the present invention, when the voltage input by the input port exceeds the minimum input voltage, the first MOS transistor M ₁ and the second MOS transistor M ₂ work, and the negative voltage generator does not work at this time , since both the first MOS transistor M ₁ and the second MOS transistor M ₂ have a small current passing through, a voltage difference ΔV is generated on the primary side of the transformer. At this time, the first MOS transistor M ₁ , the second MOS transistor M ₂ , The transformer, the second capacitor _C2 and the second diode _D2 construct a positive feedback channel;

The positive feedback loop gain A _v can be expressed as:

Among them, G _M is the conduction of the second MOS transistor _M2 , and N is the turns ratio of the transformer;

It should be noted that, in the embodiment provided by the present invention, the minimum input voltage is 50mV, the turns ratio of the transformer is 100, and the output voltage of the output port is 3V;

The aforementioned process is low-voltage self-starting. At this time, the voltage V _G across the first resistor _R1 in Figure 2 continues to rise. When the peak value of the voltage V _G across the first resistor _R1 exceeds the threshold voltage of the third MOS transistor _M3 , triggering the operation of the third MOS transistor _M3 , the negative voltage generator outputs a negative voltage to turn off the first MOS transistor _M1 , at this time the first diode _D1 is turned on, and at the same time The path of the first MOS transistor _M1 is disconnected;

It should be noted that in the above process, the energy accumulation time in one oscillation cycle can be expressed as:

τ∝R _E C ₁

Where RE is the total output equivalent resistance, _RE =R _l (R _M4 +R ₂ ), and R _M4 is the equivalent resistance of the fourth MOS transistor M ₄ . When V _OUT is greater than 1.8V, V _FBC is greater than V _REF , the enable signal EN becomes high, and the AMP output starts to control the fourth MOS transistor M ₄ . If V _FBA is smaller than V _REF , then V ₁ is low, and the fourth MOS transistor M ₄ is in the cut-off region. R _M4 has a larger resistance, which increases the energy accumulation time and keeps the output voltage rising. When the output voltage is higher than 3V, V _FBA is greater than V _REF , V ₁ increases, and R _M4 decreases as the voltage increases. Therefore, the energy accumulation time decreases and the output voltage decreases. Finally, the energy accumulation time and output voltage of the system are adjusted by using NFC, and the self-starting of the circuit is realized;

It should be noted that, when the _circuit reaches a steady state, specifically as shown in FIG _. The MOS transistor _M3 is turned on, the first diode _D1 is turned on, and a path is formed through the third MOS transistor _M3 and the first diode _D1 ;

As shown in Figure 4(b), if the voltage across the first resistor _R1 is less than the start-up voltage threshold of the third MOS transistor _M3 , the third MOS transistor _M3 is turned off, and the first MOS transistor M ₁ is turned on, the second MOS transistor M ₂ is turned on, the transformer transmits energy, and the second diode D ₂ is turned on, through the first MOS transistor M ₁ , the second MOS transistor M 2 and the second MOS transistor M ₂ Two diodes _D2 form a path;

Embodiment three:

As shown in FIG. 3 , Embodiment 3 of the present invention provides a working mode of a negative voltage generator. Specifically, the aforementioned second comparator generates a square wave control signal V ₂ in the circuit. When _V2 outputs a low level, the fifth MOS transistor _M5 and the sixth MOS transistor _M6 are turned on, the third capacitor _C3 is charged, and a voltage drop of 3V is generated thereon. When _V2 becomes high, the seventh MOS transistor _M7 is turned on, and the positive plate voltage of the third capacitor _C3 is 0V. At this time, the fourth diode _D4 is turned on, and the negative plate of _C3 generates a voltage of V Negative voltage of _CON . When V ₂ outputs a low level again, the fourth diode D ₄ is turned off, and the negative voltage remains at V _CON . Therefore, as long as V _OUT =3V, a negative voltage V _CON of about 1.2V will be generated.

Relative steps, numerical expressions and numerical values of components and steps set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.

Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working process of the system and device described above can refer to the corresponding process in the foregoing method embodiment, and details are not repeated here.

In addition, in the description of the embodiments of the present invention, unless otherwise specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection or a detachable connection , or integrally connected; it may be mechanically connected or electrically connected; it may be directly connected or indirectly connected through an intermediary, and it may be the internal communication of two components. Those of ordinary skill in the art can understand the specific meanings of the above terms in the present invention in specific situations.

In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" etc. The indicated orientation or positional relationship is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, or in a specific orientation. construction and operation, therefore, should not be construed as limiting the invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and should not be construed as indicating or implying relative importance.

Finally, it should be noted that: the above-described embodiments are only specific implementations of the present invention, to illustrate the technical solutions of the present invention, rather than to limit it, and the scope of protection of the present invention is not limited thereto, although referring to the foregoing The embodiment has described the present invention in detail, and those of ordinary skill in the art should understand that any person familiar with the technical field can still modify the technical solutions described in the foregoing embodiments within the technical scope disclosed in the present invention Changes can be easily thought of, or equivalent replacements are made to some of the technical features; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should be covered by the scope of the present invention. within the scope of protection. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims (2)

1. An ultra-low voltage negative feedback modulation energy harvesting circuit, characterized in that it comprises: MOS tube group; the first diode D ₁ ; the second diode D ₂ ; the transformer; the first capacitor C ₁ ; the second Capacitor C ₂ ; negative voltage generator; first comparator and amplifier; second resistor R2; third resistor R ₃ ; fourth resistor R ₄ and fifth resistor R ₅ ; The MOS transistor group includes a first MOS transistor M ₁ , a second MOS transistor M ₂ , a third MOS transistor M ₃ and a fourth MOS transistor M ₄ ; Both the source of the first MOS transistor _M1 and the source of the second MOS transistor _M2 are grounded; The gate of the first MOS transistor _M1 is connected to the output terminal of the negative voltage generator; The gate of the second MOS transistor _M2 is connected to the gate of the third MOS transistor _M3 ; The source of the third MOS transistor _M3 is grounded, and the drain of the third MOS transistor _M3 is connected to the anode of the first diode _D1 ; The cathode of the first diode _D1 is connected to the output port; The first port of the negative voltage generator is grounded; The second port of the negative voltage generator is connected to the drain of the fourth MOS transistor _M4 ; The third port of the negative voltage generator is connected to the output port; The output port is connected to one end of the third resistor _R3 , the other end of the third resistor _R3 is connected to one end of the fourth resistor _R4 , the other end of the fourth resistor _R4 is connected to the One end of the fifth resistor _R5 is connected, and the other end of the fifth resistor _R5 is grounded; The other end of the third resistor _R3 is connected to the non-inverting input end of the first comparator, and the inverting input end of the first comparator is connected to the inverting input end of the amplifier; The output terminal of the first comparator is connected to the enabling terminal of the amplifier; The non-inverting input terminal of the amplifier is connected to one end of the fifth resistor _R5 , and the output terminal of the amplifier is connected to the gate of the fourth MOS transistor _M4 ; The source of the fourth MOS transistor _M4 is connected to one end of the second resistor _R2 , and the other end of the second resistor _R2 is grounded; One end of the primary side of the transformer is connected to the input port, and the other end of the primary side of the transformer is connected to the drain of the first MOS transistor _M1 ; One end of the secondary side of the transformer is connected to one end of the second capacitor _C2 , and the other end of the secondary side of the transformer is grounded; The other end of the second capacitor _C2 is connected to the anode of the second diode _D2 , and the cathode of the second diode _D2 is connected to the output port; One end of the first capacitor _C1 is connected to one end of the second capacitor _C2 , and the other end of the first capacitor _C1 is connected to the gate of the third MOS transistor _M3 ; The negative voltage generator includes a second comparator, a fifth MOS transistor M ₅ , a sixth MOS transistor M ₆ , a seventh MOS transistor M ₇ , a third capacitor C ₃ , a fourth capacitor C ₄ and a fourth diode _D4 ; The first port of the negative voltage generator is connected to the inverting input terminal of the second comparator; The first port of the negative voltage generator is connected to the non-inverting input terminal of the second comparator; The second comparator is respectively connected to the gate of the fifth MOS transistor _M5 , the gate of the sixth MOS transistor _M6 , and the gate of the seventh MOS transistor _M7 ; The source of the fifth MOS transistor _M5 is connected to the third port of the negative voltage generator; The drain of the fifth MOS transistor _M5 is connected to the drain of the seventh MOS transistor _M7 ; The drain of the seventh MOS transistor _M7 is connected to one end of the third capacitor _C3 , and the other end of the third capacitor _C3 is connected to the drain of the sixth MOS transistor _M6 ; The source of the sixth MOS transistor _M6 is grounded; The drain of the sixth MOS transistor _M6 is connected to the cathode of the fourth diode _D4 , and the anode of the fourth diode _D4 is connected to the output terminal of the negative voltage generator; One end of the fourth capacitor _C4 is connected to the drain of the seventh MOS transistor _M7 , and the other end of the fourth capacitor _C4 is connected to the output end of the negative voltage generator. 2. The circuit according to claim 1, wherein the first MOS transistor M ₁ and the second MOS transistor M ₂ are both depletion-type NMOS transistors; Both the third MOS transistor M ₃ and the fourth MOS transistor M ₄ are enhanced NMOS transistors.

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