CN111261619A - Suspension crimping power semiconductor module - Google Patents
Suspension crimping power semiconductor module Download PDFInfo
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- CN111261619A CN111261619A CN201911157725.0A CN201911157725A CN111261619A CN 111261619 A CN111261619 A CN 111261619A CN 201911157725 A CN201911157725 A CN 201911157725A CN 111261619 A CN111261619 A CN 111261619A
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- power semiconductor
- molybdenum wafer
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- wafer
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 72
- 239000000725 suspension Substances 0.000 title claims abstract description 10
- 238000002788 crimping Methods 0.000 title claims description 12
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims abstract description 72
- 229910052750 molybdenum Inorganic materials 0.000 claims abstract description 72
- 239000011733 molybdenum Substances 0.000 claims abstract description 72
- 229910052751 metal Inorganic materials 0.000 claims abstract description 39
- 239000002184 metal Substances 0.000 claims abstract description 39
- 230000006835 compression Effects 0.000 claims abstract description 12
- 238000007906 compression Methods 0.000 claims abstract description 12
- 239000004033 plastic Substances 0.000 claims abstract description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 11
- 238000002161 passivation Methods 0.000 claims description 8
- 238000009413 insulation Methods 0.000 claims description 7
- 239000004642 Polyimide Substances 0.000 claims description 4
- 239000000499 gel Substances 0.000 claims description 4
- 238000000227 grinding Methods 0.000 claims description 4
- 229920001721 polyimide Polymers 0.000 claims description 4
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims description 3
- 229910052707 ruthenium Inorganic materials 0.000 claims description 3
- 239000003822 epoxy resin Substances 0.000 claims description 2
- 229920000647 polyepoxide Polymers 0.000 claims description 2
- 238000003466 welding Methods 0.000 abstract description 12
- 238000000034 method Methods 0.000 abstract description 9
- 230000005540 biological transmission Effects 0.000 abstract description 3
- 229910000679 solder Inorganic materials 0.000 abstract description 3
- 230000003068 static effect Effects 0.000 abstract description 3
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 50
- 230000009286 beneficial effect Effects 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000005684 electric field Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 241001391944 Commicarpus scandens Species 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000011257 shell material Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Die Bonding (AREA)
Abstract
The invention relates to a suspension compression joint power semiconductor module. Belongs to the technical field of high-voltage power semiconductor devices. The method mainly solves the problems of welding stress and welding cavities existing in the existing chip and electrode plate which are welded by the solder at high temperature. It is mainly characterized in that: the module comprises a module bottom plate, an insulating heat-conducting strip, a metal A, K electrode, an upper molybdenum wafer, a lower molybdenum wafer, a power semiconductor chip, a gate pole assembly and a module plastic shell; the center of the upper molybdenum wafer is provided with a mounting hole; the gate pole lead wire component is clamped in the mounting hole for positioning; the metal A electrode, the lower molybdenum wafer, the power semiconductor chip, the upper molybdenum wafer, the gate lead assembly and the metal K electrode are in compression contact in sequence. The invention can eliminate the deformation and stress generated by high-temperature welding of the chip, can meet the requirements of customers on high voltage and large current provided by module products, and is mainly used for high-voltage semiconductor devices in the fields of high-voltage soft start power supplies, high-voltage static reactive power compensation power supplies, high-voltage pulse power supplies, high-voltage direct-current transmission and the like.
Description
Technical Field
The invention belongs to the technical field of high-voltage power semiconductor devices. To a floating compression joint power semiconductor module. In particular to a high-current power semiconductor module with greatly improved performance. The method is mainly applied to the fields of UPS power supplies, high-voltage soft start power supplies, high-voltage static reactive compensation power supplies, high-voltage direct-current power transmission and the like.
Background
The internal structure of the traditional power semiconductor module chip is as follows: the semiconductor chip and rare metal molybdenum are welded by solder at high temperature, the chip used by the power semiconductor module is bent and deformed due to welding stress between the monocrystalline silicon wafer and the metal molybdenum, meanwhile, due to the relation of welding solder, a cavity exists in the welding of the monocrystalline silicon wafer and the metal molybdenum, the performance of the power semiconductor module, especially the performance of high-voltage and high-current products, is seriously influenced due to the reasons, and the durability and reliability of the power semiconductor module cannot meet new requirements due to physical deformation caused by high-temperature welding, so that a new semiconductor device structure and a new process technology are required to be adopted.
Disclosure of Invention
Aiming at the defects, the invention provides the suspended compression joint power semiconductor module with a brand-new chip internal structure, which can eliminate the deformation and stress generated by the high-temperature welding of the chip in the prior art and can meet the requirements of customers on high voltage and large current of module products.
The technical solution of the invention is as follows: the utility model provides a suspension crimping power semiconductor module, includes module bottom plate, insulating conducting strip, metal A electrode, power semiconductor chip, gate pole subassembly, metal K electrode and module plastic casing, its characterized in that: the lower molybdenum wafer and the upper molybdenum wafer are also included; the center of the upper molybdenum wafer is provided with a mounting hole; the gate pole lead assembly is clamped in the mounting hole for positioning, and a gate pole control electrode is led out; the metal A electrode, the lower molybdenum wafer, the power semiconductor chip, the upper molybdenum wafer, the gate lead assembly and the metal K electrode are in compression joint contact (ohmic contact) in sequence.
In the technical scheme of the invention, a sealed cavity is formed in the module plastic shell, and gel or epoxy resin is filled in the sealed cavity, so that the good contact of all parts is ensured, and the chip oxidation or high-pressure ignition is prevented.
According to the technical scheme, annular right-angle cylindrical insulating protection silica gel rings are arranged on the table tops with double negative angles on the two sides of the edge of the power semiconductor chip, and 2-4 layers of high-purity and high-insulativity polyimide passivation layers are arranged on the table tops on the two sides of the power semiconductor chip.
According to the technical scheme, the outer layer surface of the silica gel ring is provided with the groove, so that the creepage distance is increased.
According to the technical scheme, the upper surface and the lower surface of the molybdenum wafer and the upper molybdenum wafer, and the inner surface and the outer surface of the metal A electrode and the metal K electrode are grinding surfaces, and the surface flatness and the parallelism are less than 10 microns.
According to the technical scheme, the surfaces of the upper molybdenum wafer and the lower molybdenum wafer are coated with the ruthenium passivation layer, so that the upper molybdenum wafer and the lower molybdenum wafer are prevented from being thermally oxidized.
The technical solution of the invention is that the cathode and anode surfaces of the power semiconductor chip are coated with 10-100 micron thick metal conductive layers.
In the technical scheme of the invention, the power semiconductor chip is in suspension compression joint contact with the upper molybdenum wafer and the lower molybdenum wafer.
According to the technical scheme, the insulating protection silica gel rings on the table top with double negative angles on the two sides of the edge of the power semiconductor chip are respectively matched with the upper molybdenum wafer and the lower molybdenum wafer in a positioning mode.
The table-board modeling angle of the double negative angles of the two sides of the edge of the power semiconductor chip in the technical scheme of the invention is between 0.5 degrees and 35 degrees.
The invention adopts the semiconductor device assembled by the metal A electrode, the lower molybdenum wafer, the power semiconductor chip, the upper molybdenum wafer, the gate pole component, the metal K electrode and the module plastic shell, so that the power semiconductor chip is directly pressed and connected with the upper molybdenum wafer and the lower molybdenum wafer without high-temperature welding in the traditional process, thereby eliminating the deformation and stress generated by the high-temperature welding of the chip in the prior art and further ensuring the stability and the reliability of the characteristics of the device.
The invention adopts the table-board modeling at the edges of two PN junctions of the power semiconductor chip and adopts the table-board modeling process with two negative angles on two sides, thereby reducing the surface electric field intensity, being beneficial to improving the breakdown voltage of the semiconductor chip, and the table-board modeling angle theta is as follows: theta is more than or equal to 0.5 degree and less than or equal to 35 degrees; compared with the prior single-side table-board modeling, the method is simple and easy to implement in process, is beneficial to protecting the surface of the table-board, reduces the loss of the conductive areas of the cathode surface and the anode surface, and is beneficial to improving the through-current capacity of the chip.
The invention adopts the strong electric field insulation protection technology on the mesa modeling protection of the edge of the power semiconductor chip, so that the power semiconductor chip can bear larger avalanche breakdown voltage and is not easy to break down; and the surface of the double-sided table board is protected, and 2-4 layers of high-purity high-insulation organic protective materials such as polyimide and the like are adopted for surface passivation, so that the stability and reliability of the device are improved. The power semiconductor chip double-sided table-board protection silica gel ring is in an annular right-angle cylindrical shape, so that the surface creepage distance is increased, and the power semiconductor chip can bear higher surface breakdown voltage; meanwhile, the molybdenum wafers are placed in the centers of the two sides of the power semiconductor chip, and the upper molybdenum wafer and the lower molybdenum wafer are positioned by utilizing the inner circle of the protective silica gel ring.
The invention can eliminate the deformation and stress generated by the high-temperature welding of the prior chip and can meet the requirements of high-voltage semiconductor devices with the voltage of more than 1000V and the diameter of the chip of more than 4 inches. The invention is mainly used for high-voltage semiconductor devices in the fields of high-voltage soft start power supplies, high-voltage static reactive power compensation power supplies, high-voltage pulse power supplies, high-voltage direct-current power transmission and the like.
Drawings
Fig. 1 is a schematic structural diagram of a floating pressure-bonded power semiconductor module according to the present invention.
In the figure: 1. a module base plate; 2. an insulating heat-conducting sheet; 3. a metal A electrode; 4. a molybdenum wafer is put; 5. a power semiconductor chip; 6. loading a molybdenum wafer; 7. a gate assembly; 8. a metal K electrode; 9. a modular plastic housing.
Detailed Description
The invention is further illustrated with reference to fig. 1.
As shown in fig. 1. The suspension compression joint power semiconductor module comprises a module bottom plate 1, an insulating heat conducting strip 2, a metal A electrode 3, a lower molybdenum wafer 4, a power semiconductor chip 5, an upper molybdenum wafer 6, a gate pole component 7, a metal K electrode 8 and a module plastic shell 9, and is formed by mechanical suspension compression joint packaging.
The module bottom plate 1, the insulating heat conducting strip 2, the metal A electrode 3, the gate pole component 7, the metal K electrode 8 and the module plastic shell 9 are the same as those in the conventional power semiconductor module. The differences are the connection mode between the power semiconductor chip 5 and the upper molybdenum disc 6 and the lower molybdenum disc 4, the installation position of the gate electrode assembly 7, and the appearance and surface treatment of the power semiconductor chip 5.
The table top with two negative angles on the two sides of the edge of the power semiconductor chip 5 is provided with an annular right-angled cylindrical insulation protection silica gel ring, the table top with two surfaces is provided with 2-4 layers of passivation layers made of organic protection materials such as high-purity high-insulation polyimide and the like, and the high-purity high-insulation refers to purity and insulation indexes meeting the conventional requirements. The outer surface of the silica gel ring is provided with a groove. Insulating protection silica gel rings on two negative angle table tops on two sides of the edge of the power semiconductor chip 5 are respectively matched with the upper molybdenum wafer 6 and the lower molybdenum wafer 4 in a positioning mode. The table-board modeling angle theta of the double negative angles of the two sides of the edge of the power semiconductor chip 5 is as follows: theta is more than or equal to 0.5 degree and less than or equal to 35 degrees. The cathode and anode surfaces of the power semiconductor chip 5 are coated with a metal conductive layer with the thickness of 10-100 microns.
The center of the molybdenum wafer 6 is provided with a mounting hole, and the gate pole lead assembly 7 is clamped in the mounting hole for positioning and is led out of the gate pole control electrode. The upper and lower surfaces of the lower molybdenum wafer 4 and the upper molybdenum wafer 6, and the inner and outer surfaces of the metal A electrode 3 and the metal K electrode 8 are grinding surfaces, and the surface flatness and parallelism are less than 10 microns. The surfaces of the upper molybdenum wafer 6 and the lower molybdenum wafer 4 are coated with rare metals such as: a ruthenium passivation layer. The metal A electrode 3, the lower molybdenum wafer 4, the power semiconductor chip 5, the upper molybdenum wafer 6, the gate lead assembly 7 and the metal K electrode 8 are in compression contact in sequence. The power semiconductor chip 5 is in contact with the upper molybdenum wafer 6 and the lower molybdenum wafer 4 in a suspended compression joint mode. A sealed cavity is formed in the module plastic housing 9 and filled with gel or epoxy.
After the suspension compression joint process is adopted, the power semiconductor chip 5 is directly compressed and connected with the upper molybdenum wafer 4 and the lower molybdenum wafer 6 without high-temperature welding, so that the stress generated by sintering deformation of the chip in the prior art is eliminated, and the development of the chip to a larger diameter and a higher voltage is facilitated.
The assembly process is simple and convenient, the molybdenum wafer is directly placed one level upwards, the self-positioning mechanisms are arranged, the shell is directly installed on the bottom plate, and then the insulating heat conducting strip 2, the metal A electrode 3, the lower molybdenum wafer 4, the semiconductor chip 5, the gate pole assembly 7, the upper molybdenum wafer 6 and the metal K electrode 8 are placed. The power semiconductor chip 5 in the module is in suspension pressure contact with the upper molybdenum wafer 4 and the lower molybdenum wafer 6 under the action of external pressure, the upper surface and the lower surface of the upper molybdenum wafer 6 and the lower molybdenum wafer 4, and the inner surface and the outer surface of the metal A electrode 3 and the metal K electrode 8 are grinding surfaces, and the requirements on the surface flatness and the parallelism are less than 10 microns. The surfaces of the upper and lower molybdenum wafers 4 and 6 are coated with passivation materials to prevent the molybdenum wafers from being thermally oxidized, and the surfaces of the cathode and the anode of the semiconductor chip 5 are coated with thicker metal conducting layers. The interior of the device is sealed by gel, thereby ensuring good contact among all parts and preventing high-pressure ignition of the chip.
Claims (10)
1. The utility model provides a suspension crimping power semiconductor module, includes module bottom plate (1), insulating conducting strip (2), metal A electrode (3), power semiconductor chip (5), gate pole subassembly (7), metal K electrode (8) and module plastic casing (9), its characterized in that: the molybdenum-containing furnace also comprises a lower molybdenum wafer (4) and an upper molybdenum wafer (6); the center of the upper molybdenum wafer (6) is provided with a mounting hole; the gate pole lead assembly (7) is clamped in the mounting hole for positioning, and a gate pole control pole is led out; the metal A electrode (3), the lower molybdenum wafer (4), the power semiconductor chip (5), the upper molybdenum wafer (6), the gate lead assembly (7) and the metal K electrode (8) are in crimping contact in sequence.
2. The floating crimped power semiconductor module according to claim 1, characterized in that: a sealed cavity is formed in the module plastic shell (9), and gel or epoxy resin is filled in the sealed cavity.
3. The floating crimping power semiconductor module according to claim 1 or 2, characterized in that: the table top of two negative angles of the edge of the power semiconductor chip (5) is provided with an annular right-angle cylindrical insulation protection silica gel ring, and the table top of the two surfaces is provided with 2-4 layers of polyimide passivation layers.
4. The floating crimped power semiconductor module according to claim 3, characterized in that: the outer layer surface of the silica gel ring is provided with a groove.
5. The floating crimping power semiconductor module according to claim 1 or 2, characterized in that: the upper and lower surfaces of the lower molybdenum wafer (4) and the upper molybdenum wafer (6), and the inner and outer surfaces of the metal A electrode (3) and the metal K electrode (8) are grinding surfaces, and the surface flatness and parallelism are less than 10 microns.
6. The floating crimping power semiconductor module according to claim 1 or 2, characterized in that: the surfaces of the upper molybdenum wafer (6) and the lower molybdenum wafer (4) are coated with ruthenium passivation layers.
7. The floating crimping power semiconductor module according to claim 1 or 2, characterized in that: and a metal conducting layer with the thickness of 10-100 microns is coated on the surface of the cathode and the anode of the power semiconductor chip (5).
8. The floating crimping power semiconductor module according to claim 1 or 2, characterized in that: the power semiconductor chip (5) is in contact with the upper molybdenum wafer (6) and the lower molybdenum wafer (4) in a suspended compression joint mode.
9. The floating crimping power semiconductor module according to claim 1 or 2, characterized in that: and the insulating protection silica gel rings on the double-negative-angle table top on the two sides of the edge of the power semiconductor chip (5) are respectively matched with the upper molybdenum wafer (6) and the lower molybdenum wafer (4) in a positioning manner.
10. The floating crimping power semiconductor module according to claim 3 or 4, characterized in that: the table-board modeling angle of the double negative angles of the two sides of the edge of the power semiconductor chip (5) is between 0.5 degrees and 35 degrees.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911157725.0A CN111261619A (en) | 2019-11-22 | 2019-11-22 | Suspension crimping power semiconductor module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911157725.0A CN111261619A (en) | 2019-11-22 | 2019-11-22 | Suspension crimping power semiconductor module |
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| CN111261619A true CN111261619A (en) | 2020-06-09 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| CN201911157725.0A Pending CN111261619A (en) | 2019-11-22 | 2019-11-22 | Suspension crimping power semiconductor module |
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| CN (1) | CN111261619A (en) |
Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1213179A (en) * | 1997-06-23 | 1999-04-07 | 亚瑞亚·勃朗勃威力有限公司 | Power semiconductor module with closed submodules |
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| CN103811424A (en) * | 2012-11-12 | 2014-05-21 | 湖北台基半导体股份有限公司 | Full-crimping packaging high voltage semiconductor device |
| CN105633025A (en) * | 2014-10-31 | 2016-06-01 | 湖北台基半导体股份有限公司 | High insulation and voltage resistance power semiconductor module |
| CN105931989A (en) * | 2015-02-26 | 2016-09-07 | 瑞萨电子株式会社 | Method Of Manufacturing Semiconductor Device And Semiconductor Device |
| CN206322669U (en) * | 2016-09-29 | 2017-07-11 | 黄山市七七七电子有限公司 | A kind of high-reliability high power semiconductor modular chip |
| CN206672930U (en) * | 2017-01-22 | 2017-11-24 | 嘉兴斯达半导体股份有限公司 | New crimp type power model |
| CN110164980A (en) * | 2019-05-24 | 2019-08-23 | 湖北台基半导体股份有限公司 | A kind of fast soft-recovery diode of high pressure |
| CN211788998U (en) * | 2019-11-22 | 2020-10-27 | 湖北台基半导体股份有限公司 | Suspension crimping power semiconductor module |
-
2019
- 2019-11-22 CN CN201911157725.0A patent/CN111261619A/en active Pending
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1213179A (en) * | 1997-06-23 | 1999-04-07 | 亚瑞亚·勃朗勃威力有限公司 | Power semiconductor module with closed submodules |
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| CN101202314A (en) * | 2006-12-13 | 2008-06-18 | 三星电子株式会社 | ZnO diode and method of forming same |
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| CN103035587A (en) * | 2012-12-11 | 2013-04-10 | 国网智能电网研究院 | High power insulated gate bipolar transistor (IGBT) module encapsulation structure |
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| CN110164980A (en) * | 2019-05-24 | 2019-08-23 | 湖北台基半导体股份有限公司 | A kind of fast soft-recovery diode of high pressure |
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