CN111243496B - Pixel circuit, driving method thereof and display device - Google Patents
Pixel circuit, driving method thereof and display device Download PDFInfo
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- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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Abstract
A pixel circuit, a driving method thereof and a display device are provided, the pixel circuit comprises a first switch sub-circuit, a partition driving chip and a plurality of light-emitting elements, wherein: the first switch sub-circuit is respectively connected with the scanning line, the data line and the first node and is used for writing a data voltage signal of the data line into the first node under the control of the scanning line; the partition driving chip is respectively connected with the first node and the plurality of light-emitting elements, and is used for judging the driving time corresponding to each light-emitting element according to the data voltage signal input by the first node and driving the light-emitting elements to emit light by using the data voltage signal in the corresponding driving time. The active addressing drive is realized through the first switch sub-circuit and the partition driving chip, the number of glass-based wiring is effectively reduced, the difficulty of a side wiring process is greatly reduced, the driving power consumption and the driving cost of the whole display module are reduced, and the competitive advantage of the product is greatly improved.
Description
Technical Field
The present disclosure relates to but not limited to the field of display technologies, and in particular, to a pixel circuit, a driving method thereof, and a display device.
Background
The sub-millimeter Light Emitting Diode (Mini LED) as a new generation of display technology has the advantages of low power consumption, high brightness, ultra-high resolution and color saturation, fast response speed, ultra-power saving, long service life, high efficiency, etc.
The Mini LED display device is usually driven by a Passive Matrix (PM) driving method, and the row driving chip and the column driving chip may be connected to each sub-pixel by a Multiplexing (MUX) method. As shown in fig. 1, taking a display resolution of 80 × 90 as an example, if a 1:90MUX scheme is adopted, one Channel (CH) signal is required for each column, two MUX signals are required for each row (the two MUX signals are respectively used for the R subpixel and the GB subpixel), 90 × 2 — 180 MUX signals and 80 × 3 — 240 CH signals are required in total, and assuming that one row driver chip drives 16 channels at maximum, one column driver chip drives 48 channels at maximum, 12 row driver chips and 5 column driver chips are required in total. If the 1:45MUX manner is adopted, although the number of row driving chips is reduced by half, the number of channels needs to be doubled, namely, the number of column driving chips needs to be doubled. Therefore, the existing passive address selection driving mode has the disadvantages of more peripheral circuit chips, larger occupied area and higher cost.
In addition, when a high-reusability scheme is adopted, the current of the light-emitting diode is high, and the overall power consumption of the corresponding module is greatly improved. And because MUX signal line and CH signal line all need to walk the heavy current, consider the reason of walking the line voltage drop, can not directly realize large-size screen display, can only adopt the concatenation mode, for example, use two 11.9 to save display module and splice into 18 cun display module, splice into display module such as 36 cun, 72 cun or 144 cun then. In order to ensure seamless splicing, a side routing process is needed to lead the routing to the back for binding, at the moment, high-resolution display is difficult to realize due to the fact that more routing is adopted, the Pitch (Pitch) of the side routing is small, and display resolution cannot be improved. In addition, a passive address selection driving method is adopted, and multiple sets of Serial Peripheral Interface (SPI) communication signals need to be used. When the whole machine module is driven, more SPI signals are needed, and the pressure on system driving is larger.
Disclosure of Invention
The embodiment of the application provides a pixel circuit, a driving method thereof and a display device, which can realize active site selection driving, reduce the number of glass-based wires, reduce the difficulty of side wire routing process and reduce the driving power consumption and the driving cost of an integral display module.
The embodiment of the application provides a pixel circuit, including: first switch subcircuit, subregion drive chip and a plurality of light-emitting component, wherein: the first switch sub-circuit is respectively connected with the scanning line, the data line and the first node and is used for writing a data voltage signal of the data line into the first node under the control of the scanning line; the partition driving chip is respectively connected with the first node and the plurality of light-emitting elements, and is used for judging the driving time corresponding to each light-emitting element according to the data voltage signal input by the first node and driving the light-emitting elements to emit light by using the data voltage signal in the corresponding driving time.
In some embodiments, the partition driving chip includes: a control sub-circuit, a second switching sub-circuit, and a plurality of sub-pixel circuits, wherein: the control sub-circuit is respectively connected with the first node and the second node and used for judging the data receiving time corresponding to each sub-pixel circuit according to the data voltage signal input by the first node and outputting a control signal to the second node according to each data receiving time; the second switch sub-circuit is respectively connected with the first node, the second node and the plurality of sub-pixel circuits, and is used for controlling one of the plurality of sub-pixel circuits to be connected with the first node under the control of the second node; and the plurality of sub-pixel circuits are respectively connected with the corresponding light-emitting elements and used for driving the corresponding light-emitting elements to emit light by using the data voltage signals.
In some embodiments, the determining, by the control sub-circuit, a data receiving time corresponding to each sub-pixel circuit according to the data voltage signal input by the first node includes: detecting whether the data voltage signals are pulse width signals with N preset frequencies, wherein N is the number of light-emitting elements connected with the partition driving chip; and if the data voltage signal is a pulse width signal with N preset frequencies, determining that the data voltage signal is first frame data, and determining the data receiving time corresponding to each subsequent sub-pixel circuit according to the N pulse width signals.
In some embodiments, the second switching sub-circuit is a 1: N demultiplexing circuit, and the sub-pixel circuit is a constant current holding circuit.
In some embodiments, the plurality of light emitting elements to which the divisional driving chips are connected includes any one of: m light-emitting elements in one pixel unit, wherein M is the number of sub-pixels contained in one pixel unit; n light emitting elements in a plurality of pixel units, the plurality of pixel units being located in a same row; n light emitting elements in a plurality of pixel units, the plurality of pixel units being located in two adjacent rows.
In some embodiments, the first switch sub-circuit comprises: a first transistor, wherein: the control electrode of the first transistor is connected with the scanning line, the first electrode of the first transistor is connected with the data line, and the second electrode of the first transistor is connected with the first node.
In some embodiments, the light emitting element is a sub-millimeter light emitting diode or a micro-millimeter light emitting diode.
Based on the same inventive concept, an embodiment of the present application further provides a display device, including a display panel, where the display panel includes: a plurality of scan lines extending along a first extending direction, a plurality of data lines extending along a second extending direction, the first extending direction intersecting the second extending direction, and a plurality of pixel circuits as described above, the display device further including a gate driver and a source driver, the gate driver including a plurality of shift register units, wherein: the shift register unit is used for generating scanning signals and outputting the scanning signals to the scanning lines; the source driver is used for generating data voltage signals and outputting the data voltage signals to the data lines, and the data voltage signals comprise data voltage signals of a plurality of light-emitting elements connected with the partition driving chip in one scanning period of each scanning line.
Based on the same inventive concept, an embodiment of the present application further provides a driving method of a pixel circuit, for driving the pixel circuit, where the driving method includes: the first switch sub-circuit writes a data voltage signal of the data line into a first node under the control of the scanning line; and the partition driving chip judges the corresponding driving time of each light-emitting element according to the data voltage signal input by the first node, and drives the light-emitting elements to emit light by using the data voltage signal in the corresponding driving time.
In some embodiments, the partition driving chip determines a driving time corresponding to each light emitting element according to a data voltage signal input from the first node, and drives the light emitting element to emit light using the data voltage signal during the corresponding driving time, including:
the control sub-circuit judges the data receiving time corresponding to each sub-pixel circuit according to the data voltage signal input by the first node, and outputs a control signal to the second node according to each data receiving time;
the second switch sub-circuit controls one of the plurality of sub-pixel circuits to be connected with the first node under the control of a second node;
the plurality of sub-pixel circuits drive the corresponding light emitting elements to emit light using the data voltage signals.
Compared with the prior art, the pixel circuit, the driving method thereof and the display device of the embodiment of the application realize active addressing driving through the first switch sub-circuit and the partition driving chip, effectively reduce the number of glass-based wires, greatly reduce the difficulty of the side wire routing process, reduce the driving power consumption and the driving cost of the whole display module and greatly improve the competitive advantage of products.
Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the application. Other advantages of the present application may be realized and attained by the instrumentalities and combinations particularly pointed out in the specification and the drawings.
Drawings
The accompanying drawings are included to provide an understanding of the present disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the examples serve to explain the principles of the disclosure and not to limit the disclosure.
Fig. 1 is a schematic diagram illustrating a driving method of a Mini LED display device in the related art;
fig. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of a plurality of light emitting elements connected to a partition driving chip according to an embodiment of the present disclosure;
fig. 4 is a second schematic structural diagram of a plurality of light emitting elements connected to a partition driving chip according to an embodiment of the present application;
fig. 5 is a third schematic structural diagram of a plurality of light emitting elements connected to a partition driving chip according to an embodiment of the present application;
fig. 6 is a fourth schematic structural diagram of a plurality of light emitting elements connected by a partition driving chip according to an embodiment of the present application;
fig. 7 is a schematic structural diagram of a partition driver chip according to an embodiment of the present application;
FIG. 8 is a schematic structural diagram of a display device according to an embodiment of the present disclosure;
FIG. 9 is a timing diagram illustrating an operation of a display device according to an embodiment of the present disclosure;
fig. 10 is a second schematic structural diagram of a display device according to an embodiment of the present application;
FIG. 11 is a second timing chart of the operation of a display device according to an embodiment of the present application;
fig. 12 is a flowchart of a driving method of a pixel circuit according to an embodiment of the present disclosure.
Description of reference numerals:
SPI-serial peripheral interface signal; gate-scan line;
SD — data line; N1-N2-nodes;
t1 — first transistor; VDDR, VDDBG-a first power supply terminal;
VSS — a second power supply terminal; EL-light emitting element;
GOA-shift register; AMIC-a partition driving chip;
STV — initial input signal; CLK-scan period.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the embodiments and features of the embodiments in the present application may be arbitrarily combined with each other without conflict.
Unless otherwise defined, technical or scientific terms used in the disclosure of the embodiments of the present application should have the ordinary meaning as understood by those having ordinary skill in the art to which the present invention belongs. The use of "first," "second," and similar terms in the embodiments of the present application do not denote any order, quantity, or importance, but rather the terms are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that a particular element or item appears in front of the word or is detected by mistake, and that the word or item appears after the word or item and its equivalents, but does not exclude other elements or misdetections.
It will be appreciated by those skilled in the art that the transistors employed in all embodiments of the present application may be thin film transistors or field effect transistors or other devices having the same characteristics. Preferably, the thin film transistor used in the embodiment of the present application may be an oxide semiconductor transistor. Since the source and drain of the transistor used herein are symmetrical, the source and drain may be interchanged. In the embodiment of the present application, in order to distinguish two electrodes of a transistor except for a gate, one of the electrodes is referred to as a first electrode, the other electrode is referred to as a second electrode, the first electrode may be a source or a drain, and the second electrode may be a drain or a source.
Fig. 2 is a schematic structural diagram of a pixel circuit provided in an embodiment of the present application, and as shown in fig. 2, the pixel circuit provided in the embodiment of the present application includes: the LED driving circuit comprises a first switch sub-circuit, a partition driving chip and a plurality of light-emitting elements.
Specifically, the first switch sub-circuit is respectively connected to the scan line Gate, the data line SD and the first node N1, and is configured to write the data voltage signal of the data line SD into the first node N1 under the control of the scan line Gate.
The partition driving chip is respectively connected with the first node N1 and the plurality of light emitting elements EL1 to ELN, and is configured to determine a driving time corresponding to each light emitting element EL according to a data voltage signal input from the first node N1, and drive the light emitting element EL to emit light using the data voltage signal in the corresponding driving time.
The pixel circuit provided by the embodiment of the application realizes active addressing drive through the first switch sub-circuit and the partition drive chip, effectively reduces the quantity of glass-based wiring, greatly reduces the difficulty of a side wiring process, reduces the drive power consumption and the drive cost of the whole display module and greatly improves the competitive advantage of products.
In an exemplary embodiment, as shown in fig. 3, a first switch sub-circuit provided in an embodiment of the present application includes: the first transistor T1.
Specifically, a control electrode of the first transistor T1 is connected to the scan line Gate, a first electrode of the first transistor T1 is connected to the data line SD, and a second electrode of the first transistor T1 is connected to the first node N1.
In this embodiment, the first transistor T1 may be an N-type thin film transistor or a P-type thin film transistor, and when the first transistor T1 is an N-type transistor, the first electrode may be a drain electrode and the second electrode may be a source electrode. When the first transistor T1 is a P-type transistor, the first pole may be a source and the second pole may be a drain.
An exemplary structure of the first switch sub-circuit is shown in detail in fig. 3. It is easily understood by those skilled in the art that the implementation of the first switch sub-circuit is not limited thereto as long as its respective functions can be realized.
In an exemplary embodiment, as shown in fig. 3, the plurality of light emitting elements connected to the partition driving chip may be: m light emitting elements in one pixel unit, where M is the number of sub-pixels included in one pixel unit.
As shown in fig. 3, M is 3, and in this case, one pixel unit may include 3 sub-pixels: red, green and blue sub-pixels. In other embodiments, M may be 4 or any other value. For example, when M is 4, a pixel unit may include 4 sub-pixels: red, green, blue and white sub-pixels. The following pixels each include 3 sub-pixels in one pixel unit: the red, green, and blue sub-pixels are described as an example.
In another exemplary embodiment, as shown in fig. 4, the plurality of light emitting elements connected to the partition driving chip may be: n light emitting elements in a plurality of pixel units, the plurality of pixel units being located in a same row. For example, when N is 6 and M is 3, the plurality of light emitting elements connected to the divisional driving chip are 6 light emitting elements located in two pixel units in the same row.
In still another exemplary embodiment, as shown in fig. 5 and 6, the plurality of light emitting elements connected to the divisional driving chip may be: n light emitting elements in a plurality of pixel units, the plurality of pixel units being located in two adjacent rows. For example, as shown in fig. 5, the plurality of light emitting elements connected by the divisional driving chip may be 6 light emitting elements located in two pixel units of two adjacent rows, or, as shown in fig. 6, the plurality of light emitting elements connected by the divisional driving chip may be 12 light emitting elements located in 4 pixel units of two adjacent rows (in this case, N ═ 12).
The pixel circuit of the embodiment of the application is not limited to driving the light emitting elements of one to two pixel units, and a single partition driving chip can drive more light emitting elements of the pixel units. Different Pixel unit architectures correspond to different driving schemes, but the driving principles are similar, and due to the adoption of the driving modes of a shift register and a Source driver (DDIC), a plurality of traditional driving schemes such as a Z-Pixel (Z-Pixel) architecture, a 1: N Multiplexing (MUX) scheme and the like can be applied to the glass-based display product, so that the Source output of a partition driving chip can be reduced, and the display effect is improved.
In an exemplary embodiment, as shown in fig. 7, a partition driving chip provided in an embodiment of the present application may include: a control sub-circuit, a second switching sub-circuit and a plurality of sub-pixel circuits.
Specifically, the control sub-circuit is respectively connected to the first node N1 and the second node N2, and is configured to determine a data receiving time corresponding to each sub-pixel circuit according to a data voltage signal input from the first node N1, and output a control signal to the second node N2 according to each data receiving time.
The second switch sub-circuit is respectively connected with the first node N1, the second node N2 and the plurality of sub-pixel circuits, and is used for controlling one of the plurality of sub-pixel circuits to be connected with the first node N1 under the control of the control signal of the second node N2.
The plurality of sub-pixel circuits are respectively connected to the corresponding light emitting elements EL, and drive the corresponding light emitting elements to emit light using the data voltage signal.
In an exemplary embodiment, the determining, by the control sub-circuit, a data receiving time corresponding to each sub-pixel circuit according to the data voltage signal input from the first node N1 includes:
detecting whether a data voltage signal input by a first node N1 is a pulse width signal with N preset frequencies, wherein N is the number of light-emitting elements connected with the partition driving chip;
if the data voltage signal input by the first node N1 is a pulse width signal with N preset frequencies, the data voltage signal input at this time is determined to be first frame data, and the data receiving time corresponding to each subsequent sub-pixel circuit is determined according to the N pulse width signals.
In an exemplary embodiment, the pulse width signals of the N preset frequencies may be square wave signals with preset amplitudes, preset periods and preset duty ratios. The pulse width signals with the N preset frequencies may also be other waveform signals besides the square wave signal, which is not limited in this application.
In one exemplary embodiment, the second switching sub-circuit is a 1: N demultiplexing circuit. When the plurality of light emitting elements connected by the partition driving chip are three sub-pixels in one pixel unit: and when the red sub-pixel, the green sub-pixel and the blue sub-pixel are used, the second switch sub-circuit is a 1:3 demultiplexing circuit.
In one exemplary embodiment, the respective sub-pixel circuits are constant current holding circuits.
In an exemplary embodiment, the light emitting element EL may be a sub-millimeter light emitting diode, a micro-millimeter light emitting diode, or other type of light emitting diode, etc. In practical applications, the specific structure of the light emitting element EL needs to be designed according to practical application environments, and is not limited herein. The following description will be given taking the light-emitting element EL as a sub-millimeter light-emitting diode as an example.
Based on the same inventive concept, the embodiment of the present application further provides a display device, which may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, etc., which is not limited in this application.
As shown in fig. 8 or 9, a display device of an embodiment of the present application includes a display panel including: the display device further includes a Gate driver and a source driver, wherein the Gate driver includes a plurality of shift register (GOA) units.
Specifically, each shift register unit is used for generating at least one scanning signal and outputting the scanning signal to a scanning line.
The source Driver (DDIC) is configured to generate a data voltage signal and output the data voltage signal to a data line, where the data voltage signal generated by the source Driver includes data voltage signals of a plurality of light emitting elements connected to the divisional driving chip in one scanning period of each scanning line.
As shown in fig. 9, the plurality of light emitting elements connected to the divisional driving chip are assumed to be three sub-pixels in one pixel unit: the driving circuit comprises a red sub-pixel, a green sub-pixel and a blue sub-pixel, wherein CLKi is the scanning period of an ith row of scanning lines, and in one scanning period CLKi of the ith row of scanning lines, data voltage signals generated by a source driver comprise RGB data voltage signals of three sub-pixels in a pixel unit connected with the partition driving chip.
As shown in fig. 10, each divisional driving chip can simultaneously drive the sub-pixels in two adjacent rows of pixel units to light up, and compared with the display device shown in fig. 8, the scanning signals generated by each shift register unit are reduced for the whole screen, but the on width (time) of each scanning signal becomes twice of that of the single-row driving, which can reduce the number of switching transistors and the number of VDD/VSS traces, and during data transmission, the corresponding data voltage signals need to output pulse width signals of 6 preset frequencies in one scanning period corresponding to the first frame of each scanning line, corresponding to the data input of 6 sub-pixels, but there is no change in the data voltage signals for the whole display driving.
The operation of the display device will be described in detail with reference to the display device shown in fig. 8 and the operation timing chart shown in fig. 11. As shown in fig. 11, the working process includes:
a first frame transmission stage: each shift register unit generates a scanning signal and outputs the scanning signal to a scanning line; the source driver generates a data voltage signal and outputs the data voltage signal to a data line, wherein the data voltage signal is a square wave signal with a preset frequency, a preset duty ratio and a preset amplitude.
The first switch sub-circuit writes the data voltage signal of the data line SD into the first node N1 under the control of the scan line Gate.
The divisional driving chip determines the driving time corresponding to each light emitting element EL based on the data voltage signal input from the first node N1, and stores the driving time corresponding to each light emitting element EL.
The second frame and the frame transmission stage after the second frame: each shift register unit generates a scanning signal and outputs the scanning signal to a scanning line; the source driver generates a data voltage signal and outputs the data voltage signal to the data line, wherein the data voltage signal at the moment is a data voltage signal corresponding to each sub-pixel.
The first switch sub-circuit writes the data voltage signal of the data line SD into the first node N1 under the control of the scan line Gate.
And the partition driving chip drives the light-emitting elements EL to emit light by using the data voltage signals in the corresponding driving time according to the driving time corresponding to each light-emitting element EL stored by the partition driving chip.
Since the partition driving chip stores the driving time corresponding to each light emitting element EL, the display device according to the embodiment of the present application may write a data voltage signal to each sub-pixel in a manner of scanning each scanning line by line, or simultaneously scanning each scanning line, so as to drive the light emitting elements EL in each sub-pixel to emit light.
Different from the driving voltage of the conventional Liquid Crystal Display (LCD) DDIC, the driving method of the pixel circuit in the embodiment of the present application does not need to perform positive and negative voltage driving, and the voltage between frames does not need to be inverted.
Based on the same inventive concept, some embodiments of the present invention further provide a driving method of a pixel circuit, which is applied to the pixel circuit provided in the foregoing embodiments, as shown in fig. 12, including steps 100 to 200.
Wherein step 100 comprises: the first switch sub-circuit writes a data voltage signal of the data line into the first node under the control of the scanning line.
In this step, the first switch sub-circuit may be a first transistor. When the first transistor is an N-type transistor, the scanning signal input by the scanning line is a high-voltage signal; when the first transistor is a P-type transistor, the scan signal input by the scan line is a low voltage signal.
Step 200 comprises: and the partition driving chip judges the corresponding driving time of each light-emitting element according to the data voltage signal input by the first node, and drives the light-emitting elements to emit light by using the data voltage signal in the corresponding driving time.
In this step, the partition driving chip may include: the control sub-circuit, the second switch sub-circuit, and the plurality of sub-pixel circuits, at this time, step 200 specifically includes:
the control sub-circuit judges the data receiving time corresponding to each sub-pixel circuit according to the data voltage signal input by the first node, and outputs a control signal to the second node according to each data receiving time;
the second switch sub-circuit controls one of the plurality of sub-pixel circuits to be connected with the first node under the control of a second node;
the plurality of sub-pixel circuits drive the corresponding light emitting elements to emit light using the data voltage signals.
In this step, the control sub-circuit determines the data receiving time corresponding to each sub-pixel circuit according to the data voltage signal input by the first node, including: detecting whether the data voltage signals are pulse width signals with N preset frequencies, wherein N is the number of light-emitting elements connected with the partition driving chip; and if the data voltage signal is a pulse width signal with N preset frequencies, determining that the data voltage signal is first frame data, and determining the data receiving time corresponding to each subsequent sub-pixel circuit according to the N pulse width signals.
The pixel circuit, the driving method thereof, and the display device provided in this embodiment can be applied to not only a sub-millimeter light emitting diode display device, but also all light emitting diode display devices, and compared with the current passive addressing driving method, the embodiment of the present application has the following advantages:
1) the peripheral chip is less, and only one DDIC can be realized, so that the module space is greatly saved, and the ultra-thin effect is really realized.
2) Because the SD signal is only a voltage control signal, a current signal does not need to be taken, the voltage drop of the opposite wiring is greatly reduced, and the number of the wirings is relatively reduced by at least 3 times.
3) Because each sub-pixel circuit adopts a constant current holding circuit, the current of the light-emitting element is very small, the overall module power consumption is greatly reduced, and the power consumption of the existing high-proportion multiplexing scheme is even more than 2 times higher than that of the scheme of the application through the statistics and display of the current data.
4) Because each sub-pixel circuit adopts a constant current holding circuit, the current of VDDR and VDDBG is relatively reduced to one tenth of the current multiplexing scheme, and compared with the 1:90MUX scheme of 80 to 90 display resolution, the transverse display resolution can be completely increased at the moment, for example, even if the original 80 pixels are changed into 2160, the current is only changed into 27 times, and is far lower than 90 times of the 1:90MUX scheme, and the whole machine display of the whole Ultra High Definition Television (UHD TV) can be directly realized completely without adopting a splicing scheme at the moment.
5) If a piece of glass is directly adopted for the whole machine, VDDR, VDDGB and a grounding wire (GND) can completely run on a glass frame, even if a splicing scheme is still adopted, the problem of side line short circuit does not exist because the single side is totally GND, even the etching of the side line is not needed, the complexity of the side line is greatly reduced, the left side is only provided with two signals because the VDDR and the VDDGB always keep a power supply state, the number of the running lines can be reduced again through the combination of the running lines or other modes, even if the running lines are not combined, the interval (Gap) of the side line can be properly increased due to the thinning of the running lines, and the complexity of the side line is reduced.
6) Due to the simplification of the peripheral driving circuit, the complexity of the system is greatly reduced, the existing LCD driving mode can be completely inherited, the existing passive address selection driving mode is not relied on, and the driving is more convenient and flexible.
7) The existing passive address-selecting driving display device needs to carry out four-side-edge circuits, and a large driving board is needed on the back; the display device of the embodiment of the application can only carry out three-side-edge circuit even though the splicing mode is still adopted, and only one DDIC is bound on the back surface, so that the driving space and the thickness are greatly reduced.
The following points need to be explained:
the drawings of the embodiments of the present application relate only to the structures related to the embodiments of the present application, and other structures may refer to general designs.
Without conflict, features of embodiments of the present invention, that is, embodiments, may be combined with each other to arrive at new embodiments.
Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (8)
1. A pixel circuit, comprising: the light emitting device comprises a first switch sub-circuit, a partition driving chip and a plurality of light emitting elements, wherein the partition driving chip comprises: a control sub-circuit, a second switching sub-circuit, and a plurality of sub-pixel circuits, wherein:
the first switch sub-circuit is respectively connected with the scanning line, the data line and the first node and is used for writing a data voltage signal of the data line into the first node under the control of the scanning line;
the partition driving chip is respectively connected with the first node and the plurality of light-emitting elements, and is used for judging the corresponding driving time of each light-emitting element according to a data voltage signal input by the first node and driving the light-emitting elements to emit light by using the data voltage signal in the corresponding driving time;
the control sub-circuit is respectively connected with the first node and the second node and used for judging the data receiving time corresponding to each sub-pixel circuit according to the data voltage signal input by the first node and outputting a control signal to the second node according to each data receiving time;
the second switch sub-circuit is respectively connected with the first node, the second node and the plurality of sub-pixel circuits, and is used for controlling one of the plurality of sub-pixel circuits to be connected with the first node under the control of the second node;
and the plurality of sub-pixel circuits are respectively connected with the corresponding light-emitting elements and used for driving the corresponding light-emitting elements to emit light by using the data voltage signals.
2. The pixel circuit according to claim 1, wherein the control sub-circuit determines a data receiving time corresponding to each sub-pixel circuit according to the data voltage signal inputted from the first node, and comprises:
detecting whether the data voltage signals are pulse width signals with N preset frequencies, wherein N is the number of light-emitting elements connected with the partition driving chip;
and if the data voltage signal is a pulse width signal with N preset frequencies, determining that the data voltage signal is first frame data, and determining the data receiving time corresponding to each subsequent sub-pixel circuit according to the pulse width signals with the N preset frequencies.
3. The pixel circuit according to claim 1, wherein the second switch sub-circuit is a 1: N demultiplexing circuit, and the sub-pixel circuit is a constant current holding circuit.
4. The pixel circuit according to claim 1, wherein the plurality of light emitting elements connected to the divisional driving chip include any one of:
m light-emitting elements in one pixel unit, wherein M is the number of sub-pixels contained in one pixel unit;
n light emitting elements in a plurality of pixel units, the plurality of pixel units being located in a same row;
n light emitting elements in a plurality of pixel units, the plurality of pixel units being located in two adjacent rows.
5. The pixel circuit of claim 1, wherein the first switch sub-circuit comprises: a first transistor, wherein: the control electrode of the first transistor is connected with the scanning line, the first electrode of the first transistor is connected with the data line, and the second electrode of the first transistor is connected with the first node.
6. The pixel circuit according to claim 1, wherein the light emitting element is a sub-millimeter light emitting diode or a micro-millimeter light emitting diode.
7. A display device comprising a display panel, the display panel comprising: the display device further comprises a gate driver and a source driver, the gate driver comprising a plurality of shift register units, wherein:
the shift register unit is used for generating scanning signals and outputting the scanning signals to the scanning lines;
the source driver is used for generating data voltage signals and outputting the data voltage signals to the data lines, and the data voltage signals comprise data voltage signals of a plurality of light-emitting elements connected with the partition driving chip in one scanning period of each scanning line.
8. A driving method for a pixel circuit, for driving the pixel circuit according to any one of claims 1 to 6, the driving method comprising:
the first switch sub-circuit writes a data voltage signal of the data line into a first node under the control of the scanning line;
the partition driving chip judges the corresponding driving time of each light-emitting element according to the data voltage signal input by the first node, and drives the light-emitting elements to emit light by using the data voltage signal in the corresponding driving time;
the partition driving chip judges the driving time corresponding to each light-emitting element according to the data voltage signal input by the first node, and drives the light-emitting element to emit light by using the data voltage signal in the corresponding driving time, and the partition driving chip comprises:
the control sub-circuit judges the data receiving time corresponding to each sub-pixel circuit according to the data voltage signal input by the first node, and outputs a control signal to the second node according to each data receiving time;
the second switch sub-circuit controls one of the plurality of sub-pixel circuits to be connected with the first node under the control of a second node;
the plurality of sub-pixel circuits drive the corresponding light emitting elements to emit light using the data voltage signals.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112270894A (en) * | 2020-09-14 | 2021-01-26 | 夏晶 | display device |
| CN114255690A (en) * | 2020-09-21 | 2022-03-29 | 华为技术有限公司 | Display panel and semiconductor display device |
| TWI746267B (en) * | 2020-11-17 | 2021-11-11 | 友達光電股份有限公司 | Display panel |
| CN115119521A (en) * | 2021-01-08 | 2022-09-27 | 京东方科技集团股份有限公司 | Array substrate, driving method thereof, and display device |
| WO2022226785A1 (en) | 2021-04-27 | 2022-11-03 | 京东方科技集团股份有限公司 | Display substrate and driving method therefor, and display device |
| US11756478B2 (en) | 2021-05-11 | 2023-09-12 | Tcl China Star Optoelectronics Technology Co., Ltd. | Driving circuit, display panel, and panel |
| CN113257175B (en) * | 2021-05-11 | 2022-11-08 | Tcl华星光电技术有限公司 | Drive circuit, display panel and panel |
| JP2024528762A (en) * | 2021-08-20 | 2024-08-01 | 京東方科技集團股▲ふん▼有限公司 | Display device, display panel, and driving method thereof |
| CN113658541B (en) * | 2021-08-30 | 2024-04-26 | 深圳市华星光电半导体显示技术有限公司 | Panel structure and display device |
| WO2023225810A1 (en) * | 2022-05-23 | 2023-11-30 | 京东方科技集团股份有限公司 | Pixel unit, display substrate and driving method therefor, and display device |
| CN115206231B (en) * | 2022-09-06 | 2023-03-07 | 禹创半导体(深圳)有限公司 | Micro LED scanning drive circuit suitable for simulating PWM drive |
| CN115331617A (en) * | 2022-09-07 | 2022-11-11 | 上海天马微电子有限公司 | Display panels and display devices |
| CN117496898A (en) * | 2023-05-16 | 2024-02-02 | 惠州华星光电显示有限公司 | Mini LED backlight module, driving method thereof and display device |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US8207954B2 (en) * | 2008-11-17 | 2012-06-26 | Global Oled Technology Llc | Display device with chiplets and hybrid drive |
| US8497821B2 (en) * | 2009-02-16 | 2013-07-30 | Global Oled Technology Llc | Chiplet display device with serial control |
| US9153171B2 (en) * | 2012-12-17 | 2015-10-06 | LuxVue Technology Corporation | Smart pixel lighting and display microcontroller |
| US10395589B1 (en) * | 2015-09-18 | 2019-08-27 | Apple Inc. | Hybrid microdriver architectures having relaxed comparator requirements |
| CN106157896B (en) * | 2016-09-26 | 2021-01-26 | 京东方科技集团股份有限公司 | Pixel driving circuit, pixel driving method, array substrate and display panel |
| TWI667643B (en) * | 2018-04-18 | 2019-08-01 | 英屬開曼群島商錼創科技股份有限公司 | Display panel with micro light emitting diode |
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Effective date of registration: 20211208 Address after: 100015 No. 10, Jiuxianqiao Road, Beijing, Chaoyang District Patentee after: BOE TECHNOLOGY GROUP Co.,Ltd. Patentee after: BOE crystal core technology Co., Ltd Address before: 100015 No. 10, Jiuxianqiao Road, Beijing, Chaoyang District Patentee before: BOE TECHNOLOGY GROUP Co.,Ltd. Patentee before: BOE Optoelectronics Technology |