CN106782301A - A kind of driving method of array base palte, display panel and display panel - Google Patents
A kind of driving method of array base palte, display panel and display panel Download PDFInfo
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- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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Abstract
本发明公开了一种阵列基板、显示面板及显示面板的驱动方法，包括像素和像素电路，像素中设置有至少三种颜色的有机发光二极管，由于至少一个像素电路包括第一发光控制模块和第二发光控制模块，像素电路的第一发光控制模块和第二发光控制模块分别连接两个相同颜色的有机发光二极管。这样采用一个像素电路的第一发光控制模块和第二发光控制模块分别控制相同颜色的两个有机发光二极管，不仅可以减少阵列基板上像素电路的数量，还可以减少数据线的数量，从而可以减小数据线的电容耦合作用。并且，在PPI一定的基础上，减少像素电路和数据线数量还可以起到加宽数据线和增大像素尺寸的作用，进而可以减小数据线上的压降和降低阵列基板的工艺难度。
The invention discloses an array substrate, a display panel and a driving method for the display panel, including a pixel and a pixel circuit, organic light-emitting diodes of at least three colors are arranged in the pixel, since at least one pixel circuit includes a first light-emitting control module and a second Two light emitting control modules, the first light emitting control module and the second light emitting control module of the pixel circuit are respectively connected to two organic light emitting diodes of the same color. In this way, the first light-emitting control module and the second light-emitting control module using one pixel circuit respectively control two organic light-emitting diodes of the same color, which can not only reduce the number of pixel circuits on the array substrate, but also reduce the number of data lines, thereby reducing the number of organic light-emitting diodes. Capacitive coupling of small data lines. Moreover, on the basis of a certain PPI, reducing the number of pixel circuits and data lines can also play a role in widening the data lines and increasing the pixel size, thereby reducing the voltage drop on the data lines and reducing the process difficulty of the array substrate.
Description
技术领域technical field
本发明涉及显示技术领域，尤指一种阵列基板、显示面板及显示面板的驱动方法。The invention relates to the field of display technology, in particular to an array substrate, a display panel and a driving method for the display panel.
背景技术Background technique
有机电致发光二极管(Organic Light Emitting Diode，OLED)显示器是当今平板显示器研究领域的热点之一，与液晶显示器相比，OLED显示器具有低能耗、生产成本低、自发光、宽视角及响应速度快等优点，目前，在手机、PDA、数码相机等平板显示领域，OLED显示器已经开始取代传统的液晶显示屏(Liquid Crystal Display，LCD)。Organic Light Emitting Diode (OLED) display is one of the hot spots in the field of flat panel display research today. Compared with liquid crystal display, OLED display has low energy consumption, low production cost, self-illumination, wide viewing angle and fast response speed. At present, OLED displays have begun to replace traditional Liquid Crystal Displays (LCDs) in flat panel display fields such as mobile phones, PDAs, and digital cameras.
在现有的OLED显示器，如图1所示，具有呈矩阵排列的多个像素，每一像素中包括R、G、B三个有机发光二极管，每一有机发光二极管通过一个像素电路与对应列的数据线以及对应行的栅线相连，有机发光二极管在像素电路的驱动下发光。In the existing OLED display, as shown in Figure 1, it has a plurality of pixels arranged in a matrix, and each pixel includes three organic light-emitting diodes (R, G, and B), and each organic light-emitting diode is connected to the corresponding column through a pixel circuit. The data lines of the corresponding row are connected to the gate lines of the corresponding row, and the organic light emitting diode emits light under the driving of the pixel circuit.
但是，现有的OLED显示器，由于数据线的数量比较多，数据线之间会产生电容耦合作用，而数据线的电容耦合作用，会使有机发光二极管的亮度低于正常亮度。因此，如何降低显示器的电容耦合作用是本领域技术人员亟需解决的技术问题。However, in the existing OLED display, due to the large number of data lines, capacitive coupling will occur between the data lines, and the capacitive coupling of the data lines will make the brightness of the organic light emitting diode lower than the normal brightness. Therefore, how to reduce the capacitive coupling effect of the display is an urgent technical problem to be solved by those skilled in the art.
发明内容Contents of the invention
有鉴于此，本发明实施例提供了一种阵列基板、显示面板及显示面板的驱动方法，通过将相同颜色的有机发光二极管共用一个像素电路，通过减少像素电路的数量减少数据线的数量，从而可以减小显示面板的数据线电容耦合作用。In view of this, an embodiment of the present invention provides an array substrate, a display panel, and a driving method for the display panel, by sharing one pixel circuit with organic light emitting diodes of the same color, and reducing the number of data lines by reducing the number of pixel circuits, thereby The capacitive coupling effect of the data line of the display panel can be reduced.
本发明实施例提供的一种阵列基板，包括：An array substrate provided by an embodiment of the present invention includes:
沿行方向和列方向排列的多个像素，每一所述像素中设置有至少三种不同颜色的有机发光二极管；以及A plurality of pixels arranged along the row direction and the column direction, each of which is provided with organic light emitting diodes of at least three different colors; and
像素电路；pixel circuit;
其中，至少一个所述像素电路包括第一发光控制模块和第二发光控制模块，同一所述像素电路的所述第一发光控制模块和所述第二发光控制模块分别连接两个相同颜色的所述有机发光二极管；Wherein, at least one of the pixel circuits includes a first light emission control module and a second light emission control module, and the first light emission control module and the second light emission control module of the same pixel circuit are respectively connected to two light emission control modules of the same color. said organic light emitting diode;
与同一所述像素电路连接的两个相同颜色的所述有机发光二极管分别为第一有机发光二极管和第二有机发光二极管。The two organic light emitting diodes of the same color connected to the same pixel circuit are respectively a first organic light emitting diode and a second organic light emitting diode.
相应地，本发明实施例还提供了一种显示面板，包括本发明实施例提供的上述任一种阵列基板。Correspondingly, an embodiment of the present invention further provides a display panel, including any one of the above-mentioned array substrates provided by the embodiments of the present invention.
相应地，本发明实施例还提供了一种上述显示面板的驱动方法，在显示每一帧画面时，所述像素电路驱动与其连接的所述第一有机发光二极管和所述第二有机发光二极管交替发光。Correspondingly, an embodiment of the present invention also provides a driving method of the above-mentioned display panel. When displaying each frame of picture, the pixel circuit drives the first organic light emitting diode and the second organic light emitting diode connected thereto. glow alternately.
相应地，本发明实施例还提供了另一种上述显示面板的驱动方法，在显示第奇数帧画面时，所述像素电路驱动与其连接所述第一有机发光二极管发光；在显示第偶数帧画面时，所述像素电路驱动与其连接的所述第二有机发光二极管发光。Correspondingly, the embodiment of the present invention also provides another driving method of the above-mentioned display panel. When displaying an odd-numbered frame picture, the pixel circuit drives the first organic light-emitting diode connected to it to emit light; when displaying an even-numbered frame picture, , the pixel circuit drives the second organic light emitting diode connected thereto to emit light.
本发明有益效果如下：The beneficial effects of the present invention are as follows:
本发明实施例提供的一种阵列基板、显示面板及显示面板的驱动方法，其中阵列基板包括像素和像素电路，像素中设置有至少三种不同颜色的有机发光二极管，由于至少一个像素电路包括第一发光控制模块和第二发光控制模块，同一像素电路的第一发光控制模块和第二发光控制模块分别连接两个相同颜色的有机发光二极管。这样采用一个像素电路的第一发光控制模块和第二发光控制模块分别控制相同颜色的两个有机发光二极管，不仅可以减少阵列基板上像素电路的数量，还可以减少数据线的数量，从而可以减小数据线的电容耦合作用。并且，在单位面积上像素数目(PPI)一定的基础上，减少像素电路和数据线数量还可以起到加宽数据线宽度和增大像素尺寸的作用，进而可以减小数据线上的压降和降低阵列基板的工艺难度。The embodiments of the present invention provide an array substrate, a display panel, and a driving method for the display panel, wherein the array substrate includes pixels and pixel circuits, and organic light emitting diodes of at least three different colors are arranged in the pixels, since at least one pixel circuit includes a first A light emitting control module and a second light emitting control module, the first light emitting control module and the second light emitting control module of the same pixel circuit are respectively connected to two organic light emitting diodes of the same color. In this way, the first light-emitting control module and the second light-emitting control module using one pixel circuit respectively control two organic light-emitting diodes of the same color, which can not only reduce the number of pixel circuits on the array substrate, but also reduce the number of data lines, thereby reducing the number of organic light-emitting diodes. Capacitive coupling of small data lines. Moreover, on the basis of a certain number of pixels per unit area (PPI), reducing the number of pixel circuits and data lines can also play a role in widening the width of the data line and increasing the pixel size, thereby reducing the voltage drop on the data line and reduce the process difficulty of the array substrate.
附图说明Description of drawings
图1为本发明实施例提供的一种阵列基板的结构示意图；FIG. 1 is a schematic structural diagram of an array substrate provided by an embodiment of the present invention;
图2a为本发明实施例提供的又一种阵列基板的结构示意图；FIG. 2a is a schematic structural diagram of another array substrate provided by an embodiment of the present invention;
图2b为本发明实施例提供的又一种阵列基板的结构示意图；FIG. 2b is a schematic structural diagram of another array substrate provided by an embodiment of the present invention;
图3a为本发明实施例提供的又一种阵列基板的结构示意图；FIG. 3a is a schematic structural diagram of another array substrate provided by an embodiment of the present invention;
图3b为本发明实施例提供的又一种阵列基板的结构示意图；FIG. 3b is a schematic structural diagram of another array substrate provided by an embodiment of the present invention;
图4为本发明实施例提供的阵列基板中像素电路的结构示意图；4 is a schematic structural diagram of a pixel circuit in an array substrate provided by an embodiment of the present invention;
图5a为本发明实施例提供的阵列基板中一种像素电路的具体结构示意图；FIG. 5a is a schematic structural diagram of a pixel circuit in an array substrate provided by an embodiment of the present invention;
图5b为本发明实施例提供的阵列基板中一种像素电路的具体结构示意图；FIG. 5b is a schematic structural diagram of a pixel circuit in an array substrate provided by an embodiment of the present invention;
图6a为本发明实施例提供的阵列基板中又一种像素电路的具体结构示意图；Fig. 6a is a schematic structural diagram of another pixel circuit in an array substrate provided by an embodiment of the present invention;
图6b为本发明实施例提供的阵列基板中又一种像素电路的具体结构示意图；FIG. 6b is a schematic structural diagram of another pixel circuit in an array substrate provided by an embodiment of the present invention;
图7为本发明实施例提供的阵列基板中又一种像素电路的具体结构示意图；FIG. 7 is a schematic structural diagram of another pixel circuit in an array substrate provided by an embodiment of the present invention;
图8为本发明实施例提供的阵列基板中又一种像素电路的具体结构示意图；FIG. 8 is a schematic structural diagram of another pixel circuit in an array substrate provided by an embodiment of the present invention;
图9为图8所示的像素电路对应的一种工作时序图；FIG. 9 is a working timing diagram corresponding to the pixel circuit shown in FIG. 8;
图10为图8所示的像素电路对应的另一种工作时序图；FIG. 10 is another working timing diagram corresponding to the pixel circuit shown in FIG. 8;
图11为图8所示的像素电路对应的另一种工作时序图。FIG. 11 is another working timing diagram corresponding to the pixel circuit shown in FIG. 8 .
具体实施方式detailed description
为了使本发明的目的、技术方案和优点更加清楚，下面将结合附图对本发明作进一步地详细描述，显然，所描述的实施例仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例，都属于本发明保护的范围。In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only some of the embodiments of the present invention, rather than all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
附图中各部件的形状和大小不反映真实比例，目的只是示意说明本发明内容。The shapes and sizes of the components in the drawings do not reflect the real scale, but are only intended to schematically illustrate the content of the present invention.
图1为本发明实施例提供的一种阵列基板的结构示意图。本发明实施例提供的一种阵列基板，如图1所示，包括：FIG. 1 is a schematic structural diagram of an array substrate provided by an embodiment of the present invention. An array substrate provided by an embodiment of the present invention, as shown in FIG. 1 , includes:
沿行方向和列方向排列的多个像素1(图1中仅示出沿行方向排列的两个像素)，每一像素1中设置有至少三种不同颜色的有机发光二极管(图1中的R、G和B)；以及像素电路2；其中，至少一个像素电路2包括第一发光控制模块21和第二发光控制模块22，同一像素电路2的第一发光控制模块21和第二发光控制模块22分别连接两个相同颜色的有机发光二极管(图1中的R或G)；与同一像素电路2连接的两个相同颜色的有机发光二极管分别为第一有机发光二极管11和第二有机发光二极管12。A plurality of pixels 1 arranged in the row direction and the column direction (only two pixels arranged in the row direction are shown in FIG. 1 ), each pixel 1 is provided with at least three organic light-emitting diodes of different colors (the R, G, and B); and pixel circuits 2; wherein at least one pixel circuit 2 includes a first light emission control module 21 and a second light emission control module 22, and the first light emission control module 21 and the second light emission control module of the same pixel circuit 2 The module 22 is respectively connected to two organic light emitting diodes of the same color (R or G in FIG. 1 ); the two organic light emitting diodes of the same color connected to the same pixel circuit 2 are the first organic light emitting diode 11 and the second organic light emitting diode 11 respectively. Diode 12.
在本发明实施例提供的上述阵列基板中，包括像素1和像素电路2，像素1中设置有至少三种不同颜色的有机发光二极管，由于至少一个像素电路2包括第一发光控制模块21和第二发光控制模块22，同一像素电路2的第一发光控制模块21和第二发光控制模块22分别连接两个相同颜色的有机发光二极管。这样采用一个像素电路2的第一发光控制模块21和第二发光控制模块22分别控制相同颜色的两个有机发光二极管，不仅可以减少阵列基板上像素电路2的数量，还可以减少数据线的数量，从而可以减小数据线的电容耦合作用。并且，在单位面积上像素数目(PPI)一定的基础上，减少像素电路和数据线数量还可以起到加宽数据线宽度和增大像素尺寸的作用，进而可以减小数据线上的压降和降低阵列基板的工艺难度。The above-mentioned array substrate provided by the embodiment of the present invention includes a pixel 1 and a pixel circuit 2, and at least three organic light emitting diodes of different colors are arranged in the pixel 1. Since at least one pixel circuit 2 includes a first light emission control module 21 and a second Two light emitting control modules 22, the first light emitting control module 21 and the second light emitting control module 22 of the same pixel circuit 2 are respectively connected to two organic light emitting diodes of the same color. In this way, the first light-emitting control module 21 and the second light-emitting control module 22 of one pixel circuit 2 control two organic light-emitting diodes of the same color respectively, which can not only reduce the number of pixel circuits 2 on the array substrate, but also reduce the number of data lines. , so that the capacitive coupling effect of the data line can be reduced. Moreover, on the basis of a certain number of pixels per unit area (PPI), reducing the number of pixel circuits and data lines can also play a role in widening the width of the data line and increasing the pixel size, thereby reducing the voltage drop on the data line and reduce the process difficulty of the array substrate.
需要说明的是，本发明说明书附图均是以像素中设置有R、G、B三种颜色的有机发光二极管为例进行说明的，但本发明对有机发光二极管的具体颜色不做具体限制。It should be noted that the drawings in the description of the present invention all take organic light-emitting diodes with three colors of R, G, and B in the pixel as an example for illustration, but the present invention does not specifically limit the specific colors of the organic light-emitting diodes.
本发明实施例提供的上述阵列基板，可以是每一像素电路均连接有两个相同颜色的有机发光二极管，也可以仅有部分像素电路是连接有两个相同颜色的有机发光二极管，在此不作限定。In the above-mentioned array substrate provided by the embodiment of the present invention, each pixel circuit may be connected with two organic light emitting diodes of the same color, or only part of the pixel circuits may be connected with two organic light emitting diodes of the same color, which will not be described here. limited.
在一些可选的实现方式中，在本发明实施例提供的上述阵列基板中，每一像素电路均连接有两个相同颜色的有机发光二极管。In some optional implementation manners, in the above-mentioned array substrate provided by the embodiment of the present invention, each pixel circuit is connected to two organic light emitting diodes of the same color.
在一些可选的实现方式中，在本发明实施例提供的上述阵列基板中，与同一像素电路连接的第一有机发光二极管和第二有机发光二极管同时发光。与像素分辨率相同的现有显示面板相比，相当于减少了像素电路的数量，同时由于像素电路数量减少还会相应的减少数据线的数量。In some optional implementation manners, in the above-mentioned array substrate provided by the embodiment of the present invention, the first organic light emitting diode and the second organic light emitting diode connected to the same pixel circuit emit light at the same time. Compared with the existing display panel with the same pixel resolution, it is equivalent to reducing the number of pixel circuits, and at the same time, the number of data lines is correspondingly reduced due to the reduction in the number of pixel circuits.
在一些可选的实现方式中，在本发明实施例提供的上述阵列基板中，与同一像素电路连接的第一有机发光二极管和第二有机发光二极管交替发光。相当于每种颜色的有机发光二极管的寿命提高了一倍，从而延长了阵列基板的使用寿命。与同一像素电路连接的第一有机发光二极管和第二有机发光二极管可以是一帧画面内交替发光发光，也可以是在相邻两帧画面间交替发光，在此不作限定。In some optional implementation manners, in the above-mentioned array substrate provided by the embodiment of the present invention, the first organic light emitting diode and the second organic light emitting diode connected to the same pixel circuit emit light alternately. This is equivalent to doubling the lifespan of organic light-emitting diodes of each color, thereby prolonging the lifespan of the array substrate. The first organic light emitting diode and the second organic light emitting diode connected to the same pixel circuit may alternately emit light within one frame, or alternately emit light between two adjacent frames, which is not limited herein.
在一些可选的实现方式中，在本发明实施例提供的上述阵列基板中，如图2a和图2b所示，图2a为本发明实施例提供的又一种阵列基板的结构示意图，图2b为本发明实施例提供的又一种阵列基板的结构示意图。其中，与同一像素电路2连接的第一有机发光二极管11和第二有机发光二极管12分别属于相邻的两个像素1，这样便于阵列基板上的布线。In some optional implementation manners, in the above-mentioned array substrate provided by the embodiment of the present invention, as shown in FIG. 2a and FIG. 2b, FIG. 2a is a schematic structural diagram of another array substrate provided by the embodiment of the present invention, and FIG. 2b A schematic structural diagram of another array substrate provided by an embodiment of the present invention. Wherein, the first organic light emitting diode 11 and the second organic light emitting diode 12 connected to the same pixel circuit 2 respectively belong to two adjacent pixels 1 , which facilitates wiring on the array substrate.
进一步地，在本发明实施例提供的上述阵列基板中，如图2a所示，与同一像素电路2连接的第一有机发光二极管11和第二有机发光二极管12沿行方向相邻设置；或者，如图2b所示，与同一像素电路2连接的第一有机发光二极管11和第二有机发光二极管12沿列方向相邻设置。Further, in the above array substrate provided by the embodiment of the present invention, as shown in FIG. 2a, the first organic light emitting diode 11 and the second organic light emitting diode 12 connected to the same pixel circuit 2 are adjacently arranged along the row direction; or, As shown in FIG. 2b, the first organic light emitting diode 11 and the second organic light emitting diode 12 connected to the same pixel circuit 2 are arranged adjacently along the column direction.
以图2a所示的阵列基板为例，假设在一帧画面中，相邻的两个像素1中，一个像素1需要显示紫色、另一个像素1需要显示黄色。则在沿列方向相邻的这两个像素1中，与两个红色的有机发光二极管R相连的像素电路2控制该两个红色的有机发光二极管R同时发光，与两个蓝色的有机发光二极管B相连的像素电路2仅控制位于第一列像素1中的蓝色的有机发光二极管B发光，与两个绿色的有机发光二极管G相连的像素电路2仅控制位于第二列像素1中的绿色的有机发光二极管G发光。这时，第一列像素1中仅有红色的有机发光二极管R和蓝色的有机发光二极管B发光，该像素1显示紫色。第二列像素1中仅有红色的有机发光二极管R和绿色的有机发光二极管G发光，该像素1显示黄色。从而利用三个像素电路2控制两个像素1，减少了引线。Taking the array substrate shown in FIG. 2a as an example, suppose that in a frame of images, among two adjacent pixels 1 , one pixel 1 needs to display purple, and the other pixel 1 needs to display yellow. Then, in the two adjacent pixels 1 along the column direction, the pixel circuit 2 connected to the two red organic light emitting diodes R controls the two red organic light emitting diodes R to emit light at the same time, and the two blue organic light emitting diodes R The pixel circuit 2 connected to the diode B only controls the blue organic light-emitting diode B located in the first row of pixels 1 to emit light, and the pixel circuit 2 connected to the two green organic light-emitting diodes G only controls the LEDs located in the second row of pixels 1 A green organic light emitting diode G emits light. At this time, only the red organic light emitting diode R and the blue organic light emitting diode B in the first row of pixels 1 emit light, and the pixel 1 displays purple. Only the red organic light emitting diode R and the green organic light emitting diode G emit light in the pixel 1 of the second column, and the pixel 1 displays yellow. Therefore, three pixel circuits 2 are used to control two pixels 1, which reduces lead wires.
在一些可选的实现方式中，在本发明实施例提供的上述阵列基板中，如图3a和图3b所示，图3a为本发明实施例提供的又一种阵列基板的结构示意图，图3b为本发明实施例提供的又一种阵列基板的结构示意图。其中，与同一像素电路2连接的第一有机发光二极管11和第二有机发光二极管12属于同一个像素1。In some optional implementation manners, in the above array substrate provided by the embodiment of the present invention, as shown in Figure 3a and Figure 3b, Figure 3a is a schematic structural diagram of another array substrate provided by the embodiment of the present invention, and Figure 3b A schematic structural diagram of another array substrate provided by an embodiment of the present invention. Wherein, the first organic light emitting diode 11 and the second organic light emitting diode 12 connected to the same pixel circuit 2 belong to the same pixel 1 .
进一步地，在本发明实施例提供的上述阵列基板中，如图3a和图3b所示，各像素1中每种颜色的有机发光二极管(例如图3a和图3b中的R、G或B)的数量为两个，且像素1中两个相同颜色的有机发光二极管沿行方向或沿列方向相邻设置。Further, in the above-mentioned array substrate provided by the embodiment of the present invention, as shown in FIG. 3a and FIG. The number is two, and two organic light emitting diodes of the same color in the pixel 1 are arranged adjacently along the row direction or along the column direction.
在一些可选的实现方式中，在本发明实施例提供的上述阵列基板中，如图4所示，图4为本发明实施例提供的阵列基板中像素电路的结构示意图。各像素电路2还包括驱动模块23，驱动模块23用于驱动第一有机发光二极管11或第二有机发光二极管12发光；其中，第一有机发光二极管11通过第一发光控制模块21与驱动模块23连接，第二有机发光二极管12通过第二发光控制模块22与驱动模块23连接；第一发光控制模块21用于在第一控制信号Emit1的控制下使第一有机发光二极管11与驱动模块23导通；第二发光控制模块22用于在第二控制信号Emit2的控制下使第二有机发光二极管12与驱动模块23导通。In some optional implementation manners, in the above-mentioned array substrate provided by the embodiment of the present invention, as shown in FIG. 4 , FIG. 4 is a schematic structural diagram of a pixel circuit in the array substrate provided by the embodiment of the present invention. Each pixel circuit 2 also includes a driving module 23, and the driving module 23 is used to drive the first organic light emitting diode 11 or the second organic light emitting diode 12 to emit light; connection, the second organic light emitting diode 12 is connected to the driving module 23 through the second light emitting control module 22; the first light emitting control module 21 is used to make the first organic light emitting diode 11 and the driving module 23 lead under the control of the first control signal Emit1 On; the second light emission control module 22 is used to make the second organic light emitting diode 12 and the driving module 23 conduct on under the control of the second control signal Emit2.
在一些可选的实现方式中，在本发明实施例提供的上述阵列基板中，如图5a和图5b所示，图5a为本发明实施例提供的阵列基板中一种像素电路的具体结构示意图，图5b为本发明实施例提供的阵列基板中又一种像素电路的具体结构示意图。像素电路2中，第一发光控制模块21包括第一开关晶体管M1；其中，第一开关晶体管M1的栅极用于接收第一控制信号Emit1，第一开关晶体管M1的第一极与第一有机发光二极管11相连，第一开关晶体管M1的第二极与驱动模块23相连。In some optional implementation manners, in the above-mentioned array substrate provided by the embodiment of the present invention, as shown in FIG. 5a and FIG. 5b, FIG. 5a is a specific structural schematic diagram of a pixel circuit in the array substrate provided by the embodiment of the present invention , FIG. 5b is a specific structural schematic diagram of another pixel circuit in the array substrate provided by the embodiment of the present invention. In the pixel circuit 2, the first light emission control module 21 includes a first switching transistor M1; wherein, the gate of the first switching transistor M1 is used to receive the first control signal Emit1, and the first pole of the first switching transistor M1 is connected to the first organic The light emitting diodes 11 are connected, and the second pole of the first switching transistor M1 is connected with the driving module 23 .
在一些可选的实现方式中，如图5a和图5b所示，像素电路2中，第二发光控制模块22包括第二开关晶体管M2；其中，第二开关晶体管M2的栅极用于接收第二控制信号Emit2，第二开关晶体管M2的第一极与第二有机发光二极管12相连，第二开关晶体管M2的第二极与驱动模块23相连。In some optional implementation manners, as shown in FIG. 5a and FIG. 5b, in the pixel circuit 2, the second light emission control module 22 includes a second switching transistor M2; wherein, the gate of the second switching transistor M2 is used to receive the first Two control signals Emit2 , the first pole of the second switching transistor M2 is connected to the second organic light emitting diode 12 , and the second pole of the second switching transistor M2 is connected to the driving module 23 .
在一些可选的实现方式中，第一开关晶体管M1和第二开关晶体管M2均为P型晶体管或者均为N型晶体管。如图5a所示，像素电路2中，第一开关晶体管M1和第二开关晶体管M2均为P型晶体管；或者如图5b所示，第一开关晶体管M1和第二开关晶体管M2均为N型晶体管。这样第一开关晶体管M1和第二开关晶体管M2可以采用相同制备工艺。In some optional implementation manners, both the first switch transistor M1 and the second switch transistor M2 are P-type transistors or both are N-type transistors. As shown in Figure 5a, in the pixel circuit 2, both the first switch transistor M1 and the second switch transistor M2 are P-type transistors; or as shown in Figure 5b, both the first switch transistor M1 and the second switch transistor M2 are N-type transistor. In this way, the first switch transistor M1 and the second switch transistor M2 can adopt the same manufacturing process.
在一些可选的实现方式中，在本发明实施例提供的上述阵列基板中，如图6a和图6b所示，图6a为本发明实施例提供的阵列基板中又一种像素电路的具体结构示意图，图6b为本发明实施例提供的阵列基板中又一种像素电路的具体结构示意图。在像素电路2中，第一控制信号Emit1与第二控制信号Emit2为同一控制信号，第一开关晶体管M1和第二开关晶体管M2为不同类型的晶体管。如图6a所示，第一开关晶体管M1为N型晶体管，第二开关晶体管M2为P型晶体管；或者，如图6b所示，第一开关晶体管M1为P型晶体管，第二开关晶体管M2为N型晶体管。这样，同一时刻，第一开关晶体管M1和第二开关晶体管M2中只能有一个处于导通状态，从而第一有机发光二极管11和第二有机发光二极管12只能是交替发光。In some optional implementation manners, in the above array substrate provided by the embodiment of the present invention, as shown in Figure 6a and Figure 6b, Figure 6a is a specific structure of another pixel circuit in the array substrate provided by the embodiment of the present invention Schematic diagram, FIG. 6b is a specific structural schematic diagram of another pixel circuit in the array substrate provided by the embodiment of the present invention. In the pixel circuit 2, the first control signal Emit1 and the second control signal Emit2 are the same control signal, and the first switching transistor M1 and the second switching transistor M2 are different types of transistors. As shown in Figure 6a, the first switch transistor M1 is an N-type transistor, and the second switch transistor M2 is a P-type transistor; or, as shown in Figure 6b, the first switch transistor M1 is a P-type transistor, and the second switch transistor M2 is N-type transistor. In this way, at the same time, only one of the first switching transistor M1 and the second switching transistor M2 can be in a conducting state, so that the first organic light emitting diode 11 and the second organic light emitting diode 12 can only emit light alternately.
在一些可选的实现方式中，在本发明实施例提供的上述阵列基板中，驱动模块可以是任何能够驱动有机发光二极管发光的结构，在此不作限定。下面以其中一种实施例举例说明。In some optional implementation manners, in the above-mentioned array substrate provided by the embodiments of the present invention, the driving module may be any structure capable of driving the organic light emitting diode to emit light, which is not limited herein. One of the embodiments will be described as an example below.
在一些可选的实现方式中，在本发明实施例提供的上述阵列基板中，如图5a至图6b所示，像素电路2中，驱动模块23包括：第三开关晶体管M3、第四开关晶体管M4、第五开关晶体管M5、第六开关晶体管M5、驱动晶体管M0和电容C1；其中，第三开关晶体管M3的栅极用于接收第一扫描信号Scan1，第三开关晶体管M3的第一极用于接收参考信号Vref，第三开关晶体管M3的第二极分别与驱动晶体管M0的栅极、第六开关晶体管M6的第一极以及电容C1的第一端相连；第四开关晶体管M4的栅极与用于接收第三控制信号Emit3，第四开关晶体管M4的第一极分别与电容C1的第二端和第一电压源VDD相连，第四开关晶体管M4的第二极分别与驱动晶体管M0的第一极和第五开关晶体管M5的第二极相连；第五开关晶体管M5的栅极用于接收第二扫描信号Scan2，第五开关晶体管M5的第一极用于接收数字信号Vdata；第六开关晶体管M6的栅极用于接收第二扫描信号Scan2，第六开关晶体管M6的第二极分别与驱动晶体管M0的第二极、第一发光控制模块21和第二发光控制模块22相连。In some optional implementation manners, in the above-mentioned array substrate provided by the embodiment of the present invention, as shown in FIG. 5a to FIG. M4, the fifth switching transistor M5, the sixth switching transistor M5, the driving transistor M0 and the capacitor C1; wherein, the gate of the third switching transistor M3 is used to receive the first scan signal Scan1, and the first pole of the third switching transistor M3 is used for In receiving the reference signal Vref, the second pole of the third switching transistor M3 is respectively connected to the gate of the drive transistor M0, the first pole of the sixth switching transistor M6 and the first end of the capacitor C1; the gate of the fourth switching transistor M4 For receiving the third control signal Emit3, the first pole of the fourth switch transistor M4 is respectively connected to the second terminal of the capacitor C1 and the first voltage source VDD, and the second pole of the fourth switch transistor M4 is respectively connected to the drive transistor M0 The first pole is connected to the second pole of the fifth switching transistor M5; the gate of the fifth switching transistor M5 is used to receive the second scan signal Scan2, and the first pole of the fifth switching transistor M5 is used to receive the digital signal Vdata; the sixth The gate of the switching transistor M6 is used to receive the second scanning signal Scan2, and the second pole of the sixth switching transistor M6 is connected to the second pole of the driving transistor M0, the first light emitting control module 21 and the second light emitting control module 22 respectively.
进一步地，在本发明实施例提供的上述阵列基板中，如图7所示，图7为本发明实施例提供的阵列基板中又一种像素电路的具体结构示意图，像素电路中，驱动模块23还包括：第七开关晶体管M7；其中，第七开关晶体管M7的栅极用于接收第四控制信号Emit4，第七开关晶体管M7的第一极与第一电压源VDD相连，第七开关晶体管M7的第二极与驱动晶体管M0的第一极相连。Further, in the above-mentioned array substrate provided by the embodiment of the present invention, as shown in FIG. 7 , FIG. 7 is a schematic structural diagram of another pixel circuit in the array substrate provided by the embodiment of the present invention. In the pixel circuit, the driving module 23 Also includes: a seventh switch transistor M7; wherein, the gate of the seventh switch transistor M7 is used to receive the fourth control signal Emit4, the first pole of the seventh switch transistor M7 is connected to the first voltage source VDD, and the seventh switch transistor M7 The second pole of the drive transistor M0 is connected to the first pole.
在一些可选的实现方式中，如图8所示，图8为本发明实施例提供的阵列基板中又一种像素电路的具体结构示意图。图8与图7提供的实施例的区别在于，第四开关晶体管M4的栅极接收第一控制信号Emit1，第七开关晶体管M7的栅极接收第二控制信号Emit2。第四开关晶体管与第一开关晶体管M1接收相同的控制信号，第七开关晶体管M7与第二开关晶体管M2接收相同的控制信号，从而减少控制信号的数量。In some optional implementation manners, as shown in FIG. 8 , FIG. 8 is a schematic structural diagram of another pixel circuit in an array substrate provided by an embodiment of the present invention. The difference between FIG. 8 and the embodiment provided in FIG. 7 is that the gate of the fourth switching transistor M4 receives the first control signal Emit1, and the gate of the seventh switching transistor M7 receives the second control signal Emit2. The fourth switch transistor receives the same control signal as the first switch transistor M1, and the seventh switch transistor M7 receives the same control signal as the second switch transistor M2, thereby reducing the number of control signals.
以上仅是举例说明像素电路中驱动模块的具体结构，在具体实施时，驱动模块的具体结构不限于本发明实施例提供的上述结构，还可以是本领域技术人员可知的其他结构，在此不做限定。The above is just an example to illustrate the specific structure of the driving module in the pixel circuit. In actual implementation, the specific structure of the driving module is not limited to the above-mentioned structure provided by the embodiment of the present invention, and may also be other structures known to those skilled in the art, which are not described herein. Do limited.
在具体实施，在本发明实施例提供的上述阵列基板中，像素电路中，第三开关晶体管、第四开关晶体管、第五开关晶体管、第六开关晶体管和第七开关晶体管均为N型晶体管或P型晶体管。In specific implementation, in the above-mentioned array substrate provided by the embodiment of the present invention, in the pixel circuit, the third switch transistor, the fourth switch transistor, the fifth switch transistor, the sixth switch transistor and the seventh switch transistor are all N-type transistors or P-type transistors.
优选的，为了简化制备工艺，在本发明实施提供的上述阵列基板中，像素电路中的所有晶体管均为N型晶体管或P型晶体管。Preferably, in order to simplify the manufacturing process, in the above-mentioned array substrate provided by the implementation of the present invention, all transistors in the pixel circuit are N-type transistors or P-type transistors.
需要说明的是，本发明上述实施例中提到的晶体管可以是薄膜晶体管(TFT，ThinFilm Transistor)，也可以是金属氧化物半导体场效应管(MOS，Metal OxideScmiconductor)，在此不作限定。在具体实施中，这些晶体管的第一极可以为源极，第二极为漏极，当然也可以是第一极为漏极，第二极为源极。It should be noted that the transistor mentioned in the above embodiments of the present invention may be a thin film transistor (TFT, ThinFilm Transistor) or a metal oxide semiconductor field effect transistor (MOS, Metal OxideSmiconductor), which is not limited herein. In a specific implementation, the first pole of these transistors may be a source, and the second pole may be a drain, of course, the first pole may also be a drain, and the second pole may be a source.
下面以图8所示的像素电路为例，说明本发明实施例提供的上述阵列基板中，像素电路的工作原理。其中在图8所示的像素电路中，所有晶体管均为P型晶体管，各P型晶体管在高电平信号作用下截止，在低电平信号作用下导通。下述描述中以1表示高电平信号，0表示低电平信号。The following takes the pixel circuit shown in FIG. 8 as an example to describe the working principle of the pixel circuit in the above-mentioned array substrate provided by the embodiment of the present invention. In the pixel circuit shown in FIG. 8 , all transistors are P-type transistors, and each P-type transistor is turned off under the action of a high-level signal, and turned on under the action of a low-level signal. In the following description, 1 represents a high-level signal, and 0 represents a low-level signal.
以第一有机发光二极管和第二有机发光二极管同时发光为例，一帧时间对应的输入时序图如图9所示，图9为图8所示的像素电路对应的一种工作时序图。具体地，选取如图9所示的输入时序图中的T1、T2和T3三个阶段。Taking the first organic light emitting diode and the second organic light emitting diode to emit light simultaneously as an example, the input timing diagram corresponding to one frame time is shown in FIG. 9 , and FIG. 9 is a working timing diagram corresponding to the pixel circuit shown in FIG. 8 . Specifically, three stages T1, T2 and T3 in the input timing diagram shown in FIG. 9 are selected.
在重置阶段T1，Scan1＝0，Scan2＝1，Emit1＝1，Emit2＝1。In the reset phase T1, Scan1=0, Scan2=1, Emit1=1, Emit2=1.
仅第三开关晶体管M3导通，其它开关晶体管均截止。导通的第三开关晶体管M3将参考信号Vref提供给驱动晶体管M0的栅极，电容C1开始充电，电容C1第一端的电压为Vref。在此阶段中，参考信号Vref需要满足Vref>VGL-Vth，VGL为低电平信号的电位，Vth为驱动晶体管M0的阈值电压，否则驱动晶体管M0的栅极的电压为VGL-Vth。Only the third switch transistor M3 is turned on, and other switch transistors are all turned off. The turned-on third switching transistor M3 provides the reference signal Vref to the gate of the driving transistor M0, the capacitor C1 starts to charge, and the voltage at the first terminal of the capacitor C1 is Vref. In this stage, the reference signal Vref needs to satisfy Vref>VGL-V th , VGL is the potential of the low-level signal, and V th is the threshold voltage of the driving transistor M0, otherwise the gate voltage of the driving transistor M0 is VGL-V th .
在补偿阶段T2，Scan1＝1，Scan2＝0，Emit1＝1，Emit2＝1。In the compensation phase T2, Scan1=1, Scan2=0, Emit1=1, Emit2=1.
第五开关晶体管M5和第六晶体管M6导通，其它开关晶体管截止。驱动晶体管M0导通，数字信号Vdata依次通过导通的第五开关晶体管M5、驱动晶体晶体管M0和第六晶体管N6导通使电容C1开始放电，当驱动晶体管M0的栅极电压与其第一极电压的电压差Vgs满足Vgs＝Vth时，驱动晶体管M0截止，此时电容C1的第一端的电压变为Vdata+Vth。The fifth switch transistor M5 and the sixth transistor M6 are turned on, and the other switch transistors are turned off. The driving transistor M0 is turned on, and the digital signal Vdata is turned on through the fifth switching transistor M5, the driving crystal transistor M0 and the sixth transistor N6 in turn, so that the capacitor C1 starts to discharge. When the gate voltage of the driving transistor M0 and its first pole voltage When the voltage difference Vgs satisfies Vgs=V th , the driving transistor M0 is turned off, and the voltage at the first terminal of the capacitor C1 becomes Vdata+V th at this moment.
在发光阶段T3，Scan1＝1，Scan2＝1，Emit1＝0，Emit2＝0。In the lighting phase T3, Scan1=1, Scan2=1, Emit1=0, Emit2=0.
第一开关晶体管M1、第二开关晶体管M2、第四开关晶体管M4和第七晶体管M7导通，其它开关晶体管截止。电容C1第一端的电压仍为Vdata+Vth，第一电压源VDD的电压Vdd通过导通的第四开关晶体管M4和第七晶体管M7提供给驱动晶体管M0的栅极。驱动晶体管M0工作处于饱和状态，根据饱和状态电流特性可知，流过驱动晶体管M0工作电流I满足公式：I＝K(Vgs–Vth)2＝K[(Vdata+Vth)-Vdd-Vth]2＝K(Vdata-Vdd)2，其中K为结构参数，相同结构中此数值相对稳定，可以算作常量。需要注意的是，驱动晶体管M0的第二极与第一极的电压差Vds需要满足Vds<Vgs-Vth，其中Vgs-Vth小于或等于5伏。The first switch transistor M1 , the second switch transistor M2 , the fourth switch transistor M4 and the seventh transistor M7 are turned on, and other switch transistors are turned off. The voltage at the first terminal of the capacitor C1 is still Vdata+V th , and the voltage Vdd of the first voltage source VDD is provided to the gate of the driving transistor M0 through the turned-on fourth switching transistor M4 and the seventh transistor M7. The drive transistor M0 works in a saturated state. According to the current characteristics of the saturated state, the operating current I flowing through the drive transistor M0 satisfies the formula: I=K(V gs –V th ) 2 =K[(Vdata+V th )-Vdd-V th ] 2 =K(Vdata-Vdd) 2 , where K is a structure parameter, which is relatively stable in the same structure and can be regarded as a constant. It should be noted that the voltage difference Vds between the second pole and the first pole of the driving transistor M0 needs to satisfy Vds<Vgs-V th , wherein Vgs-V th is less than or equal to 5 volts.
可以看出流过第一有机发光二极管和第二有机发光二极管的电流已经不受驱动晶体管的阈值电压影响，仅与数据信号和第一电源电压端有关，彻底解决了驱动晶体管由于工艺制程以及长时间操作造成的阈值电压漂移对发光二极管的工作电流Ioled的影响，改善面板显示不均匀性。It can be seen that the current flowing through the first organic light-emitting diode and the second organic light-emitting diode is not affected by the threshold voltage of the driving transistor, but only related to the data signal and the first power supply voltage terminal, which completely solves the problem of the driving transistor due to the process and long-term The influence of the threshold voltage drift caused by the time operation on the operating current I oled of the light-emitting diode improves the display unevenness of the panel.
以一帧时间内仅有第一有机发光二极管发光为例，一帧时间对应的输入时序图如图10所示，图10为图8所示的像素电路对应的另一种工作时序图。具体地，选取如图10所示的输入时序图中的T1、T2和T3三个阶段。Taking only the first organic light-emitting diode to emit light in one frame time as an example, the input timing diagram corresponding to one frame time is shown in FIG. 10 , which is another working timing diagram corresponding to the pixel circuit shown in FIG. 8 . Specifically, three stages T1, T2 and T3 in the input timing diagram shown in FIG. 10 are selected.
在重置阶段T1，Scan1＝0，Scan2＝1，Emit1＝1，Emit2＝1。In the reset phase T1, Scan1=0, Scan2=1, Emit1=1, Emit2=1.
仅第三开关晶体管M3导通，其它开关晶体管均截止。导通的第三开关晶体管M3将参考信号Vref提供给驱动晶体管M0的栅极，电容C1开始充电，电容C1第一端的电压为Vref。在此阶段中，参考信号Vref需要满足Vref>VGL-Vth，VGL为低电平信号的电位，Vth为驱动晶体管M0的阈值电压，否则驱动晶体管M0的栅极的电压为VGL-Vth。Only the third switch transistor M3 is turned on, and other switch transistors are all turned off. The turned-on third switching transistor M3 provides the reference signal Vref to the gate of the driving transistor M0, the capacitor C1 starts to charge, and the voltage at the first terminal of the capacitor C1 is Vref. In this stage, the reference signal Vref needs to satisfy Vref>VGL-V th , VGL is the potential of the low-level signal, and V th is the threshold voltage of the driving transistor M0, otherwise the gate voltage of the driving transistor M0 is VGL-V th .
在补偿阶段T2，Scan1＝1，Scan2＝0，Emit1＝1，Emit2＝1。In the compensation phase T2, Scan1=1, Scan2=0, Emit1=1, Emit2=1.
第五开关晶体管M5和第六晶体管M6导通，其它开关晶体管截止。驱动晶体管M0导通，数字信号Vdata依次通过导通的第五开关晶体管M5、驱动晶体晶体管M0和第六晶体管N6导通使电容C1开始放电，当驱动晶体管M0的栅极电压与其第一极电压的电压差Vgs满足Vgs＝Vth时，驱动晶体管M0截止，此时电容C1的第一端的电压变为Vdata+Vth。The fifth switch transistor M5 and the sixth transistor M6 are turned on, and the other switch transistors are turned off. The driving transistor M0 is turned on, and the digital signal Vdata is turned on through the fifth switching transistor M5, the driving crystal transistor M0 and the sixth transistor N6 in turn, so that the capacitor C1 starts to discharge. When the gate voltage of the driving transistor M0 and its first pole voltage When the voltage difference Vgs satisfies Vgs=V th , the driving transistor M0 is turned off, and the voltage at the first terminal of the capacitor C1 becomes Vdata+V th at this time.
在发光阶段T3，Scan1＝1，Scan2＝1，Emit1＝0，Emit2＝1。In the lighting phase T3, Scan1=1, Scan2=1, Emit1=0, Emit2=1.
第一开关晶体管M1、第二开关晶体管M2和第四开关晶体管M4导通，其它开关晶体管截止。电容C1第一端的电压仍为Vdata+Vth，第一电压源VDD的电压Vdd通过导通的第四开关晶体管M4提供给驱动晶体管M0的栅极。驱动晶体管M0工作处于饱和状态，根据饱和状态电流特性可知，流过驱动晶体管M0工作电流I满足公式：I＝K(Vgs–Vth)2＝K[(Vdata+Vth)-Vdd-Vth]2＝K(Vdata-Vdd)2，其中K为结构参数，相同结构中此数值相对稳定，可以算作常量。需要注意的是，驱动晶体管M0的第二极与第一极的电压差Vds需要满足Vds<Vgs-Vth，其中Vgs-Vth小于或等于5伏。The first switch transistor M1 , the second switch transistor M2 and the fourth switch transistor M4 are turned on, and the other switch transistors are turned off. The voltage at the first terminal of the capacitor C1 is still Vdata+V th , and the voltage Vdd of the first voltage source VDD is provided to the gate of the driving transistor M0 through the turned-on fourth switching transistor M4. The drive transistor M0 works in a saturated state. According to the current characteristics of the saturated state, the operating current I flowing through the drive transistor M0 satisfies the formula: I=K(V gs –V th ) 2 =K[(Vdata+V th )-Vdd-V th ] 2 =K(Vdata-Vdd) 2 , where K is a structure parameter, which is relatively stable in the same structure and can be regarded as a constant. It should be noted that the voltage difference Vds between the second pole and the first pole of the driving transistor M0 needs to satisfy Vds<Vgs-V th , wherein Vgs-V th is less than or equal to 5 volts.
可以看出流过第一有机发光二极管的电流已经不受驱动晶体管的阈值电压影响，仅与数据信号和第一电源电压端有关，彻底解决了驱动晶体管由于工艺制程以及长时间操作造成的阈值电压漂移对发光二极管的工作电流Ioled的影响，改善面板显示不均匀性。It can be seen that the current flowing through the first organic light-emitting diode is not affected by the threshold voltage of the driving transistor, but only related to the data signal and the first power supply voltage terminal, which completely solves the threshold voltage of the driving transistor caused by the process and long-term operation. The influence of the drift on the operating current I oled of the light-emitting diode improves the display unevenness of the panel.
以一帧时间内第一有机发光二极管与第二有机发光二极管交替发光为例，一帧时间对应的输入时序图如图11所示，图11为图8所示的像素电路对应的另一种工作时序图。具体地，选取如图11所示的输入时序图中的T1、T2、T3和T4四个阶段。Taking the first organic light emitting diode and the second organic light emitting diode to emit light alternately within one frame time as an example, the input timing diagram corresponding to one frame time is shown in Figure 11, and Figure 11 is another type corresponding to the pixel circuit shown in Figure 8 Working sequence diagram. Specifically, four stages T1, T2, T3 and T4 in the input timing diagram shown in FIG. 11 are selected.
在重置阶段T1，Scan1＝0，Scan2＝1，Emit1＝1，Emit2＝1。In the reset phase T1, Scan1=0, Scan2=1, Emit1=1, Emit2=1.
仅第三开关晶体管M3导通，其它开关晶体管均截止。导通的第三开关晶体管M3将参考信号Vref提供给驱动晶体管M0的栅极，电容C1开始充电，电容C1第一端的电压为Vref。在此阶段中，参考信号Vref需要满足Vref>VGL-Vth，VGL为低电平信号的电位，Vth为驱动晶体管M0的阈值电压，否则驱动晶体管M0的栅极的电压为VGL-Vth。Only the third switch transistor M3 is turned on, and other switch transistors are all turned off. The turned-on third switching transistor M3 provides the reference signal Vref to the gate of the driving transistor M0, the capacitor C1 starts to charge, and the voltage at the first terminal of the capacitor C1 is Vref. In this stage, the reference signal Vref needs to satisfy Vref>VGL-V th , VGL is the potential of the low-level signal, and V th is the threshold voltage of the driving transistor M0, otherwise the gate voltage of the driving transistor M0 is VGL-V th .
在补偿阶段T2，Scan1＝1，Scan2＝0，Emit1＝1，Emit2＝1。In the compensation phase T2, Scan1=1, Scan2=0, Emit1=1, Emit2=1.
第五开关晶体管M5和第六晶体管M6导通，其它开关晶体管截止。驱动晶体管M0导通，数字信号Vdata依次通过导通的第五开关晶体管M5、驱动晶体晶体管M0和第六晶体管N6导通使电容C1开始放电，当驱动晶体管M0的栅极电压与其第一极电压的电压差Vgs满足Vgs＝Vth时，驱动晶体管M0截止，此时电容C1的第一端的电压变为Vdata+Vth。The fifth switch transistor M5 and the sixth transistor M6 are turned on, and the other switch transistors are turned off. The driving transistor M0 is turned on, and the digital signal Vdata is turned on through the fifth switching transistor M5, the driving crystal transistor M0 and the sixth transistor N6 in turn, so that the capacitor C1 starts to discharge. When the gate voltage of the driving transistor M0 and its first pole voltage When the voltage difference Vgs satisfies Vgs=V th , the driving transistor M0 is turned off, and the voltage at the first terminal of the capacitor C1 becomes Vdata+V th at this moment.
在第一发光阶段T3，Scan1＝1，Scan2＝1，Emit1＝0，Emit2＝1。In the first lighting phase T3, Scan1=1, Scan2=1, Emit1=0, Emit2=1.
第一开关晶体管M1、第二开关晶体管M2和第四开关晶体管M4导通，其它开关晶体管截止。电容C1第一端的电压仍为Vdata+Vth，第一电压源VDD的电压Vdd通过导通的第四开关晶体管M4提供给驱动晶体管M0的栅极。驱动晶体管M0工作处于饱和状态，根据饱和状态电流特性可知，流过驱动晶体管M0工作电流I满足公式：I＝K(Vgs–Vth)2＝K[(Vdata+Vth)-Vdd-Vth]2＝K(Vdata-Vdd)2，其中K为结构参数，相同结构中此数值相对稳定，可以算作常量。需要注意的是，驱动晶体管M0的第二极与第一极的电压差Vds需要满足Vds<Vgs-Vth，其中Vgs-Vth小于或等于5伏。The first switch transistor M1 , the second switch transistor M2 and the fourth switch transistor M4 are turned on, and the other switch transistors are turned off. The voltage at the first terminal of the capacitor C1 is still Vdata+V th , and the voltage Vdd of the first voltage source VDD is provided to the gate of the driving transistor M0 through the turned-on fourth switching transistor M4. The drive transistor M0 works in a saturated state. According to the current characteristics of the saturated state, the operating current I flowing through the drive transistor M0 satisfies the formula: I=K(V gs –V th ) 2 =K[(Vdata+V th )-Vdd-V th ] 2 =K(Vdata-Vdd) 2 , where K is a structure parameter, which is relatively stable in the same structure and can be regarded as a constant. It should be noted that the voltage difference Vds between the second pole and the first pole of the driving transistor M0 needs to satisfy Vds<Vgs-V th , wherein Vgs-V th is less than or equal to 5 volts.
在第二发光阶段T4，Scan1＝1，Scan2＝1，Emit1＝1，Emit2＝2。In the second lighting phase T4, Scan1=1, Scan2=1, Emit1=1, Emit2=2.
第一开关晶体管M1、第二开关晶体管M2和第七开关晶体管M7导通，其它开关晶体管截止。电容C1第一端的电压仍为Vdata+Vth，第一电压源VDD的电压Vdd通过导通的第七开关晶体管M7提供给驱动晶体管M0的栅极。驱动晶体管M0工作处于饱和状态，根据饱和状态电流特性可知，流过驱动晶体管M0工作电流I满足公式：I＝K(Vgs–Vth)2＝K[(Vdata+Vth)-Vdd-Vth]2＝K(Vdata-Vdd)2，其中K为结构参数，相同结构中此数值相对稳定，可以算作常量。需要注意的是，驱动晶体管M0的第二极与第一极的电压差Vds需要满足Vds<Vgs-Vth，其中Vgs-Vth小于或等于5伏。The first switch transistor M1 , the second switch transistor M2 and the seventh switch transistor M7 are turned on, and the other switch transistors are turned off. The voltage at the first terminal of the capacitor C1 is still Vdata+V th , and the voltage Vdd of the first voltage source VDD is provided to the gate of the driving transistor M0 through the turned-on seventh switching transistor M7. The drive transistor M0 works in a saturated state. According to the current characteristics of the saturated state, the operating current I flowing through the drive transistor M0 satisfies the formula: I=K(V gs –V th ) 2 =K[(Vdata+V th )-Vdd-V th ] 2 =K(Vdata-Vdd) 2 , where K is a structure parameter, which is relatively stable in the same structure and can be regarded as a constant. It should be noted that the voltage difference Vds between the second pole and the first pole of the driving transistor M0 needs to satisfy Vds<Vgs-V th , wherein Vgs-V th is less than or equal to 5 volts.
可以看出流过第一有机发光二极管和第二有机发光二极管的电流已经不受驱动晶体管的阈值电压影响，仅与数据信号和第一电源电压端有关，彻底解决了驱动晶体管由于工艺制程以及长时间操作造成的阈值电压漂移对发光二极管的工作电流Ioled的影响，改善面板显示不均匀性。It can be seen that the current flowing through the first organic light-emitting diode and the second organic light-emitting diode is not affected by the threshold voltage of the driving transistor, but only related to the data signal and the first power supply voltage terminal, which completely solves the problem of the driving transistor due to the process and long-term The influence of the threshold voltage drift caused by the time operation on the operating current I oled of the light-emitting diode improves the display unevenness of the panel.
基于同一发明构思，本发明实施例还提供了一种显示面板，包括本发明实施例提供的上述任一种阵列基板。该有机发光显示面板可以是电脑、手机、电视、笔记本、一体机等的显示面板，对于显示面板的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本发明的限制。Based on the same inventive concept, an embodiment of the present invention further provides a display panel, including any one of the above-mentioned array substrates provided by the embodiments of the present invention. The organic light-emitting display panel can be a display panel of a computer, mobile phone, television, notebook, all-in-one machine, etc. Other essential components of the display panel should be understood by those of ordinary skill in the art, and will not be described here. Repeated description should not be taken as a limitation of the present invention.
基于同一发明构思，本发明实施例还提供了一种上述显示面板的驱动方法，在显示每一帧画面时，像素电路驱动与其连接的第一有机发光二极管和第二有机发光二极管交替发光。相当于每种颜色的有机发光二极管的寿命提高了一倍，从而提高显示面板的寿命。Based on the same inventive concept, an embodiment of the present invention also provides a driving method of the above-mentioned display panel. When displaying each frame, the pixel circuit drives the first organic light emitting diode and the second organic light emitting diode connected to it to emit light alternately. This is equivalent to doubling the lifespan of organic light-emitting diodes per color, thereby increasing the lifespan of the display panel.
基于同一发明构思，本发明实施例还提供了另一种上述显示面板的驱动方法，在显示第奇数帧画面时，像素电路驱动与其连接第一有机发光二极管发光；在显示第偶数帧画面时，像素电路驱动与其连接的第二有机发光二极管发光。相当于每种颜色的有机发光二极管的寿命提高了一倍，从而提高显示面板的寿命。Based on the same inventive concept, an embodiment of the present invention also provides another driving method of the above-mentioned display panel. When displaying an odd-numbered frame, the pixel circuit drives the first organic light-emitting diode connected to it to emit light; when displaying an even-numbered frame, The pixel circuit drives the second organic light emitting diode connected thereto to emit light. This is equivalent to doubling the lifespan of organic light-emitting diodes per color, thereby increasing the lifespan of the display panel.
本发明实施例提供的上述阵列基板、显示面板及显示面板的驱动方法，其中阵列基板包括像素和像素电路，像素中设置有至少三种不同颜色的有机发光二极管，由于至少一个像素电路包括第一发光控制模块和第二发光控制模块，同一像素电路的第一发光控制模块和第二发光控制模块分别连接两个相同颜色的有机发光二极管。这样采用一个像素电路的第一发光控制模块和第二发光控制模块分别控制相同颜色的两个有机发光二极管，不仅可以减少阵列基板上像素电路的数量，还可以减少数据线的数量，从而可以减小数据线的电容耦合作用。并且，在PPI一定的基础上，减少像素电路和数据线数量还可以起到加宽数据线宽度和增大像素尺寸的作用，进而可以减小数据线上的压降和降低阵列基板的工艺难度。In the above-mentioned array substrate, display panel, and display panel driving method provided by the embodiments of the present invention, the array substrate includes pixels and pixel circuits, and organic light-emitting diodes of at least three different colors are arranged in the pixels. Since at least one pixel circuit includes a first The light emitting control module and the second light emitting control module, the first light emitting control module and the second light emitting control module of the same pixel circuit are respectively connected to two organic light emitting diodes of the same color. In this way, the first light-emitting control module and the second light-emitting control module using one pixel circuit respectively control two organic light-emitting diodes of the same color, which can not only reduce the number of pixel circuits on the array substrate, but also reduce the number of data lines, thereby reducing the number of organic light-emitting diodes. Capacitive coupling of small data lines. Moreover, on the basis of a certain PPI, reducing the number of pixel circuits and data lines can also play a role in widening the width of the data lines and increasing the pixel size, thereby reducing the voltage drop on the data lines and reducing the process difficulty of the array substrate. .
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these modifications and variations.
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| CN109637380A (en) * | 2019-01-28 | 2019-04-16 | 昆山国显光电有限公司 | A kind of display panel and display device |
| CN110226195A (en) * | 2018-11-22 | 2019-09-10 | 京东方科技集团股份有限公司 | Display driver circuit, display device and display methods for the multirow pixel in single-row |
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