CN111199697A - Display device and display method for reducing motion blur - Google Patents
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- 239000004973 liquid crystal related substance Substances 0.000 claims abstract description 44
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- 238000005286 illumination Methods 0.000 description 3
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/3406—Control of illumination source
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/001—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background
- G09G3/003—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background to produce spatial visual effects
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/08—Details of timing specific for flat panels, other than clock recovery
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/06—Adjustment of display parameters
- G09G2320/0626—Adjustment of display parameters for control of overall brightness
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/026—Arrangements or methods related to booting a display
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Abstract
一种降低动态模糊的显示装置及显示方法，该显示装置包含：液晶显示面板、驱动模组、背光模组及处理模组。处理模组接收输入显示资料，以产生输出显示资料，俾使输出显示资料在与输入显示资料相同长度的画面时间内，具有以高于输入画素时脉的输出画素时脉进行资料传送的输出画面资料区间及冗余输出画面资料区间，并根据输出显示资料驱动液晶显示面板产生显示画面。处理模组控制背光模组仅在冗余输出画面资料区间中，液晶显示面板反应完输出画面资料区间对应的输出画面资料后开启。
A display device and a display method for reducing motion blur, the display device comprises: a liquid crystal display panel, a driving module, a backlight module and a processing module. The processing module receives input display data to generate output display data, so that the output display data has an output picture data interval and a redundant output picture data interval in which data is transmitted with an output pixel clock higher than the input pixel clock within a picture time of the same length as the input display data, and drives the liquid crystal display panel to generate a display picture according to the output display data. The processing module controls the backlight module to turn on only in the redundant output picture data interval after the liquid crystal display panel has reflected the output picture data corresponding to the output picture data interval.
Description
Technical Field
The present invention relates to display technologies, and more particularly, to a display device and a display method for reducing motion blur.
Background
A typical lcd is implemented as a hold-type display (lcd), and the screen is updated every 16.67 milliseconds (millisecond) for 60 updates per second (60 hz). The currently displayed picture is stationary until the new picture is updated. However, when tracking the object in the frame, the user's eyes will have the expected position according to the moving speed of the object. However, due to the discontinuous update time of the lcd, the actual position of the object on the screen will be different from the expected position of the brain of the user. The mechanism of human eye persistence and motion compensation causes the brain to continue the process of tracking objects with an integral-like effect, resulting in motion blur.
Therefore, how to design a new display device and a new display method for reducing motion blur to solve the above-mentioned disadvantages is an urgent problem to be solved in the art.
Disclosure of Invention
The present invention provides a display device for reducing motion blur, including: the liquid crystal display device comprises a liquid crystal display panel, a driving module, a backlight module and a processing module. The driving module is electrically coupled to the liquid crystal display panel. The backlight module is configured to generate backlight to the liquid crystal display panel. The processing module is electrically coupled to the backlight module and the driving module, and is configured to receive input display data, wherein the input display data has an input picture data interval for data transmission with an input pixel clock (pixel clock) and an input blank interval after the input picture data interval, corresponding to a picture time between two adjacent vertical synchronization (Vsync) signals. The processing module is configured to generate output display data according to the input display data, so that the output display data has an output frame data interval for data transmission with an output pixel clock greater than the input pixel clock and a redundant output frame data interval after the output frame data interval within the same frame time, and the liquid crystal display panel is driven by the driving module according to the output display data to generate a display frame. The processing module is further configured to control the backlight module to be turned on only in the redundant output frame data interval after the liquid crystal display panel has responded the output frame data corresponding to the output frame data interval.
Another aspect of the present invention is to provide a display method for reducing motion blur, applied to a display device, the display device including a liquid crystal display panel, a driving module electrically coupled to the liquid crystal display panel, a backlight module configured to generate backlight to the liquid crystal display panel, and a processing module electrically coupled to the backlight module and the driving module, the display method including: making the processing module receive input display data, wherein the input display data corresponds to the input frame data interval for data transmission with the input pixel clock and the input blank interval after the input frame data interval in the frame time between two adjacent input vertical synchronous signals; the processing module generates output display data according to the input display data, so that the output display data has an output frame data interval for data transmission with an output pixel clock greater than the input pixel clock and a redundant output frame data interval after the output frame data interval within the same frame time; enabling the processing module to drive the liquid crystal display panel to generate a display image through the driving module according to the output display data; and controlling the backlight module to be turned on only in the redundant output frame data interval by the processing module after the liquid crystal display panel finishes responding to the output frame data corresponding to the output frame data interval.
The display device can transmit the picture data to the liquid crystal display panel in a shorter time through the driving module by improving the output pixel clock, so that the display unit has enough response time to start the backlight module, the problem of insufficient response time of the liquid crystal display panel is solved, and the effect of more consistent vertical direction is achieved by reducing the improvement range of dynamic blurring.
Drawings
FIG. 1 is a block diagram of a display device for reducing motion blur according to an embodiment of the present invention;
FIG. 2 is a timing diagram of input display data and output display data according to an embodiment of the present invention;
FIG. 3 is a timing diagram of input display data and output display data according to another embodiment of the present invention;
FIG. 4 is a flowchart of a display method for reducing motion blur according to an embodiment of the present invention;
FIG. 5A is a schematic view of a backlight module according to an embodiment of the present invention;
FIG. 5B is a schematic view of an LCD panel according to an embodiment of the present invention;
FIG. 5C is a timing diagram of the input display data, the output display data, and the backlight module switch according to an embodiment of the present invention; and
FIG. 6 is a flowchart illustrating a display method for reducing motion blur according to an embodiment of the present invention.
[ notation ] to show
1: display device
100: liquid crystal display panel
101: back light
102: driving module
103: inputting display data
104: backlight module
105: outputting display data
106: processing module
108: storage unit
200. 300, 500: inputting frame data interval
201: the first part
202. 302, 502: inputting a blank interval
203: the second part
204. 304, 504A to 504D: output frame data interval
206. 506: outputting blank interval
306: redundant output frame data interval
208. 308: interval(s)
400: display method
401 to 404: step (ii) of
600: display method
601 to 602: step (ii) of
BZ 1-BZ 4: backlight assembly interval
PZ1 to PZ 4: area of panel
TD: preset time
TFI, TFO: time of picture
Vsync _ in: inputting vertical synchronous signal
Vsync _ out: outputting vertical synchronization signal
Detailed Description
Please refer to fig. 1. FIG. 1 is a block diagram of a display device 1 for reducing motion blur according to an embodiment of the present invention. The display device 1 includes: the liquid crystal display device comprises a liquid crystal display panel 100, a driving module 102, a backlight module 104 and a processing module 106.
In one embodiment, the LCD panel 100 includes a plurality of display units (not shown) arranged in an array.
The driving module 102 is electrically coupled to the liquid crystal display panel 100. In one embodiment, the driving module 102 includes a gate driver and a source driver (not shown). The gate driver is connected to the gates of the transistors in a row of display units of the LCD panel and is responsible for switching on and off the transistors in each row, and the transistors in a whole row are turned on at a time during scanning. When the transistor is turned on, the source driver can transmit the control voltage for controlling brightness, gray scale and color to the pixel of the display unit through the channel formed by the source and drain of the transistor.
The backlight module 104 is configured to generate a backlight 101 to the lcd panel 100 to illuminate the panel, so that a user can view a display image displayed on the lcd panel 100.
In one embodiment, the processing module 106 is a scaler or a timing controller (scaler), but the invention is not limited thereto. The processing module 106 is electrically coupled to the backlight module 104 and the driving module 102, and is configured to receive the input display data 103 and generate output display data 105 according to the input display data 103. The processing module 106 can drive the LCD panel 100 to generate a display image through the driving module 102 according to the output display data 105. Furthermore, the processing module 106 can cooperate with the output display data 105 to control the backlight module 104 to generate the backlight 101 to illuminate the liquid crystal display panel 100, so as to achieve the purpose of providing the display picture for the user to watch.
The mechanism of the processing module 106 for generating the output display data 105 and the mechanism of the backlight module 104 will be described in more detail below.
Please refer to fig. 2. FIG. 2 is a timing diagram of the input display data 103 and the output display data 105 according to an embodiment of the present invention.
As shown in FIG. 2, the input display data 103 has a plurality of input vertical synchronization signals Vsync _ in, and each two adjacent input vertical synchronization signals Vsync _ in correspond to data of a display frame.
The input display data 103 has an input frame data interval 200 for data transmission with an input pixel clock (pixel clock) and an input blank interval 202 after the input frame data interval 200 within a frame time TFI between two adjacent input vertical synchronization signals Vsync _ in.
In one embodiment, the input frame data interval 200 is used to transmit actual frame data, and the input blank interval 202 is not used to transmit frame data. In one embodiment, the input frame data interval 200 is used to transmit frame data with an input pixel clock. Taking the horizontal and vertical screen data amount of 2000 × 1127 (screen size of 1920 × 1080) and the screen refresh rate of 90 hz as an example, the input pixel clock would be 2000 × 1127 × 90 to 202.86 MHz (MHz). And the length of the input blanking interval 202 is approximately 0.46 milliseconds.
Similarly, the output display data 105 has a plurality of output vertical synchronization signals Vsync _ out, and each two adjacent output vertical synchronization signals Vsync _ out correspond to data of a display frame. In this embodiment, the time length of the frame time TFO between two adjacent output vertical synchronization signals Vsync _ out is the same as the time length of the frame time TFI.
The output display data 105 has an output frame data section 204 for data transmission at an output pixel clock greater than the input pixel clock and an output blank section 206 following the output frame data section 204 within the frame time TFO.
Similarly, the output frame data section 204 is used to transmit actual frame data, and the output blank section 206 is not used to transmit frame data. Since the output pixel clock is greater than the input pixel clock, the output frame data segment 204 can transmit the frame data amount corresponding to the input frame data segment 200 in a shorter time. In contrast, the output blank interval 206 will thus be longer than the input blank interval 202.
Taking the example of raising the output pixel clock to 596.88 MHz, when the frame refresh rate is maintained at the same 90 Hz, the frame data amount of 2000 × 3316 in the horizontal direction and the vertical direction can be transmitted (2000 × 3316 × 90 is 596.88 MHz). However, since the frame size is still 1920 × 1080, the output frame data interval 204 can be greatly reduced to about 1/3 times the input frame data interval 200. In contrast, the length of the output blanking interval 206 may be elongated to about 7.49 milliseconds.
In one embodiment, the frame time TFO in the output display data 105 is delayed by a predetermined time TD from the corresponding frame time TFI in the input display data 103 in order to prevent the frame data from being lost. In other words, the output vertical synchronization signal Vsync _ out corresponding to each picture time TFO is delayed by the predetermined time TD from the input vertical synchronization signal Vsync _ in corresponding to the picture time TFI.
At this time, the input frame data corresponding to the input frame data interval 200 includes a first portion 201 and a second portion 203. The processing module 106 can temporarily store the first portion 201 by the storage unit 108, and access the storage unit 108 to output the first portion 201 and directly output the second portion 203 as the output frame data in the output frame data section 204.
Therefore, the processing module 106 is further configured to control the backlight module 104 to be turned on only in the output blank interval 206 after the liquid crystal display panel 100 has responded the output frame data corresponding to the output frame data interval 204. In fig. 2, the time period when the backlight module 104 is turned on is shown as the interval 208.
More specifically, by turning off the backlight module 104, the display device 1 can achieve the effect of inserting black frames between the display frames, i.e. inserting black backlight, so that the frame persistence time viewed by human eyes is reduced, and the effect of motion blur is further reduced. However, the liquid crystal display panel 100 does not have a fast response speed, and it takes 4-6 ms or more than 10 ms to complete the response. If the backlight module 104 is turned on too early, the response time of the display unit on the lcd panel 100 updated later according to the frame data is insufficient, which results in inconsistent improvement effect of the motion blur in the vertical direction.
Therefore, the display device 1 of the present invention can transmit the frame data to the liquid crystal display panel 100 through the driving module 102 in a shorter time by increasing the output pixel clock, so that the display unit has a sufficient response time. The backlight module 104 can be turned on in the interval 208 after the liquid crystal display panel 100 has responded the output frame data corresponding to the output frame data interval 204, so as to solve the problem of insufficient response time of the liquid crystal display panel 100.
It should be noted that the predetermined time TD for performing the delay and the size of the first portion 201 required to be stored in the storage unit 108 can be determined according to the magnitude relationship between the output pixel clock and the input pixel clock and the response time of the lcd panel 100. The backlight 101 generated by the backlight module 104 may be a strobe backlight (strobe backlight), and the backlight module 104 determines the illumination brightness according to the time length of the backlight module 104. For example, when the backlight module 104 is turned on for a short time, the illumination brightness can be increased to avoid the over-dark brightness of the lcd panel 100.
Please refer to fig. 3. FIG. 3 is a timing diagram of the input display data 103 and the output display data 105 according to another embodiment of the present invention.
As shown in FIG. 3, the input display data 103 has a plurality of input vertical synchronization signals Vsync _ in, and each two adjacent input vertical synchronization signals Vsync _ in correspond to data of a display frame.
The input display data 103 has an input frame data interval 300 transmitted at an input pixel clock and an input blank interval 302 after the input frame data interval 300 within a frame time TFI between two adjacent input vertical synchronization signals Vsync _ in.
In one embodiment, the input frame data interval 300 is used to transmit actual frame data, and the input blank interval 302 is not used to transmit frame data.
Similarly, the output display data 105 has a plurality of output vertical synchronization signals Vsync _ out. In the present embodiment, the output display data 105 is divided into two sub-frame times by three output vertical synchronization signals Vsync _ out in the frame time TFO with the same time length as the frame time TFI. Wherein the first sub-frame time is the output frame data interval 304, and the second sub-frame time is the redundant output frame data interval 306. In another embodiment, the frame time for outputting the display data is divided into N-1 sub-frame times by N output vertical synchronization signals Vsync _ out, wherein N is an integer greater than or equal to 3. In addition, the output frame data interval 304 corresponds to a first sub-frame time, and the redundant output frame data interval 306 corresponds to at least one sub-frame time after the first sub-frame time.
In one embodiment, the frame time TFO in the output display data 105 is delayed by a predetermined time TD from the corresponding frame time TFI in the input display data 103 in order to prevent the frame data from being lost. In other words, the output vertical synchronization signals Vsync _ out corresponding to both ends of each screen time TFO will be delayed by the predetermined time TD from the input vertical synchronization signals Vsync _ in corresponding to the screen time TFI.
At this time, the input frame data interval 300 corresponds to the input frame data. The processing module 106 can temporarily store all the input frame data via the storage unit 108, and transmit the input frame data as the output frame data in the output frame data region 304 by partially accessing the storage unit 108 and partially outputting the input frame data directly with an output pixel clock greater than the input pixel clock. Further, the processing module 106 accesses the storage unit 108 in the redundant output frame data interval 306, and transmits the data at the output pixel clock greater than the input pixel clock to output the input frame data as the redundant output frame data.
Therefore, the processing module 106 is further configured to control the backlight module 104 to be turned on only in the redundant output frame data interval 306 after the liquid crystal display panel 100 has responded the output frame data corresponding to the output frame data interval 304. In fig. 3, the time period when the backlight module 104 is turned on is shown as the interval 308.
More specifically, by turning off the backlight module 104, the display device 1 can achieve the effect of inserting black frames between the display frames, so that the frame persistence time viewed by human eyes is reduced, and the effect of motion blur is further reduced. However, the liquid crystal display panel 100 does not have a fast response speed, and it takes 4-6 ms or more than 10 ms to complete the response. If the backlight module 104 is turned on too early, the response time of the display unit on the lcd panel 100 updated later according to the frame data is insufficient, which may lead to inconsistent improvement of the motion blur.
Therefore, the display device 1 of the present invention can transmit the frame data to the liquid crystal display panel 100 through the driving module 102 in a shorter time by increasing the output pixel clock, and make the frame rate of the output display data 105 be 2 times or more than 2 times of the frame rate of the input display data 103 in a manner of repeating the frame playback, but have the same equivalent frame rate. The display unit will have sufficient reaction time due to the picture content repetition. The backlight module 104 can be turned on in the interval 308 after the liquid crystal display panel 100 has responded the output frame data corresponding to the output frame data interval 304, that is, the backlight is turned on only in the last image of the repeated image, so as to solve the problem of insufficient response time of the liquid crystal display panel 100.
It should be noted that the predetermined time TD for performing the delay can be determined according to the magnitude relationship between the output pixel clock and the input pixel clock and the response time of the lcd panel 100. In addition, the above embodiment is exemplified by playing the output picture data 2 times, and in other embodiments, when the output pixel clock is more than the input pixel clock, the effect of playing the output picture data with higher magnification can be achieved.
Please refer to fig. 4. FIG. 4 is a flowchart of a display method 400 for reducing motion blur according to an embodiment of the present invention. The display method 400 can be applied to the display device 1 of fig. 1. The display method 400 comprises the following steps (it should be understood that the steps mentioned in this embodiment, except for the sequence specifically mentioned, can be performed simultaneously or partially simultaneously according to the actual requirement.
In step 401, the processing module 106 receives the input display data 103, wherein the input display data 103 has an input frame data interval 200 transmitted at the input pixel clock and an input blank interval 202 after the input frame data interval 200 within the frame time TFI between two adjacent input vertical synchronization signals Vsync _ in.
In step 402, the processing module 106 generates the output display data 105 according to the input display data 103, such that the output display data 105 has an output frame data interval transmitted at an output pixel clock greater than the input pixel clock and an output blank interval 206 or a redundant output frame data interval 306 following the output frame data interval within the same frame time TFO.
In one embodiment, the processing module 106 can generate the output frame data section 204 and the output blank section 206 without transmitting the frame data after the output frame data section 204 by the method shown in FIG. 2. In another embodiment, the processing module 106 can generate the output frame data interval 304 and the redundant output frame data interval 306 for transmitting the redundant frame data after the output frame data interval 304 in the manner shown in FIG. 3.
In step 403, the processing module 106 drives the liquid crystal display panel 100 through the driving module 102 to generate a display screen according to the output display data 105.
In step 404, the processing module 106 controls the backlight module 104 to turn on only in the output blank interval 206 or the redundant output frame data interval 306 after the liquid crystal display panel 100 has responded the output frame data corresponding to the output frame data interval (the output frame data interval 204 of fig. 2 or the output frame data interval 304 of fig. 3).
Please refer to fig. 5A, fig. 5B and fig. 5C. Fig. 5A is a schematic view of the backlight module 104 according to an embodiment of the invention. Fig. 5B is a schematic diagram of the lcd panel 100 according to an embodiment of the invention. FIG. 5C is a timing diagram of the input display data 103, the output display data 105, and the backlight module 104 according to an embodiment of the present invention.
As shown in fig. 5A and 5B, the backlight module 104 is divided into a plurality of backlight module zones BZ1, BZ2, BZ3 and BZ4, and the liquid crystal display panel 100 is divided into panel zones PZ1, PZ2, PZ3 and PZ 4. The backlight assembly may be a Light Emitting Diode (LED) or a Cold Cathode Fluorescent Lamp (CCFL) and is divided into a plurality of backlight assembly zones BZ1, BZ2, BZ3 and BZ4, which is not limited in the invention. In one embodiment, the size of the lcd panel 100 is substantially the same as that of the backlight module 104, and the backlight module zones BZ1, BZ2, BZ3 and BZ4 respectively generate backlight to the corresponding panel zones PZ1, PZ2, PZ3 and PZ 4.
As shown in FIG. 5C, the input display data 103 has a plurality of input vertical synchronization signals Vsync _ in, and each two adjacent input vertical synchronization signals Vsync _ in correspond to data of a display frame.
The input display data 103 has an input frame data interval 500 transmitted at an input pixel clock and an input blank interval 502 after the input frame data interval 500 within a frame time TFI between two adjacent input vertical synchronization signals Vsync _ in.
In one embodiment, the input frame data interval 500 is used to transmit actual frame data. The input blank interval 502 does not transmit the frame data.
Similarly, the output display data 105 has a plurality of output frame data intervals 504A, 504B, 504C and 504D transmitted at the output pixel clock and an input blank interval 506 following the output frame data intervals 504A to 504D within the frame time TFO between two adjacent output vertical synchronization signals Vsync _ out.
In this embodiment, the output pixel clock is equal to the input pixel clock, and there is no delay between the frame time TFO of the output display data 105 and the frame time TFI corresponding to the input display data 103. Therefore, the total time length of the output frame data intervals 504A to 504D is substantially the same as the input frame data interval 500. Wherein, the output frame data sections 504A-504D respectively transmit the input frame data corresponding to one of the panel areas PZ1, PZ2, PZ3 and PZ4 in sequence. The input blank interval 502 does not transmit the frame data.
The processing module 106 is configured to control the backlight module zones BZ1, BZ2, BZ3 and BZ4 to be turned on after the corresponding panel zones PZ1, PZ2, PZ3 and PZ4 respectively reflect the output frame data, so as to generate backlight to the panel zones PZ1, PZ2, PZ3 and PZ 4.
In FIG. 5C, the timing of turning on the backlight module zones BZ1, BZ2, BZ3 and BZ4 of the backlight module 104 is shown. In the present embodiment, the backlight unit zone BZ1 is turned on at a time corresponding to the output frame data zone 504D to illuminate the panel zone PZ 1.
Therefore, the display cells in the area have a response time corresponding to the length of the frame data sections 504B and 504C relative to the panel area PZ 1. When the illumination panel zones PZ2 to PZ3 are turned on in the subsequent backlight module zones BZ2 to BZ3, the display units in these zones will have the same length of response time.
In one embodiment, the time for turning on the backlight module zones BZ1, BZ2, BZ3 and BZ4 is equivalent to the time for outputting the frame data zones 504A to 504D, so that each panel zone PZ2 to PZ3 can have an average response time and brightness.
Therefore, the display device 1 of the present invention can control the on-time of the backlight module 104 by partitions without changing the pixel clock and the frame refresh rate of the output display data 105 relative to the input display data 103, so as to achieve the effect that the display unit has sufficient response time and solve the problem of insufficient response time of the liquid crystal display panel 100.
Please refer to fig. 6. FIG. 6 is a flowchart of a display method 600 for reducing motion blur according to an embodiment of the present invention. The display method 600 can be applied to the display device 1 of fig. 1 and fig. 5A, 5B, and 5C. The display method 600 comprises the following steps (it should be understood that the steps mentioned in this embodiment, except for the specific sequence mentioned above, can be performed simultaneously or partially simultaneously according to the actual requirement.
In step 601, the processing module 106 receives the input display data 103 to generate the output display data 105, and drives the lcd panel 100 through the driving module 102 to generate a display image according to the output display data 105, wherein the output display data 105 has a plurality of output image data intervals 504A to 504D corresponding to the image time TFO between two adjacent output vertical synchronization signals Vsync _ out, and sequentially transmits the output image data corresponding to one of the panel regions.
In step 602, the processing module 106 controls the backlight module zones BZ1, BZ2, BZ3 and BZ4 to turn on after the corresponding panel zones PZ1, PZ2, PZ3 and PZ4 respectively reflect the output frame data, so as to generate backlight to the panel zones PZ1, PZ2, PZ3 and PZ 4.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit of the present invention are intended to be included within the scope of the present invention.
Claims (10)
1. A display device for reducing motion blur, comprising:
a liquid crystal display panel;
a driving module electrically coupled to the LCD panel;
a backlight module configured to generate a backlight to the liquid crystal display panel; and
a processing module electrically coupled to the backlight module and the driving module and configured to receive an input display data, wherein the input display data has an input frame data interval transmitted by an input pixel clock (pixel clock) and an input blank interval behind the input frame data interval in a frame time between two adjacent vertical synchronization (Vsync) signals;
wherein the processing module is configured to generate an output display data according to the input display data, so that the output display data has an output frame data interval transmitted at an output pixel clock greater than the input pixel clock and a redundant output frame data interval after the output frame data interval within the frame time of the same length, and drive the liquid crystal display panel to generate a display frame through the driving module according to the output display data;
the processing module is further configured to control the backlight module to be turned on only in the redundant output frame data interval after the liquid crystal display panel has responded an output frame data corresponding to the output frame data interval.
2. The display apparatus according to claim 1, wherein the frame time of the output display data is delayed by a predetermined time compared to the frame time corresponding to the input display data.
3. The display apparatus according to claim 2, wherein the frame time of the output display data is divided into N-1 subpicture times by N output vertical synchronization signals, and the output frame data interval corresponds to a first one of the subpicture times, and the redundant output frame data interval corresponds to at least one of the subpicture times after the first one of the subpicture times;
wherein the input frame data interval corresponds to an input frame data, the processing module further comprises a storage unit configured to temporarily store the input frame data, to output the input frame data as the output frame data in the output frame data interval, and to access the storage unit at each sub-frame time after the first sub-frame time to again output the input frame data as a redundant output frame data.
4. The display apparatus according to claim 3, wherein a frame rate of the output display data is 2 times or an integer multiple of more than 2 times the frame rate of the input display data.
5. The display device according to claim 1, wherein the processing module is a scaler or a timing controller.
6. A display method for reducing motion blur is applied to a display device, the display device comprises a liquid crystal display panel, a driving module electrically coupled to the liquid crystal display panel, a backlight module configured to generate a backlight to the liquid crystal display panel, and a processing module electrically coupled to the backlight module and the driving module, the display method comprises:
enabling the processing module to receive an input display data, wherein the input display data corresponds to an input frame data interval transmitted by an input pixel clock and an input blank interval behind the input frame data interval in a frame time between two adjacent input vertical synchronous signals;
enabling the processing module to generate an output display data according to the input display data, so that the output display data has an output frame data interval transmitted at an output pixel clock pulse greater than the input pixel clock pulse and a redundant output frame data interval after the output frame data interval within the same frame time;
enabling the processing module to drive the liquid crystal display panel to generate a display image through the driving module according to the output display data; and
the processing module controls the backlight module to be turned on only in the output blank interval after the liquid crystal display panel has responded an output frame data corresponding to the output frame data interval.
7. The display method as claimed in claim 6, wherein the frame time of the output display data is delayed by a predetermined time compared to the frame time corresponding to the input display data.
8. The display method of claim 6, wherein the frame time of the output display data is divided into N-1 subpicture times by N output vertical synchronization signals, and the output frame data interval corresponds to a first one of the subpicture times, the redundant output frame data interval corresponds to at least one of the subpicture times after the first one of the subpicture times, wherein the input frame data interval corresponds to an input frame data, the display method further comprising:
making a storage unit included in the processing module temporarily store the input frame data;
outputting the input frame data as the output frame data in the output frame data interval; and
accessing the storage unit to output the input frame data again as a redundant output frame data at each sub-frame time after the first sub-frame time.
9. The display method of claim 8, wherein a frame rate of the output display data is 2 times or an integer multiple of 2 times greater than the frame rate of the input display data.
10. The display method according to claim 6, wherein the processing module is a scaler or a timing controller.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113825003A (en) * | 2020-06-18 | 2021-12-21 | 杜尔利塔斯有限公司 | Frame rate synchronization |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1737652A (en) * | 2004-08-20 | 2006-02-22 | 三星电子株式会社 | Liquid Crystal Display And Method For Driving |
| CN101004501A (en) * | 2006-01-24 | 2007-07-25 | 友达光电股份有限公司 | Liquid crystal display device, operation method and timing control device thereof |
| JP2008268968A (en) * | 2004-08-10 | 2008-11-06 | Sony Corp | Display device and method thereof |
| TW200901120A (en) * | 2007-06-25 | 2009-01-01 | Ind Tech Res Inst | A driving method for a backlight of an LCD |
| CN101441856A (en) * | 2008-12-26 | 2009-05-27 | 友达光电股份有限公司 | Backlight module and method for controlling brightness of backlight module |
| CN102473394A (en) * | 2009-08-07 | 2012-05-23 | 夏普株式会社 | Liquid crystal display device |
| CN102985962A (en) * | 2010-10-07 | 2013-03-20 | 禾鈶股份有限公司 | Improved pixel circuit and display system comprising same |
-
2018
- 2018-11-16 CN CN201811367631.1A patent/CN111199697B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008268968A (en) * | 2004-08-10 | 2008-11-06 | Sony Corp | Display device and method thereof |
| CN1737652A (en) * | 2004-08-20 | 2006-02-22 | 三星电子株式会社 | Liquid Crystal Display And Method For Driving |
| CN101004501A (en) * | 2006-01-24 | 2007-07-25 | 友达光电股份有限公司 | Liquid crystal display device, operation method and timing control device thereof |
| TW200901120A (en) * | 2007-06-25 | 2009-01-01 | Ind Tech Res Inst | A driving method for a backlight of an LCD |
| CN101441856A (en) * | 2008-12-26 | 2009-05-27 | 友达光电股份有限公司 | Backlight module and method for controlling brightness of backlight module |
| CN102473394A (en) * | 2009-08-07 | 2012-05-23 | 夏普株式会社 | Liquid crystal display device |
| CN102985962A (en) * | 2010-10-07 | 2013-03-20 | 禾鈶股份有限公司 | Improved pixel circuit and display system comprising same |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113825003A (en) * | 2020-06-18 | 2021-12-21 | 杜尔利塔斯有限公司 | Frame rate synchronization |
| EP3926964A1 (en) * | 2020-06-18 | 2021-12-22 | Dualitas Ltd. | Frame rate synchronization |
| GB2596111A (en) * | 2020-06-18 | 2021-12-22 | Dualitas Ltd | Frame rate synchronization |
| KR20210156739A (en) * | 2020-06-18 | 2021-12-27 | 듀얼리타스 리미티드 | Frame rate synchronization |
| KR102495291B1 (en) * | 2020-06-18 | 2023-02-06 | 듀얼리타스 리미티드 | Frame rate synchronization |
| GB2596111B (en) * | 2020-06-18 | 2023-03-22 | Dualitas Ltd | Frame rate synchronization |
| US11758075B2 (en) | 2020-06-18 | 2023-09-12 | Dualitas Ltd | Frame rate synchronization |
| CN113825003B (en) * | 2020-06-18 | 2024-02-13 | 杜尔利塔斯有限公司 | Display system, display and method for displaying video stream of received frame with synchronous frame rate |
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|---|---|
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