CN110993657B - Display panel, device and preparation method of display panel - Google Patents

Abstract

Embodiments of the present invention relate to the field of display technology and disclose a display panel, a device and a method for preparing a display panel. The display panel includes a substrate, a functional layer, a first dielectric layer, a barrier film and an interlayer dielectric film that are stacked in sequence. The etching rate of the film under the first etching condition is less than the etching rate of the interlayer dielectric film, the etching rate of the functional layer under the first etching condition is less than the etching rate of the first dielectric layer, and the barrier film is under the second etching condition. The etching rate under etching conditions is greater than the etching rate of the first dielectric layer; the first through hole extends from the interlayer dielectric film to the functional layer, and the first through hole penetrates the interlayer dielectric film and the barrier film ; The second through hole extends from the interlayer dielectric film to the barrier film, and the second through hole penetrates the interlayer dielectric film; the first metal film, the first metal film is disposed in the second through hole. The display panel, device and display panel preparation method provided by the present invention can ensure that the display panel has a uniform capacitance value.

Description

Display panel, device and preparation method of display panel

Technical field

Embodiments of the present invention relate to the field of display technology, and in particular to a display panel, a device, and a method for manufacturing a display panel.

Background technique

AMOLED (Active Matrix Organic Light Emitting Diode Display, active matrix driven organic light emitting diode display device) has the advantages of low manufacturing cost, high response speed, power saving, can be used for DC drive of portable devices, wide operating temperature range, etc., so it can It is expected to become the next generation of new flat panel display to replace LCD (Liquid Crystal Display, liquid crystal display). In particular, flexible AMOLED is attracting more and more attention from the market because of its advantages of being thin, light, bendable or foldable, and able to change its shape at will. For AMOLED, a capacitor is usually required to keep the screen lit. With the increase in display PPI requirements and the reduction in refresh frequency requirements, display panels are required to have uniform capacitance values.

The quality of display panels produced with existing technologies needs to be improved.

Contents of the invention

The purpose of the embodiments of the present invention is to provide a display panel, a device and a method for manufacturing a display panel, which can ensure that the display panel has a uniform capacitance value.

In order to solve the above technical problems, embodiments of the present invention provide a display panel, including:

The substrate, the functional layer, the first dielectric layer, the barrier film and the interlayer dielectric film are stacked, and the etching rate of the barrier film under the first etching condition is less than the etching rate of the interlayer dielectric film, the The etching rate of the functional layer under the first etching condition is less than the etching rate of the first dielectric layer, and the etching rate of the barrier film under the second etching condition is greater than the etching rate of the first dielectric layer. Etching rate; a first through hole, the first through hole extends from the interlayer dielectric film to the functional layer, and the first through hole penetrates the interlayer dielectric film and the barrier film; Two through holes, the second through hole extends from the interlayer dielectric film to the barrier film, and the second through hole penetrates the interlayer dielectric film; a first metal film, the first metal film disposed in the second through hole.

In addition, the first dielectric layer includes a gate insulating film and a capacitive dielectric film located on a side of the gate insulating film away from the functional layer, and the barrier film is disposed between the capacitive dielectric film and the interlayer dielectric film. time, the etching rate of the barrier film under the second etching condition is greater than the etching rate of the capacitive dielectric film. In this way, the capacitance of the display panel can be increased and the performance of the capacitor structure can be improved.

In addition, the display panel further includes a second metal film, the second metal film and the capacitive dielectric film are arranged in the same layer, and part of the capacitive dielectric film is arranged between the first metal film and the second metal film. Between the films, the orthographic projection of the second metal film on the substrate overlaps with the orthographic projection of the first metal film on the substrate.

In addition, it also includes a second dielectric layer disposed between the substrate and the functional layer, and the orthographic projection of the functional layer on the substrate is located within the orthographic projection of the second dielectric layer on the substrate. , and the orthographic projection of the second through hole on the substrate and the orthographic projection of the functional layer on the substrate are independent of each other. With this arrangement, the structure of the functional layer will not be damaged during the formation of the second through hole, thereby improving the reliability of the functional layer.

Correspondingly, embodiments of the present invention also provide a display device, including the above-mentioned display panel

Correspondingly, embodiments of the present invention also provide a method for preparing a display panel, which includes: providing a substrate; forming a stacked functional layer, a first dielectric layer, a barrier film and an interlayer dielectric film on the substrate, so that The etching rate of the barrier film under the first etching condition is less than the etching rate of the interlayer dielectric film, and the etching rate of the functional layer under the first etching condition is less than the first dielectric layer. The etching rate of the barrier film under the second etching condition is greater than the etching rate of the first dielectric layer; for the interlayer dielectric film facing the functional layer and the The first dielectric layer undergoes an initial etching process until it penetrates the barrier film to form a first pre-via hole; the bottom of the first pre-via hole is etched to form a first pre-via hole extending from the interlayer dielectric film. a first through hole to the functional layer; performing the etching process on the unetched capacitor area of the interlayer dielectric film and the barrier film to form a first through hole extending from the interlayer dielectric film to the a second through hole of the barrier film; forming a metal layer within the second through hole.

In addition, before performing an initial etching process on the interlayer dielectric film and the barrier film facing the functional layer, it also includes: forming a patterned mask layer on the interlayer dielectric film, so that There are first grooves and second grooves in the mask layer, the depth of the first groove is less than the thickness of the mask layer, the second groove penetrates the mask layer; the pair of The interlayer dielectric film and the barrier film facing the functional layer are initially etched until the barrier film is penetrated to form a first pre-via hole, which specifically includes: using the mask layer as a mask film, perform an initial etching process on the interlayer dielectric film and the barrier film along the second groove to form a first pre-via hole penetrating the barrier film.

In addition, after forming the first pre-via hole penetrating the barrier film and before etching the bottom of the first pre-via hole, the method further includes: thinning the mask layer so that The first groove penetrates the mask layer; the process steps of forming the first through hole and the second through hole include: using the mask layer as a mask, etching along the first groove Etch the interlayer dielectric film to expose the barrier film to form the second through hole, and simultaneously etch the bottom of the first pre-via hole to expose the functional layer to form the first through hole. hole.

In addition, the thinning process of the mask layer to make the first groove penetrate the mask layer specifically includes: in the process of forming the first pre-via hole or in the process of forming the third After forming a pre-via hole, an ashing process is used to perform the thinning process on the mask layer, and the material of the mask layer is photoresist.

In addition, the initial etching process specifically includes: using the mask layer as a mask, etching the interlayer dielectric film along the second groove with a first etching process until the barrier film is exposed. ; Use a second etching process to etch the barrier film until the barrier film is penetrated.

Compared with the existing technology, the technical solution provided by the embodiment of the present invention has the following advantages:

Since under the first etching condition, the etching rate of the functional layer is lower than the etching rate of the first dielectric layer, that is to say, the functional layer has a higher etching selectivity ratio compared to the first dielectric layer, so that The etching stops at the functional layer, and then forms a first through hole extending from the interlayer dielectric film to the functional layer and penetrating the interlayer dielectric film and the barrier film; a barrier film is provided between the functional layer and the interlayer dielectric film. Under the first etching condition, the etching rate of the barrier film is lower than the etching rate of the interlayer dielectric film. That is to say, compared to the interlayer dielectric film, the barrier film has a higher etching selectivity ratio, so that it can be etched during etching. When forming an interlayer dielectric film, a second through hole extending from the interlayer dielectric film to the barrier film and penetrating the interlayer dielectric film is formed. Through the arrangement of the above structure, the problem of "not between the functional layer and the interlayer dielectric film" is effectively avoided. Setting a barrier film cannot guarantee the etching amount when etching the second through hole, so that the etching of the second through hole cannot effectively stay at a fixed depth. This situation causes the interlayer dielectric film to be etched to form the third through hole. When there are two through holes, the barrier film can block the continuation of etching, so that the second through hole has a fixed depth, ensuring the uniformity of the thickness of the first metal film disposed in the second through hole, that is, ensuring Uniformity of capacitance values.

Description of drawings

One or more embodiments are exemplified by the pictures in the corresponding drawings. These illustrative illustrations do not constitute limitations to the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements. Unless otherwise stated, the figures in the drawings are not intended to be limited to scale.

Figure 1 is a schematic structural diagram of a display panel according to a first embodiment of the present invention;

Figure 2 is a flow chart of a method for manufacturing a display panel according to a third embodiment of the present invention;

Figure 3 is a flow chart of a method for manufacturing a display panel according to a fourth embodiment of the present invention;

FIG. 4 is a schematic structural diagram of a forming process of a display panel according to a fourth embodiment of the present invention.

Detailed ways

In order to make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, each implementation mode of the present invention will be described in detail below with reference to the accompanying drawings. However, those of ordinary skill in the art will understand that in each embodiment of the present invention, many technical details are provided to enable readers to better understand the present invention. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solution claimed by the present invention can also be implemented.

The first embodiment of the present invention relates to a display panel 100. The specific structure is shown in Figure 1 and includes:

The substrate 1, the functional layer 2, the first dielectric layer 3, the barrier film 301 and the interlayer dielectric film 4 are stacked in sequence. The etching rate of the barrier film 301 under the first etching condition is smaller than the etching rate of the interlayer dielectric film 4. rate, the etching rate of the functional layer 2 under the first etching condition is less than the etching rate of the first dielectric layer 3 , and the etching rate of the barrier film 301 under the second etching condition is greater than the etching rate of the first dielectric layer 3 speed; the first through hole 10, the first through hole 10 extends from the interlayer dielectric film 4 to the functional layer 2, and the first through hole 10 penetrates the interlayer dielectric film 4 and the barrier film 301; the second through hole 20, the second The through hole 20 extends from the interlayer dielectric film 4 to the barrier film 301 , and the second through hole 20 penetrates the interlayer dielectric film 4 ; the first metal film 5 , and the first metal film 5 is disposed in the second through hole 20 .

Specifically, the substrate 1 can be a glass substrate, CPI (transparent polyimide), PI (polyimide), PET (high temperature polyester), PEN (polyethylene naphthalate), etc., in this embodiment The method does not specifically limit the material of the substrate 1, and different materials can be selected to make the substrate 1 according to actual needs.

In practical applications, the display panel 100 can be used for a full screen, in which the first through hole 10 can be provided in the array area, the second through hole 20 can be provided in the bending area, and the bending area is arranged around the array area, so that The bending area provided around the array area can be bent in the opposite direction of the display surface to form a full screen. Moreover, since the functional layer 2 is not provided in the bending area, in the process of forming the second through hole 20, The structure of functional layer 2 will not be damaged.

It can be understood that the display panel 100 can also be used for a flexible display screen. Both the first through hole 10 and the second through hole 20 can be provided in the array area, and the second through hole is provided in the first dielectric layer 3 that is not functional. The area covered by layer 2 enables the flexible display screen to perform flexible displays such as curling and folding while ensuring the reliability of functional layer 2.

It is worth mentioning that the first etching condition in this embodiment may be to use carbon tetrafluoride and oxygen as etching gases to etch the interlayer dielectric film 4 and the first dielectric layer 3; the second etching condition is The condition may be to use chlorine gas as the etching gas to etch the barrier film 301 .

Compared with the prior art, the embodiment of the present invention is that under the first etching condition, the etching rate of the functional layer 2 is smaller than the etching rate of the first dielectric layer 3 , that is to say, relative to the first dielectric layer 3 , the functional layer 2 has a higher etching selectivity ratio, so that the etching can stay on the functional layer 2, and then form a layer extending from the interlayer dielectric film 4 to the functional layer 2 and penetrating the interlayer dielectric film 4 and the barrier film 301. First through hole 10; a barrier film 301 is provided between the functional layer 2 and the interlayer dielectric film 4. Since under the first etching condition, the etching rate of the barrier film 301 is less than the etching rate of the interlayer dielectric film 4, That is to say, relative to the interlayer dielectric film 4 , the barrier film 301 has a higher etching selectivity ratio, so that when the interlayer dielectric film 4 is etched, it is possible to form a film extending from the interlayer dielectric film 4 to the barrier film 301 , and The second through hole penetrating the interlayer dielectric film 4, through the arrangement of the above structure, effectively avoids the problem that "without setting the barrier film 301 between the functional layer 2 and the interlayer dielectric film 4, it is impossible to ensure that the second through hole 20 is etched" The etching amount, so that the etching of the second via hole 20 cannot effectively stay at a fixed depth occurs, so that when the interlayer dielectric film 4 is etched to form the second via hole 20, the barrier film 301 can block The etching continues, so that the second through hole 20 has a fixed depth, ensuring the uniformity of the thickness of the first metal film 5 disposed in the second through hole 20 , that is, ensuring the capacitance value of the display panel 100 . Uniformity.

The implementation details of the display panel 100 of this embodiment will be described in detail below. The following content is only provided for the convenience of understanding and is not necessary for implementation of this solution.

In this embodiment, as shown in FIG. 1 , the first dielectric layer 3 includes a gate insulating film 31 and a capacitive dielectric film 32 located on the side of the gate insulating film 31 away from the functional layer 2 . The barrier film 301 is disposed between the capacitive dielectric film 32 and the capacitive dielectric film 32 . Between the interlayer dielectric films 4 , the etching rate of the barrier film 301 under the second etching condition is greater than the etching rate of the capacitive dielectric film 32 . Through the arrangement of this structure, the capacitance value of the display panel 100 can be further increased. Specifically, since the etching rate of the barrier film 301 under the second etching condition is greater than the etching rate of the capacitive dielectric film 32 , it indicates that the capacitive dielectric film 32 has a high selectivity ratio, that is, for etching the barrier film 301 The etching rate of the material on the capacitive dielectric film 32 is extremely small. Therefore, the etching can stay on the capacitive dielectric film 32 so that the first dielectric layer 3 and the interlayer dielectric film 4 can be simultaneously etched in the subsequent process to form the first through hole. 10 and the second through hole 20, thereby meeting the requirements for different depths of the first through hole and the second through hole; at the same time, due to the provision of the capacitive dielectric film 32, the capacitance of the display panel 100 can also be increased, and the capacitance structure can be improved. performance.

It can be understood that the material of the gate insulating film 31 can be silicon oxide. The thickness of the gate insulating film 31 ranges from 110 to 130 nanometers, preferably 120 nanometers. The thickness of the gate insulating film 31 needs to meet the sub-threshold swing required by the display panel 100. width (usually about 0.3); the material of the capacitive dielectric film 32 can be silicon nitride. Since the sum of the thickness of the capacitive dielectric film 32 and the thickness of the barrier film 301 determines the pixel capacitance value of the display panel 100, the capacitive dielectric film 32 The thickness of can be set according to actual needs, and this embodiment does not specifically limit this. Specifically, K=d*k1*k2/(k1*d-(k1-k2)*d1), d=d1+d2, where K is the dielectric constant of the entire capacitive medium of the display panel 100, and k1 is the barrier. The dielectric constant of the film 301, d1 is the thickness of the barrier film 301, k2 is the dielectric constant of the gate insulating film 31, d2 is the thickness of the gate insulating film 31, according to the dielectric constant of the device to the entire capacitive medium, it can be calculated Determine the thickness of the barrier film 301. The material of the gate insulating film 31 may be silicon oxide, etc., and the material of the capacitor dielectric film 32 may be silicon nitride, etc.

Specifically, the display panel 100 also includes a second metal film 6 , the second metal film 6 and the capacitive dielectric film 32 are arranged in the same layer, and part of the capacitive dielectric film 32 is arranged between the first metal film 5 and the second metal film 6 , the orthographic projection of the second metal film 6 on the substrate 1 overlaps with the orthographic projection of the first metal film 5 on the substrate 1 . That is to say, the second metal film 6 is disposed on the side of the gate insulating film 31 away from the substrate 1, and the second metal film 6, the capacitive dielectric film 32, the barrier film 301 and the first metal 5 together form the capacitance of the display panel 100. The capacitor dielectric film 32 and the barrier film 301 are the dielectric layers of the capacitor.

It can be understood that the display panel 100 also includes a second dielectric layer 7 disposed between the substrate 1 and the functional layer 2 . In this embodiment, the orthographic projection of the functional layer 2 on the substrate 1 is located between the second dielectric layer 7 and the substrate 1 . within the orthographic projection on the substrate 1, and the orthographic projection of the second through hole 20 on the substrate 1 and the orthographic projection of the functional layer 2 on the substrate 1 are independent of each other. That is to say, the functional layer 2 is a patterned layer with predetermined Assuming the pattern, the functional layer 2 does not completely cover the second dielectric layer 7, and the second through hole 20 is provided in the area of the second dielectric layer 7 that is not covered by the functional layer 2, so that during the process of forming the second through hole 20, no It will destroy the structure of the functional layer 2, thereby not affecting the function of the functional layer 2, and improving the reliability of the functional layer 2. The functional layer 2 can be PSI (active layer), the thickness of the functional layer 2 is 0.1 micron to 0.3 micron, and the first metal film 5 is also provided in the first through hole 10, that is to say, the first through hole is used for connection Functional layer 2 and first metal film 5 . It is worth mentioning that in this embodiment, the functional layer 2 and the gate insulating film 31 are provided in the same layer, and part of the gate insulating film 31 is provided between the functional layer 2 and the second metal film 6 . Through the arrangement of this structure, the gate insulating film 31 can be used as an insulating layer between the second metal film 6 (gate electrode) and the functional layer 2 (active layer), thereby reducing leakage current and improving the stability of the display panel 100 .

In addition, the second dielectric layer 7 is a stacked structure of a silicon oxide layer and a silicon nitride layer. The thickness of the silicon nitride layer is usually 40 to 60 nanometers, preferably 50 nanometers. The thickness of the silicon oxide layer is usually 240 to 250 nanometers. , preferably 250 nanometers. It can be understood that by disposing the second dielectric layer 7 between the substrate 1 and the functional layer 2, external water and oxygen can be isolated from entering the functional layer 2, thereby improving the reliability of the display panel 100. In addition, due to the preparation The functional layer 2 needs to use a laser process. By arranging the second dielectric layer 7 on the substrate 1 and arranging the functional layer 2 on the second dielectric layer 7, damage to the substrate 1 can be avoided when the functional layer 2 is formed, thereby further improving the efficiency. Reliability of the display panel 100 .

It is worth mentioning that the barrier film 301 in this embodiment is made of a high dielectric constant material, which can be an oxide or a nitride. Specifically, the barrier film 301 can be made of a heavy metal oxide, a heavy metal nitride or a heavy metal nitride. Aluminum oxide; preferably, the barrier film 301 is made of zirconium oxide or hafnium oxide. By using the above materials to prepare the barrier film 301, the barrier film 301 can have a high dielectric constant. The dielectric constant is also called permittivity or relative permittivity, which refers to the ratio of the capacitance when the same material is used as the dielectric and the vacuum in the same capacitor. , represents the relative ability of the dielectric to store electrostatic energy in an electric field. That is to say, the higher the dielectric constant of the material, the greater the capacity of the capacitor prepared using this material. Therefore, by using heavy metal oxides, heavy metal nitrides or oxide The barrier film 301 prepared from aluminum can effectively increase the capacitance of the capacitor. It can be understood that this embodiment does not specifically limit the material of the barrier film 301. Those skilled in the art can select the above-mentioned examples or other materials that can make the barrier film 301 have a high dielectric constant according to actual needs. Material.

Specifically, the interlayer dielectric layer 4 includes a silicon oxide layer 41 and a silicon nitride layer 42 . The interlayer dielectric layer 4 is used to isolate the first metal film 5 and the second metal film 6 in other areas on the display panel 100, plays an insulating role, and can reduce the parasitic capacitance of the display panel 100 to prevent the display panel 100 from being parasitic. If the capacitance is too large, the overall power consumption will increase and the signal will be delayed.

A second embodiment of the present invention relates to a display device including the above-mentioned display panel. The display device has a uniform capacitance value.

The third embodiment of the present invention relates to a method for manufacturing a display panel. The specific process of this embodiment is shown in Figure 2, including:

S301: Provide substrate.

Regarding step S301, specifically, the substrate can be a glass substrate, or it can be made of flexible materials, such as imide (PI), polycarbonate (PC), polyethersulfone (PES), polyparaphenylene It is formed of polymer materials such as ethylene dicarboxylate (PET), polyethylene naphthalate (PEN), polyarylate (PAR) or fiberglass reinforced plastic (FRP). The substrate may be transparent, translucent, or opaque to provide support for the formation of film layers disposed thereon. This embodiment does not specifically limit the material of the substrate.

S302: Form a functional layer, a first dielectric layer, a barrier film and an interlayer dielectric film that are stacked in sequence on the substrate.

Regarding step S302, specifically, the etching rate of the barrier film under the first etching condition is less than the etching rate of the interlayer dielectric film, and the etching rate of the functional layer under the first etching condition is The etching rate is less than the etching rate of the first dielectric layer, the etching rate of the barrier film under the second etching condition is greater than the etching rate of the first dielectric layer, and the material of the barrier film can be HfO2, TiO2 , HfZrO, HfSiNO, Ta2O5, ZrO2, ZrSiO2, Al2O3, SrTiO3 or BaSrTiO, or any combination thereof. The thickness of the barrier film ranges from 300 angstroms to 900 angstroms. The specific thickness depends on the device capacitance value requirements and the formation process of the barrier film. It can be ALD (Atomic Layer Deposition) or CVD (Chemical Vapor Deposition). The material of the interlayer dielectric film can be silicon oxide, silicon nitride, etc.

It can be understood that a second dielectric layer is also formed on the substrate, and the second dielectric layer is disposed between the substrate and the functional layer. The second dielectric layer is a stacked structure of a silicon oxide layer and a silicon nitride layer. The thickness of the silicon nitride layer is usually 40 to 60 nanometers, preferably 50 nanometers. The thickness of the silicon oxide layer is usually 240 to 250 nanometers, preferably 50 nanometers. 250 nanometers. It can be understood that by arranging a second dielectric layer between the substrate and the functional layer, it can isolate external water and oxygen from entering the functional layer and improve the reliability of the display panel. In addition, since the laser process is required to prepare the functional layer, By arranging the second dielectric layer on the substrate and arranging the functional layer on the second dielectric layer, damage to the substrate when forming the functional layer can be avoided, thereby further improving the reliability of the display panel.

S303: Perform an initial etching process on the interlayer dielectric film and barrier film facing the functional layer until the barrier film is penetrated to form a first pre-via hole.

Regarding step S303, specifically, since the material of the interlayer dielectric film is usually silicon nitride and silicon oxide, the interlayer dielectric film is etched through carbon tetrafluoride and oxygen (the first etching process), and the etching will Stay on the barrier film with high selectivity, and then use chlorine gas (second etching process) to etch the barrier film until it penetrates the barrier film and stay on the first dielectric layer with high selectivity, thereby forming the First pre-via hole.

S304: Perform etching on the bottom of the first pre-via hole to form a first through hole extending from the interlayer dielectric film to the functional layer; etching the unetched capacitor region of the interlayer dielectric film and barrier film Processing to form a second through hole extending from the interlayer dielectric film to the barrier film.

Regarding step S304, specifically, after the first pre-via hole is formed, since the material of the first dielectric layer is the same as the material of the interlayer dielectric film, carbon tetrafluoride and oxygen can be used to simultaneously treat the first pre-via hole. The bottom (i.e., the surface of the first dielectric layer) and the unetched capacitor area of the interlayer dielectric film are etched, and the etching of the unetched capacitor area of the interlayer dielectric film stays on the barrier film, and the first pre-pass The etching of the holes stops at the functional layer, thereby forming first through holes and second through holes with different depths.

S305: Form a metal film in the second through hole.

Regarding step S305, specifically, physical vapor deposition can be used to deposit a metal film in the second through hole. In this embodiment, the metal film can be a single-layer structure made of molybdenum, or it can be made of titanium-aluminum-titanium. It is a composite structure of materials. The thickness of the metal film of the single-layer molybdenum structure is 200 nanometers to 300 nanometers. The electrode plate with this thickness range can effectively reduce the overall thickness of the capacitor, thereby reducing the overall thickness of the display panel and improving the performance of the display panel. Bending performance: The metal film thickness of the laminated titanium-aluminum-titanium structure is 700 nanometers to 800 nanometers. The metal film of this structure has high resistivity and strong conductivity, and can release the stored charge of the capacitor more quickly.

Compared with the prior art, the embodiment of the present invention is that under the first etching condition, the etching rate of the functional layer is smaller than the etching rate of the first dielectric layer. That is to say, compared to the first dielectric layer, the functional layer The layer has a higher etching selectivity ratio, so that the etching can stay on the functional layer, thereby forming a first through hole extending from the interlayer dielectric film to the functional layer and penetrating the interlayer dielectric film and the barrier film; in the functional layer A barrier film is provided between the interlayer dielectric film and the barrier film. Under the first etching condition, the etching rate of the barrier film is smaller than the etching rate of the interlayer dielectric film. That is to say, compared to the interlayer dielectric film, the barrier film has A higher etching selectivity ratio enables the formation of a second through hole extending from the interlayer dielectric film to the barrier film and penetrating the interlayer dielectric film when etching the interlayer dielectric film. Through the arrangement of the above structure, it is effective It avoids the situation that "if a barrier film is not provided between the functional layer and the interlayer dielectric film, the etching amount when etching the second through hole cannot be guaranteed, so that the etching of the second through hole cannot effectively stay at a fixed depth." occurs, so that when the interlayer dielectric film is etched to form the second through hole, the barrier film can block the continuation of etching, so that the second through hole has a fixed depth, ensuring that the third through hole provided in the second through hole The uniformity of the thickness of a metal film ensures the uniformity of the capacitance value.

The fourth embodiment of the present invention relates to a method for preparing a display panel. This embodiment is further improved on the basis of the third embodiment. The specific improvements are: in this embodiment, Before the initial etching process is performed on the interlayer dielectric film and the barrier film facing the functional layer, it also includes: forming a patterned mask layer on the interlayer dielectric film, and the mask layer has A first groove and a second groove, the bottom of the first groove is located in the mask layer, and the second groove penetrates the mask layer.

The specific process of this implementation is shown in Figure 3, including:

S401: Provide substrate.

S402: Form a functional layer, a first dielectric layer, a barrier film and an interlayer dielectric film that are stacked in sequence on the substrate.

S403: Form a mask layer having first grooves and second grooves on the interlayer dielectric film.

Regarding step S403, specifically, the bottom of the first groove is located in the mask layer, and the second groove penetrates the mask layer. In other words, the first groove does not penetrate the mask layer. , the second groove penetrates the mask layer.

In practical applications, a whole layer of photoresist layer (which may be photoresist) can be formed first on the interlayer dielectric layer, and then a semi-transparent mask is used to half-expose the photoresist layer at the first position. Processing, performing a full exposure process on the photoresist layer at the second position, and developing the photoresist layer, thereby forming the first groove at the first position and the second groove at the second position. The second groove forms a mask layer.

S404: Using the mask layer as a mask, perform an initial etching process on the interlayer dielectric film and the barrier film along the second groove to form a first pre-via hole penetrating the barrier film.

Regarding step S404, specifically, the initial etching process in this embodiment may be: using the mask layer as a mask, etching the interlayer dielectric film along the second groove with a first etching process. , until the barrier film is exposed; use a second etching process to etch the barrier film until the barrier film is penetrated. It is worth mentioning that the first etching process can use carbon tetrafluoride and oxygen as etching gases to etch the interlayer dielectric film; the second etching process can use chlorine gas as the etching gas to etch the barrier film. The film is etched.

S405: Thinning the mask layer so that the first groove penetrates the mask layer.

Regarding step S405, specifically, the bottom of the first groove after the thinning process extends to the interlayer dielectric layer. In this step, the thinning process may be a short-time Asher (ie, ashing process) on the mask layer. , specifically, the gas for the thinning process can be oxygen, thereby removing the photoresist on the surface of the first groove, so that the first groove penetrates the mask layer. Of course, the thinning process can also be done in other ways, as long as the entire surface of the mask layer can be thinned so that the first groove penetrates the mask layer, and the specific method is not limited.

S406: Using the mask layer as a mask, etch the interlayer dielectric film along the first groove to expose the barrier film, form a second through hole, and simultaneously etch the bottom of the first pre-via hole to expose the function layer to form the first through hole.

S407: Form a metal film in the second through hole.

Steps S401 to S402 and step S407 in this embodiment are similar to steps S301 to S302 and step S305 in the third embodiment. In order to avoid duplication, they will not be described again here.

In order to facilitate understanding, the following is a detailed description of the formation method of the first through hole and the second through hole in this embodiment:

As shown in Figure 4(a), a second dielectric layer 7, a functional layer 2, a first dielectric layer 3, a barrier film 301 and an interlayer dielectric film 4 are formed in sequence on the substrate 1; Figure 4(b) As shown, a mask layer 8 having a first groove 81 and a second groove 82 is formed on the interlayer dielectric film 4. The bottom of the first groove 81 is located in the mask layer 8, and the second groove 82 penetrates through the mask layer 8. Film layer 8; as shown in Figure 4(c), carbon tetrafluoride and oxygen are used to etch the interlayer dielectric film 4, and the barrier film 301 is used as an etching barrier layer, so that the etching process effectively stops at the barrier film 301 ; As shown in Figure 4(d), chlorine gas is used to etch the barrier film 301, and the etching stops at the first dielectric layer 3 to form the first pre-via hole 101; As shown in Figure 4(e), the first pre-via hole 101 is formed. The groove 81 is thinned so that the first groove 81 penetrates the mask layer 8; as shown in Figure 4(f), carbon tetrafluoride and oxygen are used to simultaneously process the first pre-via hole 101 and the capacitor area dielectric layer. Etching, the etching stops at the high selectivity functional layer 2 and the barrier film 301 to form the first through hole 10 and the second through hole 20; as shown in Figure 4(g), PVD (physical vapor phase) of the metal film 9 is performed. phase deposition) to form a film to form a capacitor structure.

Compared with the prior art, the embodiment of the present invention is that under the first etching condition, the etching rate of the functional layer is smaller than the etching rate of the first dielectric layer. That is to say, compared to the first dielectric layer, the functional layer The layer has a higher etching selectivity ratio, so that the etching can stay on the functional layer, thereby forming a first through hole extending from the interlayer dielectric film to the functional layer and penetrating the interlayer dielectric film and the barrier film; in the functional layer A barrier film is provided between the interlayer dielectric film and the barrier film. Under the first etching condition, the etching rate of the barrier film is smaller than the etching rate of the interlayer dielectric film. That is to say, compared to the interlayer dielectric film, the barrier film has A higher etching selectivity ratio enables the formation of a second through hole extending from the interlayer dielectric film to the barrier film and penetrating the interlayer dielectric film when etching the interlayer dielectric film. Through the arrangement of the above structure, it is effective It avoids the situation that "if a barrier film is not provided between the functional layer and the interlayer dielectric film, the etching amount when etching the second through hole cannot be guaranteed, so that the etching of the second through hole cannot effectively stay at a fixed depth." occurs, so that when the interlayer dielectric film is etched to form the second through hole, the barrier film can block the continuation of etching, so that the second through hole has a fixed depth, ensuring that the third through hole provided in the second through hole The uniformity of the thickness of a metal film ensures the uniformity of the capacitance value.

The steps of the various methods above are divided just for the purpose of clear description. During implementation, they can be combined into one step or some steps can be split into multiple steps. As long as they include the same logical relationship, they are all within the scope of protection of this patent. ; Adding insignificant modifications or introducing insignificant designs to the algorithm or process without changing the core design of the algorithm and process are within the scope of protection of this patent.

Those of ordinary skill in the art can understand that the above-mentioned embodiments are specific examples for realizing the present invention, and in practical applications, various changes can be made in form and details without departing from the spirit and spirit of the present invention. scope.

Claims (10)

1. A method for manufacturing a display panel, comprising:

providing a substrate;

forming a functional layer, a first dielectric layer, a barrier film and an interlayer dielectric film which are stacked on the substrate, wherein the etching rate of the barrier film under a first etching condition is smaller than that of the interlayer dielectric film, the etching rate of the functional layer under the first etching condition is smaller than that of the first dielectric layer, and the etching rate of the barrier film under a second etching condition is larger than that of the first dielectric layer;

performing initial etching treatment on the interlayer dielectric film and the barrier film which are opposite to the functional layer until the interlayer dielectric film and the barrier film penetrate through the barrier film to form a first pre-through hole;

etching the bottom of the first pre-through hole to form a first through hole extending from the interlayer dielectric film to the functional layer; performing the etching treatment on the capacitance region of the interlayer dielectric film which is not etched to form a second through hole extending from the interlayer dielectric film to the barrier film; orthographic projection of the second through hole on the substrate and orthographic projection of the functional layer on the substrate are mutually independent;

and forming a metal film in the second through hole.

2. The method of manufacturing a display panel according to claim 1, further comprising, before performing an initial etching process on the interlayer dielectric film and the barrier film facing the functional layer:

forming a patterned mask layer on the interlayer dielectric film, wherein a first groove and a second groove are formed in the mask layer, the depth of the first groove is smaller than the thickness of the mask layer, and the second groove penetrates through the mask layer;

and performing initial etching treatment on the interlayer dielectric film and the barrier film opposite to the functional layer until the interlayer dielectric film and the barrier film penetrate through the barrier film to form a first pre-through hole, wherein the method specifically comprises the following steps of:

and performing initial etching treatment on the interlayer dielectric film and the barrier film along the second groove by taking the mask layer as a mask to form a first pre-through hole penetrating through the barrier film.

3. The method of manufacturing a display panel according to claim 2, wherein after forming the first pre-via penetrating the barrier film, before performing an etching process on a bottom of the first pre-via, further comprising:

thinning the mask layer to enable the first groove to penetrate through the mask layer;

the process steps of forming the first through hole and the second through hole comprise:

and etching the interlayer dielectric film along the first groove by taking the mask layer as a mask to expose the barrier film to form the second through hole, and simultaneously etching the bottom of the first pre-through hole to expose the functional layer to form the first through hole.

4. The method for manufacturing a display panel according to claim 3, wherein the thinning the mask layer to make the first groove penetrate the mask layer specifically includes:

and in the process of forming the first pre-through hole or after forming the first pre-through hole, carrying out the thinning treatment on the mask layer by adopting an ashing process, wherein the mask layer is made of photoresist.

5. The method for manufacturing a display panel according to claim 2, wherein the initial etching process specifically comprises:

using the mask layer as a mask, and etching the interlayer dielectric film along the second groove by a first etching process until the barrier film is exposed; and etching the barrier film by a second etching process until the barrier film is penetrated.

6. A display panel manufactured by the manufacturing method of a display panel according to any one of claims 1 to 5, comprising:

the method comprises the steps of stacking a substrate, a functional layer, a first dielectric layer, a barrier film and an interlayer dielectric film, wherein the etching rate of the barrier film under a first etching condition is smaller than that of the interlayer dielectric film, the etching rate of the functional layer under the first etching condition is smaller than that of the first dielectric layer, and the etching rate of the barrier film under a second etching condition is larger than that of the first dielectric layer;

a first via extending from the interlayer dielectric film to the functional layer, the first via penetrating through the interlayer dielectric film and the barrier film;

a second via hole extending from the interlayer dielectric film to the barrier film, the second via hole penetrating the interlayer dielectric film; orthographic projection of the second through hole on the substrate and orthographic projection of the functional layer on the substrate are mutually independent;

and the first metal film is arranged in the second through hole.

7. The display panel according to claim 6, wherein the first dielectric layer includes a gate insulating film, a capacitance dielectric film on a side of the gate insulating film away from the functional layer, the barrier film is provided between the capacitance dielectric film and the interlayer dielectric film, and an etching rate of the barrier film under the second etching condition is greater than an etching rate of the capacitance dielectric film.

8. The display panel of claim 7, further comprising a second metal film disposed in-layer with the capacitive dielectric film, and a portion of the capacitive dielectric film is disposed between the first metal film and the second metal film, wherein an orthographic projection of the second metal film on the substrate overlaps an orthographic projection of the first metal film on the substrate.

9. The display panel of claim 6, further comprising a second dielectric layer disposed between the substrate and the functional layer, wherein an orthographic projection of the functional layer on the substrate is within an orthographic projection of the second dielectric layer on the substrate.

10. A display device comprising the display panel according to any one of claims 6 to 9.