CN110828547A - A trench type power switch device and its manufacturing method - Google Patents

Abstract

A trench type power switch device and a manufacturing method thereof are provided, the switch device comprises a substrate, an N-type epitaxial layer formed on the substrate through epitaxial growth, a trench formed on the substrate through etching, a grid formed in the trench, a body region formed on the substrate through injecting P-type doping, a source region formed on the substrate through N-type doping injection, a source electrode connected with the source region, a drain electrode formed on the substrate, a P-type buried layer formed through injecting P-type doping, and a peripheral P-type region, wherein the P-type buried layer is formed at the bottom of the trench, the peripheral P-type region is formed at the periphery of the trench, the P-type buried layer is connected with the peripheral P-type region, and the source region and the peripheral P-type region are grounded. The switch device can achieve the same split gate performance as a split gate groove type device, and is low in switching loss, high in voltage resistance, low in internal resistance, simple in manufacturing process and low in cost.

Description

A trench type power switch device and its manufacturing method

technical field

The present invention relates to a power switch device, in particular to a trench type power switch device and a manufacturing method thereof.

Background technique

Commonly used power switching devices include MOSFETs (Metal-Oxide Semiconductor Field Effect Transistors), IGBTs (Insulated Gate Bipolar Transistors), Schottky Diodes, and the like. A split-gate trench switching device is shown in Figure 1. Using the principle of charge balance, the on-resistance is reduced by appropriately increasing the doping concentration of the epitaxial layer of the substrate, and the split gate formed under the isolation layer is used to reduce Cgd. /Ciss, improve the dv/dt capability of switching devices, with the advantages of fast switching speed, low power consumption, and low internal resistance. However, due to the complicated fabrication process of the split-gate trench type power switch device and the low product yield, the cost of the device is high.

The disclosure of the above background technology content is only used to assist the understanding of the inventive concept and technical solution of the present invention, and it does not necessarily belong to the prior art of this patent application. If there is no clear evidence that the above content has been disclosed on the filing date of this patent application The above background art should not be used to evaluate the novelty and inventive step of the present application.

SUMMARY OF THE INVENTION

The main purpose of the present invention is a trench type power switch device and a manufacturing method thereof, so as to overcome the defects of the prior art.

To achieve the above object, the present invention adopts the following technical solutions:

A trench type power switch device, comprising a substrate, an N-type epitaxial layer formed on the substrate by epitaxial growth, a trench formed by etching on the substrate, and a gate formed inside the trench electrode, a body region formed by implanting P-type doping on the substrate, a source region formed by performing N-type doping implantation on the substrate, a source electrode connected to the source region, and a source region formed on the substrate The drain on the upper drain also includes a P-type buried layer formed by implanting P-type doping and a peripheral P-type region, the P-type buried layer is formed at the bottom of the trench, and the peripheral P-type region is formed on the At the periphery of the trench, the P-type buried layer is connected to the peripheral P-type region, and is grounded to the source region through the peripheral P-type region.

further:

There is a gate oxide layer formed by thermal oxygen oxidation inside the trench, the gate is formed by polysilicon deposition on the gate oxide layer, and the P-type buried layer is located under the gate oxide layer .

The substrate is an N-type substrate.

The substrate is an N-type silicon wafer.

The thickness of the N-type epitaxial layer is 5-6 μm.

The peripheral P-type region is a P-type ring surrounding the trench.

In the depth direction, the upper end of the peripheral P-type region extends to the source region, and the lower end extends to the P-type buried layer.

A contact hole is etched on the substrate, and the contact hole passes through the source region and enters the body region.

The power switching device is a MOSFET (Metal-Oxide Semiconductor Field Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), a Schottky diode or a PiN diode.

A method for manufacturing the trench type power switch device, comprising the steps of:

S1, forming an N-type epitaxial layer by epitaxial growth on the substrate;

S2, forming the peripheral P-type region on the substrate;

S3, etching the trench on the substrate, and implanting P-type dopant at the bottom of the trench to form the P-type buried layer.

S4, performing thermal oxygen oxidation inside the trench to form the gate oxide layer, and performing polysilicon deposition to form the gate.

S5, performing P-type doping implantation on the substrate to form the body region;

S6, performing N-type doping implantation on the substrate to form the source region;

S7, performing the contact hole etching on the substrate.

The present invention has the following beneficial effects:

Different from the split-gate trench switch device, the present invention adds a P-type buried layer at the bottom of the trench of the power switch device, and the P-type buried layer is connected to the ground through the P-type region around the trench. When the power switch device is turned off, The gate is grounded, and the gate and the grounded peripheral P-type region are at the same potential voltage. Since the substrate forming the drain is connected to the highest voltage, the peripheral P-type region and the N-type epitaxial layer next to the gate form a depletion region at the same time. , the mutual depletion between the P-type buried layer and the N-type epitaxial layer makes the power switch device turn off and withstand high voltage; when the power switch device is turned on, the gate voltage changes from low to high, and the depletion region becomes an inversion region , at this time, since the P-type buried layer under the gate is connected to the ground and the source, the gate-drain capacitance also becomes the gate-source capacitance, which greatly reduces the Miller plateau time of the power switching device and reduces the device's switching losses. In addition, the trench type power switch device design of the present invention can also make the voltage of the P-type buried layer always the lowest voltage, so that the effect of split gate can also be achieved. Using the trench type power switch device, through the mutual depletion between the P-type buried layer and the N-type epitaxial layer, the withstand voltage of the power device can also be improved, and the internal resistance of the device can be reduced.

Compared with the split gate trench type power switch device, the trench type power switch device of the present invention can achieve the same split gate as the split gate trench type power switch device by adopting the design of the P-type buried layer and the peripheral P-type region. In addition, the trench type power switching device of the present invention has low switching loss, and through the mutual depletion between the P-type buried layer and the N-type epitaxy, the withstand voltage of the power device is improved, and the internal resistance of the device is reduced. At the same time, compared with the split-gate trench switch device that requires an isolation layer to be formed in the trench to form a split gate, the trench-type power switch device of the present invention has a simpler manufacturing process and lower manufacturing cost.

Description of drawings

FIG. 1 is a schematic cross-sectional view of a split-gate trench power switching device.

2 is a schematic cross-sectional view of a trench-type power switching device with a P-type buried layer according to a preferred embodiment of the present invention;

FIG. 3 is a schematic top view of a trench-type power switch device with a P-type buried layer according to a preferred embodiment of the present invention.

Detailed ways

Embodiments of the present invention will be described in detail below. It should be emphasized that the following description is exemplary only, and is not intended to limit the scope of the invention and its application.

It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element. In addition, the connection can be used for either a fixing function or a circuit connecting function.

It is to be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top" , "bottom", "inside", "outside", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, which are only for the convenience of describing the embodiments of the present invention and simplifying the description, rather than indicating or implying that The device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention.

In addition, the terms "first" and "second" are only used for descriptive purposes, and should not be construed as indicating or implying relative importance or implying the number of indicated technical features. Thus, a feature defined as "first", "second" may expressly or implicitly include one or more of that feature. In the description of the embodiments of the present invention, "plurality" means two or more, unless otherwise expressly and specifically defined.

Embodiments of the first aspect of the present invention provide a trench type power switch device.

FIG. 2 is a schematic cross-sectional view of a trench type power switch device according to a preferred embodiment of the present invention, and FIG. 3 is a schematic top view of the trench type power switch device according to a preferred embodiment of the present invention. According to a preferred embodiment, the trench type power switching device includes a substrate 1, an N-type epitaxial layer is formed on the substrate 1 by epitaxial growth, a trench is formed by etching on the substrate 1, and an N-type epitaxial layer is formed on the substrate 1 by epitaxial growth. The gate oxide layer 8 formed by thermal oxygen oxidation inside the trench, the gate electrode 2 formed by polysilicon deposition on the gate oxide layer 8 inside the trench, and the substrate 1 by implanting P A body region 3 formed by type doping, a source region 5 formed by N-type doping implantation on the substrate 1, a source electrode connected to the source region 5, and a drain electrode formed on the substrate 1, wherein the The trench type power switching device also includes a P-type buried layer 9 formed by implanting P-type doping and a peripheral P-type region 10, the P-type buried layer 9 is formed at the bottom of the trench and located in the gate oxide. Below the layer 8, the peripheral P-type region 10 is formed on the periphery of the trench, the P-type buried layer 9 is connected to the peripheral P-type region 10, and is grounded and connected to the peripheral P-type region 10 through the peripheral P-type region 10. Describe source region 5.

In different embodiments, the power switching device may be a MOSFET (Metal-Oxide Semiconductor Field Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), a Schottky diode or a PiN diode, or the like.

Different from the split-gate trench type power switch device, the present invention adds a P-type buried layer 9 at the bottom of the trench of the power switch device, and the P-type buried layer 9 is connected to the ground through the P-type region 10 on the periphery of the trench. When the device is turned off, the gate 2 is grounded, and the gate 2 and the grounded peripheral P-type region 10 are at the same potential voltage. Since the substrate 1 forming the drain is connected to the highest voltage, the peripheral P-type region 10 and the gate 2 are next to the At the same time, the N-type epitaxial layer forms a depletion region, and the mutual depletion between the P-type buried layer 9 and the N-type epitaxial layer makes the power switching device turn off and withstand high voltage; when the power switching device is turned on, the gate 2 voltage is changed by The low becomes high, and the depletion region becomes the inversion region. At this time, since the P-type buried layer 9 under the gate 2 is connected to the ground and the source, the gate-drain capacitance also becomes the gate-source capacitance, which greatly reduces the The Miller plateau time of the power switching device is reduced, and the switching loss of the device is reduced. In addition, the design of the trench type power switch device of the present invention can also make the voltage of the P-type buried layer 9 always the lowest voltage, so that the effect of split gate can also be achieved. By using the trench type power switch device, through the mutual depletion between the P-type buried layer 9 and the N-type epitaxial layer, the withstand voltage of the power device can also be improved, and the internal resistance of the device can be reduced.

In some embodiments, the substrate 1 is an N-type substrate 1 . Preferably, the substrate 1 can be formed of an N-type silicon wafer.

In a preferred embodiment, the thickness of the N-type epitaxial layer is 5-6 μm.

In a particularly preferred embodiment, the peripheral P-type region 10 is formed as a P-type ring surrounding the trench.

In a further embodiment, in the depth direction, the upper end of the peripheral P-type region 10 extends to the source region 5 , and the lower end extends to the P-type buried layer 9 .

In some embodiments, the substrate 1 is provided with a contact hole 4 for etching, and the contact hole 4 passes through the source region 5 and enters the body region 3 .

Embodiments of the second aspect of the present invention provide a method of fabricating the trench type power switch device of the present invention. Referring to FIG. 2 and FIG. 3 , in a preferred embodiment, a method for fabricating the trench type power switch device includes the following steps:

The first step: selecting an N-type silicon wafer with a phosphorus doping concentration of 1e17cm ^-3 as the substrate 1, and forming an N-type epitaxial layer by epitaxial growth on the substrate 1 silicon wafer, preferably, the thickness of the N-type epitaxial layer is about 5 to 6 microns.

Step 2: Implant P-type doping on the substrate 1 to form a P-type ring.

The third step: etching trenches on the substrate 1, and implanting P-type doping at the bottom to form a P-type buried layer 9.

The fourth step: thermal oxygen oxidation is performed inside the trench to form a gate oxide layer 8, and polysilicon deposition is performed to form the gate electrode 2.

The fifth step: performing P-type doping implantation on the substrate 1 to form a body region 3.

The sixth step: performing N-type doping implantation on the substrate 1 to form a source region 5 .

The seventh step: etching the contact hole 4 on the substrate 1.

The trench type power switch device of the present invention can achieve the same split gate effect and performance as the split gate trench type power switch device by adopting the design of the P-type buried layer and the peripheral P-type region. The switching loss of the power switching device is low. Through the mutual depletion between the P-type buried layer and the N-type epitaxy, the withstand voltage of the power device is improved, and the internal resistance of the device is reduced. Compared with the manufacture of the split-gate trench type power switch device of the present invention, the manufacture process of the trench type power switch device of the present invention is simpler and easier, and the manufacturing cost of the product is lower.

The above content is a further detailed description of the present invention in conjunction with specific/preferred embodiments, and it cannot be considered that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art to which the present invention pertains, without departing from the concept of the present invention, they can also make several substitutions or modifications to the described embodiments, and these substitutions or modifications should be regarded as It belongs to the protection scope of the present invention. In the description of this specification, reference to the terms "one embodiment," "some embodiments," "preferred embodiment," "example," "specific example," or "some examples" or the like is meant to be used in conjunction with the description. A particular feature, structure, material, or characteristic described by an example or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, those skilled in the art may combine and combine the different embodiments or examples described in this specification, as well as the features of the different embodiments or examples, without conflicting each other.

Claims (10)

1. A trench type power switch device comprises a substrate, an N-type epitaxial layer formed on the substrate through epitaxial growth, a trench formed on the substrate through etching, a grid formed in the trench, a body region formed on the substrate through P-type doping injection, a source region formed on the substrate through N-type doping injection, a source electrode connected with the source region, and a drain electrode formed on the substrate.

2. The trench power switch of claim 1 wherein said trench has a gate oxide formed by thermal oxidation inside said trench, said gate formed by polysilicon deposition on said gate oxide, said buried P-type layer underlying said gate oxide.

3. The trench power switch device of claim 1 wherein said substrate is an N-type substrate.

4. The trench power switch device of claim 3 wherein said substrate is an N-type silicon wafer.

5. The trench power switch device of claim 1 wherein the thickness of the N-type epitaxial layer is 5 to 6 μm.

6. The trench power switch device of any of claims 1 to 5 wherein the peripheral P-type region is a P-type ring surrounding the trench.

7. The trench power switch device as claimed in any one of claims 1 to 6 wherein the peripheral P-type region has an upper end extending to the source region and a lower end extending to the buried P-type layer in a depth direction.

8. The trench power switch device of any of claims 1 to 7 wherein a contact hole etch is provided on the substrate, the contact hole passing through the source region into the body region.

9. The trench power switch device of any of claims 1 to 8 wherein the power switch device is a MOSFET, an IGBT, a schottky diode, or a PiN diode.

10. A method of fabricating a trench power switch device according to any of claims 1 to 9, comprising the steps of:

s1, forming an N-type epitaxial layer on the substrate through epitaxial growth;

s2, forming the peripheral P-type region on the substrate;

and S3, etching the groove on the substrate, and injecting P-type doping at the bottom of the groove to form the P-type buried layer.

And S4, performing thermal oxidation inside the groove to form the grid oxide layer, and performing polysilicon deposition to form the grid.

S5, performing P-type doping implantation on the substrate to form the body region;

s6, carrying out N-type doping injection on the substrate to form the source region;

and S7, etching the contact hole on the substrate.

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