CN110796982A

CN110796982A - Driving method, driving chip, driving device and display device for image display

Info

Publication number: CN110796982A
Application number: CN201911125984.5A
Authority: CN
Inventors: 张哲�; 毕乾
Original assignee: Chipone Technology Beijing Co Ltd
Current assignee: Chipone Technology Beijing Co Ltd
Priority date: 2019-11-15
Filing date: 2019-11-15
Publication date: 2020-02-14
Anticipated expiration: 2039-11-15
Also published as: CN110796982B

Abstract

The application provides a driving method, a driving chip, a driving device and a display device for image display, which belong to the technical field of display, wherein the driving method comprises the following steps: receiving unit subdata in a frame of image data; converting the unit subdata into pixel voltage for outputting, and receiving the next unit subdata of the current frame image data; and performing voltage conversion output on the next unit subdata. According to the technical scheme provided by the embodiment of the application, voltage output conversion is performed by the unit subdata in one frame of image data each time, and the next unit subdata is received at the same time, so that the display delay time can be reduced.

Description

Driving method, driving chip, driving device and display device for image display

Technical Field

The present disclosure relates to the field of display technologies, and in particular, to a driving method, a driving chip, a driving device, and a display device for displaying an image.

Background

The operation process of the existing display includes: receiving image data from the outside; processing the image data by utilizing a sending module and a receiving module; and transmitting the processed image data to a driving chip to be converted into pixel voltages to drive a display panel, so that a picture is displayed on the light-emitting diode display.

However, in the aforementioned image data processing process, each module and driving chip inside the display are all processed in a single frame unit, so that the display has a display delay of one frame in the process of displaying an image.

Disclosure of Invention

The embodiment of the application provides a driving method for image display, which is used for reducing the time of display delay.

The application provides a driving method for image display, which comprises the following steps:

receiving unit subdata in a frame of image data;

converting the unit subdata into pixel voltage for outputting, and receiving the next unit subdata of the current frame image data;

and performing voltage conversion output on the next unit subdata.

In one embodiment, after the voltage conversion output of all the unit data of the current frame image data is completed, the method further includes:

and if the next frame of image data exists after the current frame of image data, performing voltage conversion output on the unit subdata of the next frame of image data until the voltage conversion output of all the frames of image data is completed.

In one embodiment, the unit sub-data includes at least one line of data in a frame of image data.

In one embodiment, the unit sub-data includes at least one row of data in a frame of image data.

In an embodiment, after the simultaneously receiving the next unit sub data of the current frame image data, the method further includes: and caching the received next unit subdata.

The application also provides a driving chip for image display, including:

a processor;

a memory for storing processor-executable instructions;

wherein the processor is configured to execute the driving method of image display.

In an embodiment, the memory includes a buffer for buffering the received next unit of sub data.

The present application further provides a driving device for image display, including:

the control chip is used for receiving the image data by taking a frame as a unit and dividing the image data by taking the frame as the unit into a plurality of unit subdata;

and the driving chip is electrically connected with the control chip and used for executing the driving method for image display.

In one embodiment, the control chip includes:

the image receiving module is used for receiving image data by taking a frame as a unit;

and the image processing module is electrically connected with the image receiving module and is used for dividing the image data taking the frame as a unit into a plurality of unit subdata.

In one embodiment, the present application further provides a display device including:

the above-described driving device; and the number of the first and second groups,

and the display panel is electrically connected with the output end of the driving device and is used for receiving the pixel voltage output by the driving device to display images.

In an embodiment, the display panel comprises one of an LED panel, a small-pitch display screen, a mini LED panel, or a micro LED panel.

According to the technical scheme provided by the embodiment of the application, voltage output conversion is performed by the unit subdata in one frame of image data each time, and the next unit subdata is received at the same time, so that the display delay time can be reduced.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the embodiments of the present application will be briefly described below.

Fig. 1 is a schematic frame diagram of a display device according to an embodiment of the present disclosure;

fig. 2 is a schematic diagram of a frame of a display device according to another embodiment of the present application;

fig. 3 is a schematic diagram of a frame of a display device according to another embodiment of the present application;

fig. 4 is a flowchart illustrating a driving method for displaying an image according to an embodiment of the present disclosure;

fig. 5 is a timing diagram illustrating the operation of the driving chip.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

Like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.

Fig. 1 is a schematic frame diagram of a display device according to an embodiment of the present disclosure, and as shown in fig. 1, the display device 100 includes a driving device 110 and a display panel 120, and the driving device 110 is electrically connected to the display panel 120. The display panel 120 can receive the pixel voltage output by the driving device 110, and display an image under the driving of the driving device 110. The display panel 120 may be one of an LED (Light Emitting Diode) panel, a small-pitch display screen, a mini LED panel, or a micro LED panel. The small-space display screen means that the center space between adjacent LED lamp beads is 2.5mm or less.

In an embodiment, as shown in fig. 1, the driving device 110 includes a control chip 111 and a driving chip 112, and the driving chip 112 is electrically connected to the control chip 111. The control chip 111 may receive the image data transmitted from the external device in units of frames and divide the image data in units of frames into a plurality of unit sub-data. The receiving and processing of the image are integrated in the same chip, so that the delay time caused by data transmission can be reduced. The external device may be a television box, a smart phone, a computer, a server, etc., and may be an electronic device that provides image data.

One frame of image data can be divided into a plurality of unit sub-data, and the data volume of the unit sub-data is smaller than that of one frame of image. The unit sub data may include one or more scan lines, and since the scanning manner may be a line scan or a column scan, the unit sub data may include at least one column data or at least one row data in one frame of image data.

The control chip 111 may sequentially transmit the divided unit sub data to the driving chip 112. The driving chip 112 receives the unit subdata in one frame of image data, converts the unit subdata into pixel voltage and outputs the pixel voltage to drive the display panel 120; while the pixel voltage is output, the next unit sub data is simultaneously received. And continuing to convert the next unit subdata into pixel voltage for outputting, and repeating the steps until the voltage conversion output of all the unit subdata of the current frame image data is finished (namely, the unit subdata is converted into the pixel voltage for outputting). And if the next frame of image data exists, continuing to perform voltage conversion output on the unit subdata of the next frame of image according to the process until the voltage conversion output of all the frames of images is completed.

In an embodiment, since the next unit sub data is received during the period of outputting the pixel voltage, the received next unit sub data may be buffered to reduce delay, and then the next unit sub data is obtained from the buffer for voltage conversion and output.

In one embodiment, the driving chip 112 receives the 1 st unit sub-data in the 1 st frame of image data, and converts the unit sub-data into the pixel voltage V₁Output is performed to drive the display panel 120. Outputting the pixel voltage V of the 1 st unit sub data₁Meanwhile, in order to reduce the delay, the 2 nd unit sub data transmitted by the control chip 111 is received at the same time. Continuously converting the 2 nd unit subdata into a pixel voltage V₂Outputting the pixel voltage V of the 2 nd unit subdata₂Meanwhile, the 3 rd unit subdata transmitted by the control chip 111 is received at the same time, and so on until all the unit subdata in the current frame image data are received and the voltage conversion output is completed, the 1 st unit subdata of the 2 nd frame image data is continuously received, and the cycle is continued until the receiving and the voltage conversion output of all the frame image data are completed.

Fig. 2 is a schematic diagram of a frame of a display device 100 according to another embodiment of the present disclosure, and as shown in fig. 2, the control chip 111 may include an image receiving module 1111 and an image processing module 1112. The image receiving module 1111 is electrically connected to the image processing module 1112. The image receiving module 1111 is configured to receive image data provided by an external device in units of frames; the image processing module 1112 is configured to divide the image data in units of frames into a plurality of unit sub-data, and sequentially transmit the unit sub-data to the driving chip 112.

Fig. 3 is a schematic diagram of a frame of a display device 100 according to yet another embodiment of the present disclosure, and as shown in fig. 3, the driving chip 112 may include a processor 1121 and a memory 1122 for storing executable instructions of the processor 1121.

The processor 1121 may execute the driving method for image display provided by the present application: receiving unit subdata in a frame of image data; converting the unit sub-data into pixel voltage for outputting, and receiving the next unit sub-data of the current frame image data; and performing voltage conversion output on the next unit subdata, thereby driving the display panel.

The processor 1121 includes a kernel, and the kernel can call the corresponding program unit from the memory 1122, and one or more of the kernels can be set. For example, the processor 1121 may include one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), controllers, micro-controllers, microprocessors, or other electronic components.

The memory 1122 may include a buffer area for buffering the received next unit data. So that the processor 1121 may extract the next unit sub data from the buffer of the memory 1122 for voltage conversion output.

The Memory 1122 may be implemented by any type of volatile or non-volatile Memory device or combination thereof, such as a Static Random Access Memory (SRAM), an Electrically Erasable Programmable Read-Only Memory (EEPROM), an Erasable Programmable Read-Only Memory (EPROM), a Programmable Read-Only Memory (PROM), a Read-Only Memory (ROM), a magnetic Memory, a flash Memory, a magnetic disk, or an optical disk.

An embodiment of the present application further provides a computer-readable storage medium, where a computer program is stored, and the computer program can be executed by the processor 1121 to complete the driving method for displaying an image provided in the present application.

The memory 1122 is an example of a computer-readable storage medium. Computer-readable storage media, including both permanent and non-permanent, removable and non-removable media, may implement the storage of a computer program by any method or technology. A computer program may be any combination of computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device.

Fig. 4 is a flowchart illustrating a driving method for displaying an image according to an embodiment of the present disclosure. The method may be performed by the driver chip 112 or the processor 1121 of the driver chip 112, and the method may include the following steps.

In step 410, unit data in a frame of video data is received.

In step 420, the unit sub data is converted into pixel voltages for outputting, and a next unit sub data of the current frame image data is received.

In step 430, the next unit sub data is output by voltage conversion.

One frame of image can be regarded as one image, and the unit subdata can be one or more lines of data in one image; one or more columns of data. The video receiving module 1111 receives video data in units of frames and transmits the video data in units of frames to the video processing module 1112. The image processing module 1112 divides a frame of image data into a plurality of unit sub-data, and sequentially transmits each unit sub-data to the driver chip 112 one by one (i.e., transmits one unit sub-data at a time). The driving chip 112 receives one unit sub data at a time, converts the unit sub data into a pixel voltage, and outputs the pixel voltage to the display panel 120, so as to drive the display panel 120 to display a corresponding image.

By way of example with the LED panel, a pixel can include three LED lamp pearl red, green, blue, through the size of control to every lamp pearl output voltage, can control the luminance of corresponding lamp pearl, from the colour of this pixel of control. The voltage conversion output can be considered as the color of each pixel point in the unit subdata, and the color is converted into the voltage output to the red, green and blue LED lamp beads of the corresponding pixel point, so that the color of the pixel point in the display panel 120 is controlled.

Fig. 5 is a timing diagram illustrating the operation of the driving chip. As shown in fig. 5, the unit sub data is denoted by S, the 2 nd unit sub data is simultaneously received during the generation of the pixel voltage of the 1 st unit sub data to drive the display panel 120, the nth unit sub data is simultaneously received during the generation of the pixel voltage of the n-1 th unit sub data to drive the display panel 120, the n +1 th unit sub data is simultaneously received during the generation of the pixel voltage of the nth unit sub data to drive the display panel 120, and so on. Thus, the display delay between the driving chip and the display panel 120 can be reduced from one frame delay to sub-unit data, and the delay time can be reduced to less than 0.6ms, which is much less than the conventional delay time (16.6 ms).

In an embodiment, since the next unit sub data is received during the pixel voltage output in step 420, after the next unit sub data is received, the method provided by the present application further includes buffering the received next unit sub data, and subsequently obtaining the next unit sub data from the buffer for voltage conversion and output.

In an embodiment, after the step 430 completes the voltage conversion output of all the unit sub data of the current frame image data, the method provided by the present application further includes: and if the next frame of image data exists after the current frame of image data, sequentially performing voltage conversion output on the unit subdata of the next frame of image data until the voltage conversion output of all the frames of image data is completed. So that the driving display of the image can be continuously performed for many frames of the video image.

In the embodiments provided in the present application, the disclosed apparatus and method can be implemented in other ways. The apparatus embodiments described above are merely illustrative, and for example, the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

In addition, functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

Claims

1. A method for driving an image display, comprising:

receiving unit subdata in a frame of image data;

and performing voltage conversion output on the next unit subdata.

2. The method of claim 1, wherein after the voltage conversion output of all the unit data of the current frame image data is completed, the method further comprises:

and if the next frame of image data exists after the current frame of image data, performing voltage conversion on the unit subdata of the next frame of image data and outputting the unit subdata.

3. The method of claim 1, wherein the unit sub data comprises at least one line of data in one frame of image data.

4. The method of claim 1, wherein the unit data comprises at least one row of data in a frame of video data.

5. The method of claim 1, wherein after said simultaneously receiving next unit data of the current frame image data, the method further comprises:

and caching the received next unit subdata.

6. A driving chip for image display comprises

A processor;

a memory for storing processor-executable instructions;

wherein the processor is configured to execute the driving method of image display according to any one of claims 1 to 5.

7. The driver chip of claim 6, wherein the memory comprises a buffer for buffering the received next unit of sub-data.

8. A driving apparatus for displaying an image, comprising:

a driving chip electrically connected to the control chip for executing the driving method of image display according to any one of claims 1 to 5.

9. The driving device according to claim 8, wherein the control chip comprises:

10. A display device, comprising:

the drive device of claim 8 or 9;

and the number of the first and second groups,

11. The display device of claim 10, wherein the display panel comprises one of an LED panel, a small-pitch display screen, a mini LED panel, or a micro LED panel.