CN110581181B - Silicon carbide Schottky diode and preparation method thereof - Google Patents
Silicon carbide Schottky diode and preparation method thereof Download PDFInfo
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 139
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 139
- 238000002360 preparation method Methods 0.000 title claims abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 87
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 124
- 235000012239 silicon dioxide Nutrition 0.000 claims description 62
- 239000000377 silicon dioxide Substances 0.000 claims description 62
- 238000002513 implantation Methods 0.000 claims description 45
- 238000000034 method Methods 0.000 claims description 44
- 238000005468 ion implantation Methods 0.000 claims description 34
- 238000002161 passivation Methods 0.000 claims description 32
- 238000005530 etching Methods 0.000 claims description 23
- 150000002500 ions Chemical class 0.000 claims description 21
- 238000000137 annealing Methods 0.000 claims description 20
- 230000008569 process Effects 0.000 claims description 11
- 238000004140 cleaning Methods 0.000 claims description 10
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 9
- 229910052799 carbon Inorganic materials 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 3
- 230000007423 decrease Effects 0.000 claims 1
- 238000001259 photo etching Methods 0.000 claims 1
- 230000005684 electric field Effects 0.000 abstract description 15
- 238000000206 photolithography Methods 0.000 description 32
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- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 238000010884 ion-beam technique Methods 0.000 description 4
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Abstract
Description
技术领域Technical Field
本发明涉及功率半导体器件技术领域，具体涉及一种碳化硅肖特基二极管及其制备方法。The present invention relates to the technical field of power semiconductor devices, and in particular to a silicon carbide Schottky diode and a preparation method thereof.
背景技术Background technique
碳化硅是第三代半导体材料中最具吸引力的材料之一，具有临界电场大、禁带宽度大、高温电子漂移速度高等优点，因此，广泛应用于制作高温、高压、大功率、耐辐照等半导体器件；其中，碳化硅肖特基二极管在电力电子技术中具有整流和续流的作用，因而广泛应用于功率变换电路中。Silicon carbide is one of the most attractive materials among the third-generation semiconductor materials. It has the advantages of large critical electric field, large bandgap width, and high high-temperature electron drift velocity. Therefore, it is widely used in the manufacture of high-temperature, high-voltage, high-power, radiation-resistant and other semiconductor devices; among them, silicon carbide Schottky diodes have the functions of rectification and freewheeling in power electronics technology, and are therefore widely used in power conversion circuits.
目前，碳化硅肖特基二极管大多是采用离子注入技术，并与光刻、刻蚀等工艺结合实现面内可控区域注入；由于碳化硅掺杂剂扩散所需的温度极高，超过2300K，因此，高温离子注入是碳化硅肖特基二极管主要掺杂形成的必要过程。At present, most silicon carbide Schottky diodes use ion implantation technology, combined with lithography, etching and other processes to achieve controllable area implantation within the surface; since the temperature required for the diffusion of silicon carbide dopants is extremely high, exceeding 2300K, high-temperature ion implantation is a necessary process for the main doping formation of silicon carbide Schottky diodes.
现有的碳化硅肖特基二极管P型结以及结终端是由多次垂直高温离子注入及高温退火激活形成，为了防止有源区边缘的电场过于集中，通常采用高温离子注入技术将离子注入在有源区边缘，形成结终端。当器件处于反偏状态时，耗尽区会随着反向电压的不断增大而逐渐发生纵向与横向的扩展，但是，垂直注入方式会使得P型结区边缘凹凸不平，导致注入结边缘的电场强度过大，碳化硅肖特基二极管芯片的反向耐压低以及可靠性差的问题。The existing P-type junction and junction terminal of the silicon carbide Schottky diode are formed by multiple vertical high-temperature ion implantation and high-temperature annealing activation. In order to prevent the electric field at the edge of the active area from being too concentrated, high-temperature ion implantation technology is usually used to implant ions at the edge of the active area to form the junction terminal. When the device is in a reverse bias state, the depletion region will gradually expand vertically and horizontally as the reverse voltage continues to increase. However, the vertical injection method will make the edge of the P-type junction area uneven, resulting in excessive electric field strength at the edge of the injected junction, low reverse withstand voltage and poor reliability of the silicon carbide Schottky diode chip.
发明内容Summary of the invention
因此，本发明要解决的技术问题在于克服现有技术中采用垂直注入方式会使得P型结区边缘凹凸不平，导致注入结边缘的电场强度过大，碳化硅肖特基二极管芯片的反向耐压低以及可靠性差的缺陷，从而提供一种碳化硅肖特基二极管及其制备方法。Therefore, the technical problem to be solved by the present invention is to overcome the defects of the prior art that the vertical injection method adopted will make the edge of the P-type junction region uneven, resulting in excessive electric field strength at the edge of the injection junction, low reverse withstand voltage and poor reliability of the silicon carbide Schottky diode chip, thereby providing a silicon carbide Schottky diode and a preparation method thereof.
为此，本发明提供如下技术方案：To this end, the present invention provides the following technical solutions:
一种碳化硅肖特基二极管，包括基底，还包括：A silicon carbide Schottky diode comprises a substrate and further comprises:
若干P型结，其包括相对设置的第一端部和第二端部，且所述P型结嵌插设置于所述基底内以使所述第二端部位于所述基底内，相邻P型结间隔设置；A plurality of P-type junctions, comprising a first end and a second end that are arranged opposite to each other, wherein the P-type junctions are embedded in the substrate so that the second end is located in the substrate, and adjacent P-type junctions are arranged at intervals;
连接所述第一端部和第二端部且位于P型结侧面上的连线为光滑的弧线。The line connecting the first end and the second end and located on the side of the P-type junction is a smooth arc line.
所述第二端部为球形端部或者椭圆形端部。The second end is a spherical end or an elliptical end.
所述基底包括碳化硅衬底及设置其上的碳化硅外延层，所述P型结设置于所述碳化硅外延层上；The substrate comprises a silicon carbide substrate and a silicon carbide epitaxial layer disposed thereon, and the P-type junction is disposed on the silicon carbide epitaxial layer;
所述碳化硅外延层包括有源区及位于有源区至少一侧的终端区。The silicon carbide epitaxial layer includes an active area and a terminal area located at at least one side of the active area.
其中，有源区是用于制作有源元件的区域，是整个碳化硅肖特基二极管的核心区域；终端区是用于改变器件边缘处表面电场分布的区域，有利于提高该碳化硅肖特基二极管的击穿电压。Among them, the active area is the area used to make active components and is the core area of the entire silicon carbide Schottky diode; the terminal area is the area used to change the surface electric field distribution at the edge of the device, which is beneficial to improve the breakdown voltage of the silicon carbide Schottky diode.
位于所述终端区的碳化硅外延层上设置二氧化硅层；A silicon dioxide layer is provided on the silicon carbide epitaxial layer located in the terminal region;
位于所述有源区的碳化硅外延层上设置第一电极，所述第一电极边缘朝向所述二氧化硅层延伸形成延伸部，所述延伸部覆盖部分二氧化硅层。A first electrode is arranged on the silicon carbide epitaxial layer located in the active region, and an edge of the first electrode extends toward the silicon dioxide layer to form an extension portion, and the extension portion covers a portion of the silicon dioxide layer.
所述的碳化硅肖特基二极管还包括，The silicon carbide Schottky diode further comprises:
钝化层，至少覆盖部分延伸部和至少覆盖部分二氧化硅层，以保护终端区；第二电极，设置于所述基底远离所述P型结的一侧上。The passivation layer covers at least a portion of the extension portion and at least a portion of the silicon dioxide layer to protect the terminal region; and the second electrode is arranged on a side of the substrate away from the P-type junction.
本发明还提供了一种上述碳化硅肖特基二极管的制备方法，包括如下步骤：The present invention also provides a method for preparing the above silicon carbide Schottky diode, comprising the following steps:
围绕基底一侧的盲孔旋转并同时向所述盲孔内进行离子注入，以在所述盲孔内形成P型结，在离子注入的过程中，离子注入的方向与基底的夹角为钝角或锐角。Ions are implanted into the blind hole while rotating around one side of the substrate to form a P-type junction in the blind hole. During the ion implantation, the angle between the ion implantation direction and the substrate is an obtuse angle or an acute angle.
所述离子注入的方向与基底的夹角β为75°-90°；优选地，所述离子注入的方向与基底的夹角为75°；The angle β between the direction of the ion implantation and the substrate is 75°-90°; preferably, the angle between the direction of the ion implantation and the substrate is 75°;
所述离子注入的注入能量为30-500KeV，注入温度为500-600℃，所述旋转的旋转角α为0-270°优选地，所述旋转角α为0°，90°，180°，或270°。The implantation energy of the ion implantation is 30-500 KeV, the implantation temperature is 500-600° C., and the rotation angle α of the rotation is 0-270°. Preferably, the rotation angle α is 0°, 90°, 180°, or 270°.
所述盲孔的深度h为300-500nm；The depth h of the blind hole is 300-500nm;
所述离子注入的离子为Al离子，注入剂量为1.4E13-3.5E14cm-2。The ions implanted are Al ions, and the implantation dosage is 1.4E13-3.5E14 cm -2 .
在所述盲孔内注入离子之后，还包括对基底进行高温退火；优选地，在高温退火之前，还包括在基底的两侧设置碳膜进行保护，然后再于1650-1750℃下高温退火；After the ions are injected into the blind hole, the substrate is subjected to high temperature annealing; preferably, before the high temperature annealing, a carbon film is provided on both sides of the substrate for protection, and then the substrate is subjected to high temperature annealing at 1650-1750°C;
在高温退火后的基底一侧沉积二氧化硅以形成二氧化硅层，对沉积二氧化硅后的基底两侧进行金属化以形成第一电极和第二电极，最后在基底靠近二氧化硅的一层沉积钝化层。Silicon dioxide is deposited on one side of the substrate after high temperature annealing to form a silicon dioxide layer, and both sides of the substrate after silicon dioxide deposition are metallized to form a first electrode and a second electrode, and finally a passivation layer is deposited on a layer of the substrate close to silicon dioxide.
钝化层通过匀胶，曝光，烘烤，然后通过光刻刻蚀掉不需要覆盖钝化层区域的钝化层来实现的。The passivation layer is formed by coating, exposing, baking, and then etching away the passivation layer in the area that does not need to be covered by the passivation layer by photolithography.
所述带有盲孔的基底一侧的制备步骤如下：首先清洗光刻基底，其次在基底上依次制作第一掩膜层和第二掩膜层；之后将第二掩膜层上的图案通过刻蚀开孔由第二掩膜层转移至第一掩膜层，然后将剩余的第二掩膜层清洗去掉，即得所述带有盲孔的基底一侧。The preparation steps of the substrate side with blind holes are as follows: first, clean the photolithography substrate, and then make a first mask layer and a second mask layer on the substrate in sequence; then, transfer the pattern on the second mask layer from the second mask layer to the first mask layer by etching holes, and then clean and remove the remaining second mask layer to obtain the substrate side with blind holes.
所述第一掩膜为二氧化硅；第二掩膜为光刻胶；优选地，所述光刻胶为正性光刻胶。The first mask is silicon dioxide; the second mask is photoresist; preferably, the photoresist is positive photoresist.
所述第一掩膜层形成的方法为化学气相沉积法。The first mask layer is formed by chemical vapor deposition.
所述第一掩膜层的厚度为2-3um。The thickness of the first mask layer is 2-3 um.
本发明技术方案，具有如下优点：The technical solution of the present invention has the following advantages:
1.本发明提供的碳化硅肖特基二极管，包括基底，还包括：若干P型结，其包括相对设置的第一端部和第二端部，且所述P型结嵌插设置于所述基底内以使所述第二端部位于所述基底内，相邻P型结间隔设置；连接所述第一端部和第二端部且位于P型结侧面上的连线为光滑的弧线。通过连接所述第一端部和第二端部且位于P型结侧面上的连线为光滑的弧线的结构，使得注入P型结边缘的电场强度更加均匀，进一步提高碳化硅肖特基二极管芯片的反向耐压以及可靠性。1. The silicon carbide Schottky diode provided by the present invention includes a substrate, and also includes: a plurality of P-type junctions, which include a first end and a second end that are arranged opposite to each other, and the P-type junction is embedded in the substrate so that the second end is located in the substrate, and adjacent P-type junctions are arranged at intervals; the connecting line connecting the first end and the second end and located on the side of the P-type junction is a smooth arc. By using the structure that the connecting line connecting the first end and the second end and located on the side of the P-type junction is a smooth arc, the electric field strength injected into the edge of the P-type junction is more uniform, and the reverse withstand voltage and reliability of the silicon carbide Schottky diode chip are further improved.
2.本发明提供的碳化硅肖特基二极管的制备方法，通过采用旋转角度、分多步高温离子注入的方式所形成的P型结内边缘为圆滑的弧形，使得注入结边缘的电场强度更加均匀，进一步提高碳化硅肖特基二极管芯片的反向耐压以及可靠性，有效解决了因传统的垂直注入方式使得P型结区边缘凹凸不平，导致注入的P型结边缘的电场强度过大的问题。2. The preparation method of the silicon carbide Schottky diode provided by the present invention adopts a method of rotating an angle and performing multi-step high-temperature ion implantation to form a smooth arc-shaped inner edge of the P-type junction, so that the electric field strength at the edge of the injected junction is more uniform, further improving the reverse withstand voltage and reliability of the silicon carbide Schottky diode chip, and effectively solving the problem of excessive electric field strength at the edge of the injected P-type junction due to the uneven edge of the P-type junction area caused by the traditional vertical implantation method.
3.本发明提供的碳化硅肖特基二极管的制备方法，高温退火时碳化硅基底表面的碳元素易析出而被氧化，使得表面不均匀，进而导致电场强度不均匀；通过采用碳膜保护退火可有效保护碳化硅基底表面不被破坏，进一步提高电场强度的均匀性；对退火温度进行优化限定有利于获得高的注入激活率。3. In the preparation method of the silicon carbide Schottky diode provided by the present invention, the carbon element on the surface of the silicon carbide substrate is easily precipitated and oxidized during high-temperature annealing, making the surface uneven, thereby causing uneven electric field strength; by adopting carbon film protection annealing, the surface of the silicon carbide substrate can be effectively protected from being damaged, further improving the uniformity of the electric field strength; optimizing and limiting the annealing temperature is conducive to obtaining a high injection activation rate.
4.本发明提供的碳化硅肖特基二极管的制备方法，通过将所述盲孔深度设置为300-500nm，能够使得注入结边缘柔化，增加曲率半径，进一步降低注入区边缘的电场强度，提高注入结边缘电场强度的均匀性。4. The method for preparing a silicon carbide Schottky diode provided by the present invention can soften the edge of the injection junction, increase the radius of curvature, further reduce the electric field strength at the edge of the injection region, and improve the uniformity of the electric field strength at the edge of the injection junction by setting the blind hole depth to 300-500nm.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
为了更清楚地说明本发明具体实施方式或现有技术中的技术方案，下面将对具体实施方式或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施方式，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
图1是本发明中碳化硅肖特基二极管的截面示意图；FIG1 is a schematic cross-sectional view of a silicon carbide Schottky diode according to the present invention;
图2是本发明中碳化硅肖特基二极管制备方法的工艺流程图；FIG2 is a process flow chart of a method for preparing a silicon carbide Schottky diode according to the present invention;
图3是本发明中刻蚀开孔完成后的截面示意图；FIG3 is a schematic cross-sectional view of the present invention after the etching and opening are completed;
图4是本发明中离子注入过程中面内旋转的位置示意图；FIG4 is a schematic diagram of the position of the in-plane rotation during the ion implantation process of the present invention;
图5是本发明中离子注入过程中倾斜的位置示意图；FIG5 is a schematic diagram of the tilted position during ion implantation in the present invention;
图6是本发明实施例1高温离子注入后形成的P型结边缘区的结构示意图；6 is a schematic structural diagram of a P-type junction edge region formed after high-temperature ion implantation in Example 1 of the present invention;
图7是本发明对比例1高温离子注入后形成的P型结边缘区的结构示意图；7 is a schematic structural diagram of a P-type junction edge region formed after high-temperature ion implantation in Comparative Example 1 of the present invention;
图8是本发明中实施例1和对比例1制得的碳化硅肖特基二极管的反向耐压曲线。FIG8 is a reverse withstand voltage curve of the silicon carbide Schottky diodes prepared in Example 1 and Comparative Example 1 of the present invention.
附图标记：Reference numerals:
1、第二电极；2、碳化硅衬底；3、碳化硅外延层；4、P型结；5、二氧化硅层；6、第一电极；7、钝化层；8、碳化硅的定位标记；9、离子注入时的离子束；10、碳化硅片侧视图。1. Second electrode; 2. Silicon carbide substrate; 3. Silicon carbide epitaxial layer; 4. P-type junction; 5. Silicon dioxide layer; 6. First electrode; 7. Passivation layer; 8. Positioning mark of silicon carbide; 9. Ion beam during ion implantation; 10. Side view of silicon carbide wafer.
具体实施方式Detailed ways
提供下述实施例是为了更好地进一步理解本发明，并不局限于所述最佳实施方式，不对本发明的内容和保护范围构成限制，任何人在本发明的启示下或是将本发明与其他现有技术的特征进行组合而得出的任何与本发明相同或相近似的产品，均落在本发明的保护范围之内。The following examples are provided for a better understanding of the present invention, but are not intended to limit the best mode of implementation, nor to limit the content and protection scope of the present invention. Any product identical or similar to the present invention obtained by anyone under the inspiration of the present invention or by combining the features of the present invention with other prior arts shall fall within the protection scope of the present invention.
实施例中未注明具体实验步骤或条件者，按照本领域内的文献所描述的常规实验步骤的操作或条件即可进行。所用试剂或仪器未注明生产厂商者，均为可以通过市购获得的常规试剂产品。If no specific experimental steps or conditions are specified in the examples, the conventional experimental steps or conditions described in the literature in the field can be used. If no manufacturer is specified for the reagents or instruments used, they are all conventional reagent products that can be purchased commercially.
本发明实施例提供一种碳化硅肖特基二极管，如图1所示，所述肖特基二极管包括基底，以及若干P型结4，该P型结4包括相对设置的第一端部和第二端部，且所述P型结4嵌插设置于所述基底内以使所述第二端部位于所述基底内，相邻P型结间隔设置；连接所述第一端部和第二端部且位于P型结4侧面上的连线为光滑的弧线。例如，所述第二端部为球形端部或者椭圆形端部。An embodiment of the present invention provides a silicon carbide Schottky diode, as shown in FIG1 , the Schottky diode includes a substrate, and a plurality of P-type junctions 4, the P-type junctions 4 include a first end and a second end that are arranged opposite to each other, and the P-type junctions 4 are inserted and arranged in the substrate so that the second end is located in the substrate, and adjacent P-type junctions are arranged at intervals; the connecting line connecting the first end and the second end and located on the side of the P-type junction 4 is a smooth arc. For example, the second end is a spherical end or an elliptical end.
所述基底包括碳化硅衬底2及设置其上的碳化硅外延层3，所述P型结4设置于所述碳化硅外延层3上；所述碳化硅外延层3包括有源区及位于有源区至少一侧的终端区。位于所述终端区的碳化硅外延层3上设置二氧化硅层5；位于所述有源区的碳化硅外延层3上设置第一电极6，所述第一电极6边缘朝向所述二氧化硅层5延伸形成延伸部，所述延伸部覆盖部分二氧化硅层5。The substrate includes a silicon carbide substrate 2 and a silicon carbide epitaxial layer 3 disposed thereon, the P-type junction 4 is disposed on the silicon carbide epitaxial layer 3; the silicon carbide epitaxial layer 3 includes an active region and a terminal region located at least on one side of the active region. A silicon dioxide layer 5 is disposed on the silicon carbide epitaxial layer 3 located in the terminal region; a first electrode 6 is disposed on the silicon carbide epitaxial layer 3 located in the active region, the edge of the first electrode 6 extends toward the silicon dioxide layer 5 to form an extension portion, and the extension portion covers a portion of the silicon dioxide layer 5.
所述碳化硅肖特基二极管还包括钝化层7和第二电极1，所述钝化层7至少覆盖部分延伸部和至少覆盖部分二氧化硅层5，保护器件终端结构不被破坏。所述第二电极1设置于所述基底远离所述P型结4的一侧上。The silicon carbide Schottky diode further comprises a passivation layer 7 and a second electrode 1, wherein the passivation layer 7 covers at least part of the extension portion and at least part of the silicon dioxide layer 5 to protect the device terminal structure from being damaged. The second electrode 1 is disposed on a side of the substrate away from the P-type junction 4.
所述碳化硅肖特基二极管包括：碳化硅基底，所述碳化硅基底的第一端面内具有众多P型结4，所述P型结4内边缘为圆滑的弧形；所述碳化硅基底是由碳化硅衬底2，以及位于所述碳化硅衬底2第一端面的碳化硅外延层3构成；所述碳化硅外延层3的第一端面即为所述碳化硅基底的第一端面；所述碳化硅外延层3第一端面上设有二氧化硅层5和第一电极6，所述第一电极6和二氧化硅层5形成台面结构，所述台面结构上设有PI钝化层7；所述碳化硅衬底2的第二端面设有第二电极1。The silicon carbide Schottky diode comprises: a silicon carbide substrate, wherein a first end face of the silicon carbide substrate has a plurality of P-type junctions 4, and the inner edge of the P-type junctions 4 is a smooth arc; the silicon carbide substrate is composed of a silicon carbide substrate 2, and a silicon carbide epitaxial layer 3 located on the first end face of the silicon carbide substrate 2; the first end face of the silicon carbide epitaxial layer 3 is the first end face of the silicon carbide substrate; a silicon dioxide layer 5 and a first electrode 6 are provided on the first end face of the silicon carbide epitaxial layer 3, the first electrode 6 and the silicon dioxide layer 5 form a mesa structure, and a PI passivation layer 7 is provided on the mesa structure; a second electrode 1 is provided on the second end face of the silicon carbide substrate 2.
上述碳化硅肖特基二极管中连接所述第一端部和第二端部且位于P型结4侧面上的连线为光滑的弧线结构，使得注入结边缘的电场强度更加均匀，进一步提高碳化硅肖特基二极管芯片的反向耐压以及可靠性。The connection line connecting the first end and the second end in the above-mentioned silicon carbide Schottky diode and located on the side of the P-type junction 4 is a smooth arc structure, which makes the electric field strength at the edge of the injection junction more uniform, further improving the reverse withstand voltage and reliability of the silicon carbide Schottky diode chip.
此外，本发明还提供了一种上述碳化硅肖特基二极管的制备方法，包括如下步骤：In addition, the present invention also provides a method for preparing the above silicon carbide Schottky diode, comprising the following steps:
围绕基底一侧的盲孔旋转并同时向所述盲孔内进行离子注入，以在所述盲孔内形成P型结，在离子注入的过程中，离子注入的方向与基底的夹角为钝角或锐角。Ions are implanted into the blind hole while rotating around one side of the substrate to form a P-type junction in the blind hole. During the ion implantation, the angle between the ion implantation direction and the substrate is an obtuse angle or an acute angle.
所述离子注入的方向与基底的夹角β为75°-90°；优选地，所述离子注入的方向与基底的夹角为75°。The angle β between the direction of the ion implantation and the substrate is 75°-90°; preferably, the angle between the direction of the ion implantation and the substrate is 75°.
所述离子注入的注入能量为30-500KeV，注入温度为500-600℃，所述旋转的旋转角α为0-270°优选地，所述旋转角α为0°，90°，180°，或270°。The implantation energy of the ion implantation is 30-500 KeV, the implantation temperature is 500-600° C., and the rotation angle α of the rotation is 0-270°. Preferably, the rotation angle α is 0°, 90°, 180°, or 270°.
所述盲孔的深度h为300-500nm；The depth h of the blind hole is 300-500nm;
所述离子注入的离子为Al离子，注入剂量为1.4E13-3.5E14cm-2。The ions implanted are Al ions, and the implantation dosage is 1.4E13-3.5E14 cm -2 .
在所述盲孔内注入离子之后，还包括对基底进行高温退火；优选地，在高温退火之前，还包括在基底的两侧设置碳膜进行保护，然后再于1650-1750℃下高温退火；After the ions are injected into the blind hole, the substrate is subjected to high temperature annealing; preferably, before the high temperature annealing, a carbon film is provided on both sides of the substrate for protection, and then the substrate is subjected to high temperature annealing at 1650-1750°C;
在高温退火后的基底一侧沉积二氧化硅以形成二氧化硅层，对沉积二氧化硅后的基底两侧进行金属化以形成第一电极和第二电极，最后在基底靠近二氧化硅的一层沉积钝化层。Silicon dioxide is deposited on one side of the substrate after high temperature annealing to form a silicon dioxide layer, and both sides of the substrate after silicon dioxide deposition are metallized to form a first electrode and a second electrode, and finally a passivation layer is deposited on a layer of the substrate close to silicon dioxide.
钝化层通过匀胶，曝光，烘烤，然后通过光刻刻蚀掉不需要覆盖钝化层区域的钝化层来实现的。The passivation layer is formed by coating, exposing, baking, and then etching away the passivation layer in the area that does not need to be covered by the passivation layer by photolithography.
所述带有盲孔的基底一侧的制备步骤如下：首先清洗光刻基底，其次在基底上依次制作第一掩膜层和第二掩膜层；之后将第二掩膜层上的图案通过刻蚀开孔由第二掩膜层转移至第一掩膜层，然后将剩余的第二掩膜层清洗去掉，即得所述带有盲孔的基底一侧。The preparation steps of the substrate side with blind holes are as follows: first, clean the photolithography substrate, and then make a first mask layer and a second mask layer on the substrate in sequence; then, transfer the pattern on the second mask layer from the second mask layer to the first mask layer by etching holes, and then clean and remove the remaining second mask layer to obtain the substrate side with blind holes.
所述第一掩膜为二氧化硅；第二掩膜为光刻胶；优选地，所述光刻胶为正性光刻胶。The first mask is silicon dioxide; the second mask is photoresist; preferably, the photoresist is positive photoresist.
所述第一掩膜层形成的方法为化学气相沉积法。The first mask layer is formed by chemical vapor deposition.
所述第一掩膜层的厚度为2-3um。The thickness of the first mask layer is 2-3 um.
为了说明本发明实施例中碳化硅肖特基二极管的制备方法的优势，提供如下具体的碳化硅肖特基二极管的制备方法，当然，在上述碳化硅肖特基二极管的制备方法中的其它参数组合所构成的技术方案，同样取得与下述“具体的碳化硅肖特基二极管的制备方法”相当的技术效果：In order to illustrate the advantages of the method for preparing a silicon carbide Schottky diode in an embodiment of the present invention, the following specific method for preparing a silicon carbide Schottky diode is provided. Of course, the technical solution composed of other parameter combinations in the above-mentioned method for preparing a silicon carbide Schottky diode also achieves the same technical effect as the following “specific method for preparing a silicon carbide Schottky diode”:
实施例1Example 1
本实施例提供一种碳化硅肖特基二极管的制备方法，如图2所示为碳化硅肖特基二极管制备方法的工艺流程图，该方法具体包括以下步骤：This embodiment provides a method for preparing a silicon carbide Schottky diode. FIG2 is a process flow chart of the method for preparing a silicon carbide Schottky diode. The method specifically includes the following steps:
清洗光刻：对具有碳化硅外延层3的碳化硅衬底2进行清洗，然后在碳化硅外延层3上对准光刻使用的图形并进行标记；Cleaning photolithography: cleaning the silicon carbide substrate 2 having the silicon carbide epitaxial layer 3, and then aligning and marking the pattern used for photolithography on the silicon carbide epitaxial layer 3;
制作掩膜层：在碳化硅外延层3上首先通过化学气相沉积法制作第一掩膜层二氧化硅层，所述二氧化硅层的厚度为2um；然后在第一掩膜层二氧化硅层上旋涂正性光刻胶作为第二掩膜层，进行前烘，温度为120℃，紫外光下曝光；Making a mask layer: First, a first mask layer of silicon dioxide layer is made on the silicon carbide epitaxial layer 3 by chemical vapor deposition, and the thickness of the silicon dioxide layer is 2 um; then, a positive photoresist is spin-coated on the first mask layer of silicon dioxide layer as a second mask layer, and pre-baked at a temperature of 120° C. and exposed under ultraviolet light;
光刻：对上述样品进行光刻，将图案光刻至第二掩膜层光刻胶上；Photolithography: performing photolithography on the above sample, and photolithography the pattern onto the second mask layer photoresist;
刻蚀开孔：通过刻蚀开孔将图案由第二掩膜层光刻胶转移至第一掩膜层二氧化硅上，并在碳化硅外延层3上刻蚀深度为300nm，然后用显影液将残留的光刻胶去掉，刻蚀开孔后的截面示意图如图3所示；Etching holes: The pattern is transferred from the second mask layer photoresist to the first mask layer silicon dioxide by etching holes, and the etching depth is 300nm on the silicon carbide epitaxial layer 3, and then the residual photoresist is removed with a developer. The cross-sectional schematic diagram after etching holes is shown in FIG3 ;
离子注入：对碳化硅外延层3的开孔处进行旋转角度正面多步铝离子注入，注入温度均为500℃；具体的注入步骤如下：Ion implantation: Multi-step aluminum ion implantation is performed on the opening of the silicon carbide epitaxial layer 3 at a rotation angle and the implantation temperature is 500° C. The specific implantation steps are as follows:
第一步注入的能量为500KeV，剂量为1.4E13cm-2，倾斜角β为75°，旋转角α为0°；The energy of the first step implantation is 500KeV, the dose is 1.4E13cm -2 , the tilt angle β is 75°, and the rotation angle α is 0°;
第二步注入的能量为500KeV，剂量为1.4E13cm-2，倾斜角β为75°，旋转角α为90°；The second step implantation energy is 500KeV, the dose is 1.4E13cm -2 , the tilt angle β is 75°, and the rotation angle α is 90°;
第三步注入的能量为500KeV，剂量为1.4E13cm-2，倾斜角β为75°，旋转角α为180°；The third step implantation energy is 500KeV, the dose is 1.4E13cm -2 , the tilt angle β is 75°, and the rotation angle α is 180°;
第四步注入的能量为500KeV，剂量为1.4E13cm-2，倾斜角β为75°，旋转角α为270°；In the fourth step, the implantation energy is 500 KeV, the dose is 1.4E13 cm -2 , the tilt angle β is 75°, and the rotation angle α is 270°;
第五步注入的能量为360KeV，剂量为5.5E13cm-2，倾斜角β为90°，旋转角α为0°；In the fifth step, the implantation energy is 360 KeV, the dose is 5.5E13 cm -2 , the tilt angle β is 90°, and the rotation angle α is 0°;
第六步注入的能量为250KeV，剂量为4.2E13cm-2，倾斜角β为90°，旋转角α为0°；In the sixth step, the implantation energy is 250 KeV, the dose is 4.2E13 cm -2 , the tilt angle β is 90°, and the rotation angle α is 0°;
第七步注入的能量为90KeV，剂量为8.5E13cm-2，倾斜角β为90°，旋转角α为0°；In the seventh step, the implantation energy is 90 KeV, the dose is 8.5E13 cm -2 , the tilt angle β is 90°, and the rotation angle α is 0°;
第八步注入的能量为30KeV，剂量为3.5E14cm-2，倾斜角β为90°，旋转角α为0°；In the eighth step, the implantation energy is 30 KeV, the dose is 3.5E14 cm -2 , the tilt angle β is 90°, and the rotation angle α is 0°;
其中，注入过程中面内旋转的位置示意图如图4所示；以碳化硅定位标记8为准，设定旋转角度α；碳化硅倾斜角度示意图如图5所示，设定碳化硅片与离子注入时的离子束夹角为β；旋转角度多步高温离子注入后形成的P型结边缘区的结构示意图如图6所示；传统的垂直离子注入后形成的P型结边缘区的结构示意图如图7所示。Among them, the schematic diagram of the position of the in-plane rotation during the injection process is shown in Figure 4; the rotation angle α is set based on the silicon carbide positioning mark 8; the schematic diagram of the silicon carbide tilt angle is shown in Figure 5, and the angle between the silicon carbide wafer and the ion beam during ion injection is set to β; the structural schematic diagram of the P-type junction edge area formed after multi-step high-temperature ion injection of the rotation angle is shown in Figure 6; the structural schematic diagram of the P-type junction edge area formed after traditional vertical ion injection is shown in Figure 7.
高温退火：将碳化硅衬底2的第二端面和碳化硅外延层3的第一端面分别用碳膜保护，然后在1700℃高温30分钟；High temperature annealing: the second end surface of the silicon carbide substrate 2 and the first end surface of the silicon carbide epitaxial layer 3 are protected by carbon films respectively, and then annealed at a high temperature of 1700° C. for 30 minutes;
终端区覆盖二氧化硅层：利用化学气相沉积法在碳化硅外延层3的第一端面沉积一层二氧化硅层，并通过光刻刻蚀掉不需要覆盖二氧化硅层区域的二氧化硅；The terminal area is covered with a silicon dioxide layer: a silicon dioxide layer is deposited on the first end surface of the silicon carbide epitaxial layer 3 by chemical vapor deposition, and the silicon dioxide in the area not needing to be covered with the silicon dioxide layer is etched away by photolithography;
正面金属化：将碳化硅外延层3的第一端面通过金属化形成第一电极6为P型电极6；Front metallization: The first end surface of the silicon carbide epitaxial layer 3 is metallized to form a first electrode 6 as a P-type electrode 6;
背面金属化：将碳化硅衬底2的第二端面通过金属化形成第二电极1为N型电极1；Back side metallization: the second end surface of the silicon carbide substrate 2 is metallized to form a second electrode 1 as an N-type electrode 1;
钝化层7：钝化层通过匀胶，曝光，烘烤，然后通过光刻刻蚀掉不需要覆盖钝化层区域的钝化层。Passivation layer 7: The passivation layer is coated, exposed, baked, and then the passivation layer in the area not required to be covered by the passivation layer is etched away by photolithography.
实施例2Example 2
本实施例提供一种碳化硅肖特基二极管的制备方法，如图2所示为碳化硅肖特基二极管制备方法的工艺流程图，该方法具体包括以下步骤：This embodiment provides a method for preparing a silicon carbide Schottky diode. FIG2 is a process flow chart of the method for preparing a silicon carbide Schottky diode. The method specifically includes the following steps:
清洗光刻：对具有碳化硅外延层3的碳化硅衬底2进行清洗，然后在碳化硅外延层3上对准光刻使用的图形并进行标记；Cleaning photolithography: cleaning the silicon carbide substrate 2 having the silicon carbide epitaxial layer 3, and then aligning and marking the pattern used for photolithography on the silicon carbide epitaxial layer 3;
制作掩膜层：在碳化硅外延层3上首先通过化学气相沉积法制作第一掩膜层二氧化硅层，所述二氧化硅层的厚度为2.5um；然后在第一掩膜层二氧化硅层上旋涂正性光刻胶作为第二掩膜层，进行前烘，温度为120℃，紫外光下曝光；Making a mask layer: First, a first mask layer of silicon dioxide is made on the silicon carbide epitaxial layer 3 by chemical vapor deposition, and the thickness of the silicon dioxide layer is 2.5 um; then, a positive photoresist is spin-coated on the first mask layer of silicon dioxide as a second mask layer, and pre-baked at a temperature of 120° C. and exposed under ultraviolet light;
光刻：对上述样品进行光刻，将图案光刻至第二掩膜层光刻胶上；Photolithography: performing photolithography on the above sample, and photolithography the pattern onto the second mask layer photoresist;
刻蚀开孔：通过刻蚀开孔将图案由第二掩膜层光刻胶转移至第一掩膜层二氧化硅上，并在碳化硅外延层3上刻蚀深度为400nm，然后用显影液将残留的光刻胶去掉，刻蚀开孔后的截面示意图如图3所示；Etching holes: The pattern is transferred from the second mask layer photoresist to the first mask layer silicon dioxide by etching holes, and the etching depth is 400nm on the silicon carbide epitaxial layer 3, and then the residual photoresist is removed with a developer. The cross-sectional schematic diagram after etching holes is shown in FIG3 ;
离子注入：对碳化硅外延层3的开孔处进行旋转角度正面多步铝离子注入，注入温度均为450℃；具体的注入步骤如下：Ion implantation: Multi-step aluminum ion implantation is performed on the opening of the silicon carbide epitaxial layer 3 at a rotation angle and the implantation temperature is 450° C. The specific implantation steps are as follows:
第一步注入的能量为500KeV，剂量为1.7E13cm-2，倾斜角β为75°，旋转角α为0°；The energy of the first step implantation is 500KeV, the dose is 1.7E13cm -2 , the tilt angle β is 75°, and the rotation angle α is 0°;
第二步注入的能量为500KeV，剂量为1.7E13cm-2，倾斜角β为75°，旋转角α为90°；The second step implantation energy is 500KeV, the dose is 1.7E13cm -2 , the tilt angle β is 75°, and the rotation angle α is 90°;
第三步注入的能量为500KeV，剂量为1.7E13cm-2，倾斜角β为75°，旋转角α为180°；The third step has an implantation energy of 500 KeV, a dose of 1.7E13 cm -2 , a tilt angle β of 75°, and a rotation angle α of 180°;
第四步注入的能量为500KeV，剂量为1.7E13cm-2，倾斜角β为75°，旋转角α为270°；In the fourth step, the implantation energy is 500 KeV, the dose is 1.7E13 cm -2 , the tilt angle β is 75°, and the rotation angle α is 270°;
第五步注入的能量为330KeV，剂量为4.8E13cm-2，倾斜角β为90°，旋转角α为0°；The fifth step has an implantation energy of 330 KeV, a dose of 4.8E13 cm -2 , a tilt angle β of 90°, and a rotation angle α of 0°;
第六步注入的能量为220KeV，剂量为3.0E13cm-2，倾斜角β为90°，旋转角α为0°；In the sixth step, the implantation energy is 220 KeV, the dose is 3.0E13 cm -2 , the tilt angle β is 90°, and the rotation angle α is 0°;
第七步注入的能量为100KeV，剂量为7.0E13cm-2，倾斜角β为90°，旋转角α为0°；In the seventh step, the implantation energy is 100 KeV, the dose is 7.0E13 cm -2 , the tilt angle β is 90°, and the rotation angle α is 0°;
第八步注入的能量为35KeV，剂量为1.8E14cm-2，倾斜角β为90°，旋转角α为0°；In the eighth step, the implantation energy is 35 KeV, the dose is 1.8E14 cm -2 , the tilt angle β is 90°, and the rotation angle α is 0°;
其中，注入过程中面内旋转的位置示意图如图4所示；以碳化硅定位标记8为准，设定旋转角度α；碳化硅倾斜角度示意图如图5所示，设定碳化硅片与离子注入时的离子束夹角为β；旋转角度多步高温离子注入后形成的P型结边缘区的结构示意图如图6所示；传统的垂直离子注入后形成的P型结边缘区的结构示意图如图7所示。Among them, the schematic diagram of the position of the in-plane rotation during the injection process is shown in Figure 4; the rotation angle α is set based on the silicon carbide positioning mark 8; the schematic diagram of the silicon carbide tilt angle is shown in Figure 5, and the angle between the silicon carbide wafer and the ion beam during ion injection is set to β; the structural schematic diagram of the P-type junction edge area formed after multi-step high-temperature ion injection of the rotation angle is shown in Figure 6; the structural schematic diagram of the P-type junction edge area formed after traditional vertical ion injection is shown in Figure 7.
高温退火：将碳化硅衬底2的第二端面和碳化硅外延层3的第一端面分别用碳膜保护，然后在1650℃高温30分钟；High temperature annealing: the second end surface of the silicon carbide substrate 2 and the first end surface of the silicon carbide epitaxial layer 3 are protected by carbon films respectively, and then annealed at 1650° C. for 30 minutes;
终端区覆盖二氧化硅层：利用化学气相沉积法在碳化硅外延层3的第一端面沉积一层二氧化硅层，并通过光刻刻蚀掉不需要覆盖二氧化硅层区域的二氧化硅；The terminal area is covered with a silicon dioxide layer: a silicon dioxide layer is deposited on the first end surface of the silicon carbide epitaxial layer 3 by chemical vapor deposition, and the silicon dioxide in the area not needing to be covered with the silicon dioxide layer is etched away by photolithography;
正面金属化：将碳化硅外延层3的第一端面通过金属化形成第一电极6为P型电极6；Front metallization: The first end surface of the silicon carbide epitaxial layer 3 is metallized to form a first electrode 6 as a P-type electrode 6;
背面金属化：将碳化硅衬底2的第二端面通过金属化形成第二电极1为N型电极1；Back side metallization: the second end surface of the silicon carbide substrate 2 is metallized to form a second electrode 1 as an N-type electrode 1;
钝化层7：钝化层通过匀胶，曝光，烘烤，然后通过光刻刻蚀掉不需要覆盖钝化层区域的钝化层。Passivation layer 7: The passivation layer is coated, exposed, baked, and then the passivation layer in the area not required to be covered by the passivation layer is etched away by photolithography.
实施例3Example 3
本实施例提供一种碳化硅肖特基二极管的制备方法，如图2所示为碳化硅肖特基二极管制备方法的工艺流程图，该方法具体包括以下步骤：This embodiment provides a method for preparing a silicon carbide Schottky diode. FIG2 is a process flow chart of the method for preparing a silicon carbide Schottky diode. The method specifically includes the following steps:
清洗光刻：对具有碳化硅外延层3的碳化硅衬底2进行清洗，然后在碳化硅外延层3上对准光刻使用的图形并进行标记；Cleaning photolithography: cleaning the silicon carbide substrate 2 having the silicon carbide epitaxial layer 3, and then aligning and marking the pattern used for photolithography on the silicon carbide epitaxial layer 3;
制作掩膜层：在碳化硅外延层3上首先通过化学气相沉积法制作第一掩膜层二氧化硅层，所述二氧化硅层的厚度为3um；然后在第一掩膜层二氧化硅层上旋涂正性光刻胶作为第二掩膜层，进行前烘，温度为120℃，紫外光下曝光；Making a mask layer: First, a first mask layer of silicon dioxide is made on the silicon carbide epitaxial layer 3 by chemical vapor deposition, and the thickness of the silicon dioxide layer is 3 um; then, a positive photoresist is spin-coated on the first mask layer of silicon dioxide as a second mask layer, and pre-baked at a temperature of 120° C. and exposed under ultraviolet light;
光刻：对上述样品进行光刻，将图案光刻至第二掩膜层光刻胶上；Photolithography: performing photolithography on the above sample, and photolithography the pattern onto the second mask layer photoresist;
刻蚀开孔：通过刻蚀开孔将图案由第二掩膜层光刻胶转移至第一掩膜层二氧化硅上，并在碳化硅外延层3上刻蚀深度为500nm，然后用显影液将残留的光刻胶去掉，刻蚀开孔后的截面示意图如图3所示；Etching holes: The pattern is transferred from the second mask layer photoresist to the first mask layer silicon dioxide by etching holes, and the etching depth is 500nm on the silicon carbide epitaxial layer 3, and then the residual photoresist is removed with a developer. The cross-sectional schematic diagram after etching holes is shown in FIG3 ;
离子注入：对碳化硅外延层3的开孔处进行旋转角度正面多步铝离子注入，注入温度均为550℃；具体的注入步骤如下：Ion implantation: Multi-step aluminum ion implantation is performed on the opening of the silicon carbide epitaxial layer 3 at a rotation angle and the implantation temperature is 550° C. The specific implantation steps are as follows:
第一步注入的能量为460KeV，剂量为1.5E13cm-2，倾斜角β为75°，旋转角α为0°；The energy of the first step implantation is 460KeV, the dose is 1.5E13cm -2 , the tilt angle β is 75°, and the rotation angle α is 0°;
第二步注入的能量为460KeV，剂量为1.5E13cm-2，倾斜角β为75°，旋转角α为90°；The second step implantation energy is 460KeV, the dose is 1.5E13cm -2 , the tilt angle β is 75°, and the rotation angle α is 90°;
第三步注入的能量为460KeV，剂量为1.5E13cm-2，倾斜角β为75°，旋转角α为180°；The third step has an implantation energy of 460 KeV, a dose of 1.5E13 cm -2 , a tilt angle β of 75°, and a rotation angle α of 180°;
第四步注入的能量为460KeV，剂量为1.5E13cm-2，倾斜角β为75°，旋转角α为270°；In the fourth step, the implantation energy is 460 KeV, the dose is 1.5E13 cm -2 , the tilt angle β is 75°, and the rotation angle α is 270°;
第五步注入的能量为350KeV，剂量为5.0E13cm-2，倾斜角β为90°，旋转角α为0°；In the fifth step, the implantation energy is 350 KeV, the dose is 5.0E13 cm -2 , the tilt angle β is 90°, and the rotation angle α is 0°;
第六步注入的能量为200KeV，剂量为1.5E13cm-2，倾斜角β为90°，旋转角α为0°；In the sixth step, the implantation energy is 200 KeV, the dose is 1.5E13 cm -2 , the tilt angle β is 90°, and the rotation angle α is 0°;
第七步注入的能量为70KeV，剂量为7.8E13cm-2，倾斜角β为90°，旋转角α为0°；In the seventh step, the implantation energy is 70 KeV, the dose is 7.8E13 cm -2 , the tilt angle β is 90°, and the rotation angle α is 0°;
第八步注入的能量为30KeV，剂量为1.8E14cm-2，倾斜角β为90°，旋转角α为0°；In the eighth step, the implantation energy is 30 KeV, the dose is 1.8E14 cm -2 , the tilt angle β is 90°, and the rotation angle α is 0°;
其中，注入过程中面内旋转的位置示意图如图4所示；以碳化硅定位标记8为准，设定旋转角度α；碳化硅倾斜角度示意图如图5所示，设定碳化硅片与离子注入时的离子束夹角为β；旋转角度多步高温离子注入后形成的P型结边缘区的结构示意图如图6所示；传统的垂直离子注入后形成的P型结边缘区的结构示意图如图7所示。Among them, the schematic diagram of the position of the in-plane rotation during the injection process is shown in Figure 4; the rotation angle α is set based on the silicon carbide positioning mark 8; the schematic diagram of the silicon carbide tilt angle is shown in Figure 5, and the angle between the silicon carbide wafer and the ion beam during ion injection is set to β; the structural schematic diagram of the P-type junction edge area formed after multi-step high-temperature ion injection of the rotation angle is shown in Figure 6; the structural schematic diagram of the P-type junction edge area formed after traditional vertical ion injection is shown in Figure 7.
高温退火：将碳化硅衬底2的第二端面和碳化硅外延层3的第一端面分别用碳膜保护，然后在1750℃高温30分钟；High temperature annealing: the second end surface of the silicon carbide substrate 2 and the first end surface of the silicon carbide epitaxial layer 3 are protected by carbon films respectively, and then annealed at 1750° C. for 30 minutes;
终端区覆盖二氧化硅层：利用化学气相沉积法在碳化硅外延层3的第一端面沉积一层二氧化硅层，并通过光刻刻蚀掉不需要覆盖二氧化硅层区域的二氧化硅；The terminal area is covered with a silicon dioxide layer: a silicon dioxide layer is deposited on the first end surface of the silicon carbide epitaxial layer 3 by chemical vapor deposition, and the silicon dioxide in the area not needing to be covered with the silicon dioxide layer is etched away by photolithography;
正面金属化：将碳化硅外延层3的第一端面通过金属化形成第一电极6为P型电极6；Front metallization: The first end surface of the silicon carbide epitaxial layer 3 is metallized to form a first electrode 6 as a P-type electrode 6;
背面金属化：将碳化硅衬底2的第二端面通过金属化形成第二电极1为N型电极1；Back side metallization: the second end surface of the silicon carbide substrate 2 is metallized to form a second electrode 1 as an N-type electrode 1;
钝化层7：钝化层通过匀胶，曝光，烘烤，然后通过光刻刻蚀掉不需要覆盖钝化层区域的钝化层。Passivation layer 7: The passivation layer is coated, exposed, baked, and then the passivation layer in the area not required to be covered by the passivation layer is etched away by photolithography.
对比例1Comparative Example 1
本对比例提供一种碳化硅肖特基二极管的制备方法，该方法具体包括以下步骤：This comparative example provides a method for preparing a silicon carbide Schottky diode, which specifically comprises the following steps:
清洗光刻：对具有碳化硅外延层3的碳化硅衬底2进行清洗，然后在碳化硅外延层3上对准光刻使用的图形并进行标记；Cleaning photolithography: cleaning the silicon carbide substrate 2 having the silicon carbide epitaxial layer 3, and then aligning and marking the pattern used for photolithography on the silicon carbide epitaxial layer 3;
制作掩膜层：在碳化硅外延层3上首先通过化学气相沉积法制作第一掩膜层二氧化硅层，所述二氧化硅层的厚度为2um；然后在第一掩膜层二氧化硅层上旋涂正性光刻胶作为第二掩膜层，进行前烘，温度为120℃，紫外光下曝光；Making a mask layer: First, a first mask layer of silicon dioxide layer is made on the silicon carbide epitaxial layer 3 by chemical vapor deposition, and the thickness of the silicon dioxide layer is 2 um; then, a positive photoresist is spin-coated on the first mask layer of silicon dioxide layer as a second mask layer, and pre-baked at a temperature of 120° C. and exposed under ultraviolet light;
光刻：对上述样品进行光刻，将图案光刻至第二掩膜层光刻胶上；Photolithography: performing photolithography on the above sample, and photolithography the pattern onto the second mask layer photoresist;
刻蚀开孔：通过刻蚀开孔将图案由第二掩膜层光刻胶转移至第一掩膜层二氧化硅上，并在碳化硅外延层3上刻蚀深度为400nm，然后用显影液将残留的光刻胶去掉，刻蚀开孔后的截面示意图如图3所示；Etching holes: The pattern is transferred from the second mask layer photoresist to the first mask layer silicon dioxide by etching holes, and the etching depth is 400nm on the silicon carbide epitaxial layer 3, and then the residual photoresist is removed with a developer. The cross-sectional schematic diagram after etching holes is shown in FIG3 ;
离子注入：对碳化硅外延层3的开孔处进行垂直多步铝离子注入，注入温度均为500℃；具体的注入步骤如下：Ion implantation: vertical multi-step aluminum ion implantation is performed on the opening of the silicon carbide epitaxial layer 3, and the implantation temperature is 500° C. The specific implantation steps are as follows:
第一步注入的能量为500KeV，剂量为1.4E13cm-2；The energy of the first step implantation is 500KeV and the dose is 1.4E13cm -2 ;
第二步注入的能量为500KeV，剂量为1.4E13cm-2；The energy of the second step implantation is 500KeV and the dose is 1.4E13cm -2 ;
第三步注入的能量为500KeV，剂量为1.4E13cm-2；The third step is to implant an energy of 500KeV and a dose of 1.4E13cm -2 ;
第四步注入的能量为500KeV，剂量为1.4E13cm-2；The fourth step is to implant an energy of 500 KeV and a dose of 1.4E13 cm -2 ;
第五步注入的能量为360KeV，剂量为5.5E13cm-2；The energy of the fifth step implantation is 360KeV and the dose is 5.5E13cm -2 ;
第六步注入的能量为250KeV，剂量为4.2E13cm-2；The sixth step is to implant an energy of 250 KeV and a dose of 4.2E13 cm -2 ;
第七步注入的能量为90KeV，剂量为8.5E13cm-2；The seventh step is to implant an energy of 90 KeV and a dose of 8.5E13 cm -2 ;
第八步注入的能量为30KeV，剂量为3.5E14cm-2；The energy of the eighth step is 30KeV and the dose is 3.5E14cm -2 ;
高温退火：将碳化硅衬底2的第二端面和碳化硅外延层3的第一端面分别用碳膜保护，然后在1700℃高温退火30分钟；High temperature annealing: The second end surface of the silicon carbide substrate 2 and the first end surface of the silicon carbide epitaxial layer 3 are protected by carbon films respectively, and then annealed at 1700° C. for 30 minutes;
终端区覆盖二氧化硅层：利用化学气相沉积法在碳化硅外延层3的第一端面沉积一层二氧化硅层，并通过光刻刻蚀掉不需要覆盖二氧化硅层区域的二氧化硅；The terminal area is covered with a silicon dioxide layer: a silicon dioxide layer is deposited on the first end surface of the silicon carbide epitaxial layer 3 by chemical vapor deposition, and the silicon dioxide in the area not needing to be covered with the silicon dioxide layer is etched away by photolithography;
正面金属化：将碳化硅外延层3的第一端面通过金属化形成第一电极6为P型电极6；Front metallization: The first end surface of the silicon carbide epitaxial layer 3 is metallized to form a first electrode 6 as a P-type electrode 6;
背面金属化：将碳化硅衬底2的第二端面通过金属化形成第二电极1为N型电极1；Back side metallization: the second end surface of the silicon carbide substrate 2 is metallized to form a second electrode 1 as an N-type electrode 1;
钝化层7：钝化层通过匀胶，曝光，烘烤，然后通过光刻刻蚀掉不需要覆盖钝化层区域的钝化层。Passivation layer 7: The passivation layer is coated, exposed, baked, and then the passivation layer in the area not required to be covered by the passivation layer is etched away by photolithography.
实验例Experimental example
将实施例1和对比例1制得的碳化硅肖特基二极管分别进行反向耐压性能测试，具体的检测结果如图8所示；具体的测试方法如下：The silicon carbide Schottky diodes prepared in Example 1 and Comparative Example 1 were respectively tested for reverse withstand voltage performance, and the specific test results are shown in FIG8 ; the specific test method is as follows:
采用安捷伦测试仪与探针台相结合，探针台用于固定碳化硅肖特基二极管，安捷伦测试仪设定的初始电压值为0，电压的增加频率为每测一次增加20V，测试其反向耐压值时，同时获得电流值，并以电压值为横坐标，电流值为纵坐标绘制电流-电压曲线，如图8所示。Agilent tester was combined with a probe station. The probe station was used to fix the silicon carbide Schottky diode. The initial voltage value set by the Agilent tester was 0. The voltage increase frequency was 20V per test. When testing its reverse withstand voltage value, the current value was obtained at the same time, and the current-voltage curve was plotted with the voltage value as the horizontal axis and the current value as the vertical axis, as shown in Figure 8.
由图6-8可知，通过采用旋转角度、分多步高温离子注入的方式使得连接所述第一端部和第二端部且位于P型结侧面上的连线为光滑的弧线的结构，使得注入P型结边缘的电场强度更加均匀，进一步提高碳化硅肖特基二极管芯片的反向耐压特性。As can be seen from Figures 6-8, by adopting a rotating angle and multi-step high-temperature ion implantation method, the connection line connecting the first end and the second end and located on the side of the P-type junction is made into a smooth arc structure, so that the electric field strength injected into the edge of the P-type junction is more uniform, further improving the reverse withstand voltage characteristics of the silicon carbide Schottky diode chip.
显然，上述实施例仅仅是为清楚地说明所作的举例，而并非对实施方式的限定。对于所属领域的普通技术人员来说，在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。而由此所引申出的显而易见的变化或变动仍处于本发明创造的保护范围之中。Obviously, the above embodiments are merely examples for clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived from these are still within the protection scope of the invention.
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| CN106711190A (en) * | 2017-01-24 | 2017-05-24 | 深圳基本半导体有限公司 | Semiconductor device with high performance and manufacturing method thereof |
| CN108336152A (en) * | 2018-03-20 | 2018-07-27 | 重庆大学 | Groove-shaped silicon carbide SBD device with floating junction and its manufacturing method |
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| US7368371B2 (en) * | 2006-06-16 | 2008-05-06 | Chip Integration Tech. Co., Ltd. | Silicon carbide Schottky diode and method of making the same |
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| JPH10321879A (en) * | 1997-05-22 | 1998-12-04 | Hitachi Ltd | Silicon carbide diode |
| CN102723357A (en) * | 2012-04-16 | 2012-10-10 | 中国科学院半导体研究所 | Channel-type silicon carbide Schottky diode and manufacturing method for same |
| CN103839784A (en) * | 2013-12-31 | 2014-06-04 | 北京市润大正兴电子技术有限公司 | Ion implantation mask method and silicon carbide Schottky diode manufacturing method |
| CN106711190A (en) * | 2017-01-24 | 2017-05-24 | 深圳基本半导体有限公司 | Semiconductor device with high performance and manufacturing method thereof |
| CN108336152A (en) * | 2018-03-20 | 2018-07-27 | 重庆大学 | Groove-shaped silicon carbide SBD device with floating junction and its manufacturing method |
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