CN110520964B - Silicon-based deposition for semiconductor processing - Google Patents
Silicon-based deposition for semiconductor processing Download PDFInfo
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- CN110520964B CN110520964B CN201880025529.5A CN201880025529A CN110520964B CN 110520964 B CN110520964 B CN 110520964B CN 201880025529 A CN201880025529 A CN 201880025529A CN 110520964 B CN110520964 B CN 110520964B
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/401—Oxides containing silicon
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
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- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
- C23C16/45527—Atomic layer deposition [ALD] characterized by the ALD cycle, e.g. different flows or temperatures during half-reactions, unusual pulsing sequence, use of precursor mixtures or auxiliary reactants or activations
- C23C16/45536—Use of plasma, radiation or electromagnetic fields
- C23C16/4554—Plasma being used non-continuously in between ALD reactions
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
- C23C16/45553—Atomic layer deposition [ALD] characterized by the use of precursors specially adapted for ALD
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Abstract
A method for processing a stack having a carbon-based patterned mask is provided. The stack is placed in an etching chamber. Depositing a silicon oxide layer on the carbon-based patterned mask by atomic layer deposition via providing a plurality of cycles, wherein each cycle of the plurality of cycles includes providing a silicon precursor deposition phase comprising flowing an atomic layer deposition precursor gas into the etching chamber, wherein the atomic layer deposition precursor gas is deposited while not being plasma, and stopping flow of the atomic layer deposition precursor gas, and providing an oxygen deposition phase comprising flowing ozone gas into the etching chamber, wherein the ozone gas combines with the deposited precursor gas while not being plasma, and stopping flow of the ozone gas into the etching chamber. A portion of the silicon oxide layer is etched. The stack is removed from the etching chamber.
Description
Cross Reference to Related Applications
The present application claims priority from U.S. application Ser. No.15/492,662, filed on 4/20 of 2017, which is incorporated by reference in its entirety for all purposes.
Technical Field
The present disclosure relates to a method of forming a semiconductor device on a semiconductor wafer. More particularly, the present disclosure relates to forming silicon-based deposition in the formation of semiconductor devices.
Background
In forming a semiconductor device, various layers are deposited.
Disclosure of Invention
To achieve the foregoing objects and in accordance with the purpose of the present disclosure, a method for processing a stack with a carbon-based patterned mask is provided. The stack is placed in an etching chamber. Depositing a silicon oxide layer on the carbon-based patterned mask by atomic layer deposition without depleting or attacking the carbon-based patterned mask by providing a plurality of cycles, wherein each cycle of the plurality of cycles includes providing a silicon precursor deposition phase comprising flowing an atomic layer deposition precursor gas comprising a silicon-containing component into the etching chamber, wherein the atomic layer deposition precursor gas is deposited on the carbon-based patterned mask without a plasma, and stopping the flow of the atomic layer deposition precursor gas, and providing an oxygen deposition phase comprising flowing an ozone gas into the etching chamber, wherein the ozone gas combines with the deposited precursor gas while being plasma-free, and stopping the flow of the ozone gas into the etching chamber. Etching a portion of the silicon oxide layer includes flowing a shaping gas comprising a fluorocarbon into the etching chamber, forming the shaping gas into a plasma, thereby etching the silicon oxide layer, and stopping the flow of the shaping gas. The stack is removed from the etching chamber.
In another expression, an apparatus for etching an etch layer in a stack is provided, wherein the etch layer is below a carbon-based patterned mask. A process chamber is provided. A substrate support is within the processing chamber. A gas inlet provides the process gas into the process chamber. A gas source provides the process gas to the gas inlet, wherein the gas source comprises an ozone source, an atomic layer deposition precursor silicon-containing gas source, and a shaping gas source. An exhaust pump draws gas from the process chamber. A lower electrode is disposed below the substrate support. An electrode or coil is within or near the process chamber. At least one power source provides power to the lower electrode and the electrode or coil. A controller is controllably connected to the gas source and at least one power source. The controller includes at least one processor and a computer readable medium. The computer readable medium includes computer readable code for depositing a silicon oxide layer on the carbon-based patterned mask by atomic layer deposition via providing a plurality of cycles, wherein each cycle of the plurality of cycles includes providing a silicon precursor deposition phase including flowing an atomic layer deposition precursor gas comprising a silicon-containing component into the etching chamber, wherein the atomic layer deposition precursor gas is deposited on the carbon-based patterned mask while not having a plasma, and stopping the flow of the atomic layer deposition precursor gas, and providing an oxygen deposition phase including flowing an ozone gas into the etching chamber, wherein the ozone gas combines with the deposited precursor gas while not having a plasma, and stopping the flow of the ozone gas into the etching chamber, and computer readable code for etching the silicon oxide layer, including flowing a shaping gas comprising a fluorocarbon into the etching chamber, and forming the shaping gas into the plasma, thereby etching the silicon oxide layer.
These and other features of the present invention will be described in more detail below in the detailed description of the embodiments and in conjunction with the following figures.
Drawings
The present disclosure is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:
FIG. 1 is a high-level flow diagram of an embodiment.
Fig. 2A-F are schematic cross-sectional views of a stack processed according to an embodiment.
FIG. 3 is a schematic diagram of an etching chamber that may be used in one embodiment.
FIG. 4 is a schematic diagram of a computer system that can be used to practice an embodiment.
Fig. 5 is a detailed flowchart of the deposit layer forming step.
Fig. 6 is a more detailed flow chart of the precursor deposition phase.
Fig. 7 is a more detailed flow chart of the oxygen deposition phase.
Fig. 8 is a more detailed flow chart of a step of partially etching a silicon oxide base layer.
Detailed Description
Embodiments of the present invention will now be described in detail with reference to a few preferred embodiments thereof as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without some or all of these specific details. In other instances, well known process steps and/or structures have not been described in detail in order to not unnecessarily obscure the present invention.
FIG. 1 is a high-level flow diagram of an embodiment. In this embodiment, the stack is placed in a process chamber (step 104). The carbon mask of the stack is trimmed and the BARC is etched (step 108). A silicon oxide based layer is deposited over the carbon mask by Atomic Layer Deposition (ALD) (step 112). The silicon oxide base layer is etched (step 116). The carbon mask and BARC are removed (step 120). The etch layer under the silicon oxide base layer is etched (step 124). The stack is removed from the process chamber (step 128).
Description of the embodiments
In a preferred embodiment, the stack is placed in a process chamber (step 104). Fig. 2A is a schematic cross-sectional view of a stack 200 on a substrate 204. The substrate 204 is below the etch layer 208, the etch layer 208 is below the amorphous carbon layer 212, the amorphous carbon layer 212 is below the hard mask layer 216, which in this example is silicon. The hard mask layer 216 is below the BARC layer 220, and the BARC layer 220 is below the carbon-based patterned mask layer 224. In this example, the carbon-based mask layer 224 is a photoresist. In other embodiments, there may be different, additional, or fewer layers between the layers of the stack 200. Further, various layers, such as etch layer 208, may be made of multiple layers, such as a carbon mask layer on a silicon-based layer.
Fig. 3 schematically illustrates an example of a plasma processing system 300 that may be used to process a stack 200 according to one embodiment of the invention. The plasma processing system 300 includes a plasma reactor 302, the plasma reactor 302 having a plasma processing chamber 304 surrounded by chamber walls 362. A plasma power source 306 tuned by a matching network 308 provides power to a TCP coil 310 located near a power window 312 to generate a plasma 314 in the plasma processing chamber 304 by providing inductively coupled power. The TCP coil (upper power source) 310 may be configured to create a uniform diffusion profile within the plasma processing chamber 304. For example, TCP coil 310 may be configured to generate a toroidal power distribution in plasma 314. The power window 312 is provided to separate the TCP coil 310 from the plasma processing chamber 304 while enabling energy transfer from the TCP coil 310 to the plasma processing chamber 304. A wafer bias voltage power source 316 tuned by a matching network 318 provides power to an electrode 320 to set a bias voltage on a process layer 204 supported above the electrode 320. The controller 324 sets the points for the plasma power source 306 and the wafer bias voltage power source 316.
The plasma power source 306 and the wafer bias voltage power source 316 may be configured to operate at a particular radio frequency, such as at 13.56MHz, 27MHz, 2MHz, 400kHz, or a combination thereof. The plasma power source 306 and the wafer bias voltage power source 316 may be suitably sized to provide a range of power to achieve the desired processing performance. For example, in one embodiment of the invention, the plasma power source 306 may provide power in the range of 50 to 5000 watts and the wafer bias voltage power source 316 may provide bias voltages in the range of 20 to 2000V. In addition, TCP coil 310 and/or electrode 320 may be comprised of two or more sub-coils or sub-electrodes that may be powered by a single power source or by multiple power sources.
As shown in fig. 3, the plasma processing system 300 further includes a gas source/gas supply mechanism 330. In this embodiment, the gas sources 330 include a trim gas source 350, a silicon precursor source 352, an ozone gas source 354, a forming gas source 356, a stripping gas source 358, and a feature etching gas source 360. The gas source/supply mechanism 330 provides gas to the gas feed 336 in the form of a nozzle. The process gases and byproducts are removed from the plasma processing chamber 304 by a pressure control valve 342 and a pump 344, the pressure control valve 342 and pump 344 also being used to maintain a particular pressure within the plasma processing chamber 304. The gas source/supply mechanism 330 is controlled by the controller 324. Embodiments of the invention may be implemented using Kiyo of langm research (LAM RESEARCH corp.) of friemont, california.
Fig. 4 is a high-level block diagram illustrating a computer system 400, the computer system 400 being adapted to implement the controller 324 used in embodiments. Computer systems can take many physical forms ranging from an integrated circuit, a printed circuit board, and a small handheld device to a huge super computer. Computer system 400 includes one or more processors 402 and may further include an electronic display device 404 (for displaying graphics, text, and other data), a main memory 406 (e.g., random Access Memory (RAM)), a storage device 408 (e.g., a hard drive), a removable storage device 410 (e.g., an optical disk drive), a user interface device 412 (e.g., a keyboard, touch screen, keypad, mouse, or other pointing device, etc.), and a communication interface 414 (e.g., a wireless network interface). Communication interface 414 enables software and data to be transferred between computer system 400 and external devices via a link. The system may also include a communication infrastructure 416 (e.g., a communication bus, cross-bar, or network) to which the aforementioned devices/modules are connected to the communication infrastructure 416.
The information transmitted via communication interface 414 may be in the form of signals, such as electronic, electromagnetic, optical, or other signals, capable of being received by communication interface 414 over a communication link, which carries signals and which may be implemented using wire or cable, fiber optics, a phone line, a cellular phone link, a radio frequency link, and/or other communication channels. With such a communication interface, it is contemplated that the one or more processors 402 may receive information from a network or may output information to a network in performing the above-described method steps. In addition, method embodiments may be performed solely on a processor or may be performed in conjunction with a remote processor that shares a portion of the processing over a network such as the internet.
The term "non-transitory computer readable medium" is generally used to refer to media such as main memory, secondary memory, removable storage devices, and storage devices (e.g., hard disks, flash memory, hard drive memory, CD-ROM, and other forms of persistent memory) and should not be construed to cover transitory objects such as carrier waves or signals. Examples of computer code include machine code, such as produced by a compiler, and files containing higher level code that are executed by the computer using an interpreter. The computer readable medium may also be computer code transmitted by a computer data signal embodied in a carrier wave and represented as a sequence of instructions executable by a processor.
After placing the stack 200 into the plasma processing system 300, the carbon-based mask layer 224 is trimmed and the BARC layer is etched (step 108). In this example, a trim gas comprising 50sccmN 2、15sccm O2 and 150 seem He is flowed into the plasma processing chamber, providing a pressure of 5 milliTorr. Plasma power source 306 provides 900 watts of TCP power. The BARC layer 220 may be etched before or after the trimming step. An example of BARC etching flows 15 seem O 2、5sccm CH4 and 50sscm Cl 2 of BARC etching gas into the plasma processing chamber 304 at a pressure of 8 millitorr. Plasma power source 306 provides 400 watts of TCP power. A bias voltage of 60V is provided. FIG. 2B is a cross-sectional view of the stack 200 after trimming the carbon-based mask layer 224 and etching the BARC layer 220.
A silicon oxide based layer is deposited using atomic layer deposition (step 112). Fig. 5 is a more detailed flow chart of atomic layer deposition (step 112). Atomic layer deposition (step 112) includes a plurality of cycles, wherein each cycle includes a silicon precursor deposition (adsorption) phase (step 504) and an oxygen deposition (precursor oxidation) phase (step 508). Fig. 6 is a more detailed flow chart of the precursor deposition phase (step 504). The silicon-containing precursor is introduced by vapor drawn from the vessel, which is maintained at a temperature to ensure consistent flow into the plasma processing chamber 304 (step 604). In this example, the silicon-containing precursor gas is the aminosilane BTBAS (bis (t-butylbutylamino) silane). Other precursors may also function, such as H 2Si[N(C2H5)2]2 (SAM 24). A silicon-containing precursor is deposited on the stack while plasma-free (step 608). After 4 seconds, the flow of the silicon-containing precursor is stopped (step 612). Fig. 7 is a more detailed flow chart of the oxygen deposition (SiO 2 formation) phase (step 508). Ozone gas is flowed into the plasma processing chamber 304 (step 704). In this example, >50sccm of O 3 is flowed into the process chamber 304. The pressure is maintained at >100 millitorr. Ozone gas is deposited on the stack while being plasma-free (step 708). After 2 seconds, the flow of ozone is stopped (step 712). Fig. 2C is a cross-sectional view of the stack 200 after a particular number of cycles of atomic layer deposition to deposit a silicon oxide based layer 228 to achieve a target thickness of ALD oxide.
The silicon oxide base layer 228 is partially etched or formed (step 116). Fig. 8 is a more detailed flow chart of the steps of partially etching the silicon oxide base layer 228. The forming gas is flowed into the plasma processing chamber 304 (step 804). In this example, the forming gas includes 100sccm of CF 4, 50sccm of CHF 3, and 9sccm of O 2 flowing into the process chamber 304. The pressure was maintained at 5 millitorr. A plasma is formed from the shaping gas (step 808). To form the forming gas into a plasma, 600 watts of TCP RF power was supplied at 13.56 MHz. The bias voltage was maintained at 60V. After removing SiO 2 from the horizontal portion of the SiO 2 layer at the top of the carbon line and in the space region, the flow of forming gas is stopped (step 812). Fig. 2D is a cross-sectional view of the stack 200 after the silicon oxide base layer 228 has been etched or formed (step 120). As shown, the horizontal surfaces of the silicon oxide-based layer 228 are etched away, exposing the carbon-based mask layer 224. The remaining silicon oxide based layer 228 forms sidewall spacers on the sides of the carbon based mask layer 224.
The carbon mask is removed or stripped (step 120). In this example, the process conditions provide a mask stripping gas of 150 seem O 2 and 150 seem Ar at a chamber pressure of 10 millitorr. The mask stripping gas was formed into a plasma by providing 600 watts of TCP power. Fig. 2E is a cross-sectional view of the stack 200 after removal of the carbon-based mask layer. In this embodiment, the stripping of the carbon mask layer also removes the remaining BARC layer. The remaining silicon oxide based layer 228 provides a pattern having a density twice that of the carbon mask.
Amorphous carbon layer 212 and hard mask layer 216 may be etched in-situ after the carbon mask is stripped. An example of a Si (layer 216) etching process provides a Si etching gas of 50 seem CF 4 and 50 seem Ar at a pressure of 5 millitorr. The Si etching gas was formed into a plasma by providing a 500 watt TCP power source with a 100V bias voltage. An example of a method of etching a-C (layer 212) provides an amorphous carbon etch gas of 80 seem SO 2 and 90 seem O 2 at a pressure of 8 millitorr. The amorphous carbon etch gas was formed into a plasma by providing a TCP power of 800 watts and a bias voltage of 350V. The recipe for etching the etch layer 208 (in this example, a Si film) is 500sccm HBr,500sccm He,15sccm O 2 at a pressure of 25 millitorr, a TCP power of 350W, and a bias voltage of 300V. Etch layer 208 is etched (step 124). Fig. 2E is a cross-sectional view of stack 200 after etching the etch layer.
The resulting stack has features etched in the etch layer 208 that are twice as dense as the original pattern of the carbon-based mask layer. The method and apparatus enable ALD and etching for feature doubling and etching to be performed in the same process chamber on the same chuck without moving the stack.
Typically, fluorocarbon gases such as CF 4 may be used to partially etch the silicon oxide base layer. In various embodiments, the carbon-based layer may be amorphous carbon, an organic material, or a photoresist.
In various embodiments, the etch layer 208 may comprise a plurality of layers including another carbon-based layer. The silicon oxide-based layer 228 may be used as a mask for etching the carbon-based layer. The silicon oxide based layer 228 may be removed and another silicon oxide based layer may be provided by ALD. The silicon oxide layer may be partially etched and the carbon-based layer removed, providing a patterned mask having a density four times that of the original pattern. Such a subsequent ALD process may use a plasma for ALD. The apparatus is capable of providing plasma-free ALD and ALD with plasma.
While this invention has been described in terms of several preferred embodiments, there are alterations, modifications, permutations, and various substitute equivalents, which fall within the scope of this invention. It should also be noted that there are many alternative ways of implementing the methods and apparatuses of the present invention. It is therefore intended that the following appended claims be interpreted as including all such alterations, modifications, permutations, and various substitute equivalents as fall within the true spirit and scope of the present invention.
Claims (20)
1. A method for in situ processing a stack having a carbon-based patterned mask, comprising:
placing the stack in an etching chamber;
Depositing a silicon oxide layer on the carbon-based patterned mask by atomic layer deposition without consuming or attacking the carbon-based patterned mask by providing a plurality of cycles, wherein each cycle of the plurality of cycles comprises:
Providing a silicon precursor deposition phase comprising:
Flowing an atomic layer deposition precursor gas comprising a silicon-containing component into the etching chamber, wherein the atomic layer deposition precursor gas is deposited on the carbon-based patterned mask without a plasma, and
Stopping the flow of the atomic layer deposition precursor gas, and
Providing an oxygen deposition phase comprising:
flowing only an oxygen deposition gas consisting essentially of an ozone gas into the etching chamber, wherein the ozone gas combines with the deposited precursor gas while being free of plasma, and stopping the flow of the oxygen deposition gas into the etching chamber;
etching a portion of the silicon oxide layer, comprising:
Flowing a forming gas comprising a fluorocarbon into the etching chamber;
Forming the shaping gas into plasma to etch the silicon oxide layer, and
Stopping the flow of the forming gas, and
The stack is removed from the etching chamber.
2. The method of claim 1, further comprising trimming the carbon-based patterned mask after placing the stack in the etch chamber and before depositing the silicon oxide layer over the carbon-based patterned mask.
3. The method of claim 2, further comprising:
Stripping the carbon-based patterned mask after etching the silicon oxide layer, and
An etch layer under the silicon oxide layer is etched after stripping the carbon-based patterned mask and before removing the stack from the etch chamber.
4. The method of claim 3, wherein the carbon-based patterned mask comprises at least one of amorphous carbon, an organic material, or a photoresist.
5. The method of claim 4, wherein a BARC layer is below the carbon-based patterned mask, further comprising etching the BARC layer prior to depositing the silicon oxide layer over the carbon-based patterned mask.
6. The method of claim 5, wherein the silicon-containing component of the atomic layer deposition precursor gas is an aminosilane BTBAS (bis (t-butylamino) silane) or H 2Si[N(C2H5)2]2.
7. The method of claim 6, wherein the flow of ozone gas into the etching chamber provides a pressure greater than 100 mtorr.
8. The method of claim 1, further comprising:
Stripping the carbon-based patterned mask after etching the silicon oxide layer, and
An etch layer under the silicon oxide layer is etched after stripping the carbon-based patterned mask and before removing the stack from the etch chamber.
9. The method of claim 1, wherein the carbon-based patterned mask comprises at least one of amorphous carbon, an organic material, or a photoresist.
10. The method of claim 1, wherein a BARC layer is below the carbon-based patterned mask, further comprising etching the BARC layer prior to depositing the silicon oxide layer over the carbon-based patterned mask.
11. The method of claim 1, wherein the silicon-containing component of the atomic layer deposition precursor gas is an aminosilane BTBAS (bis (t-butylamino) silane) or H 2Si[N(C2H5)2]2.
12. The method of claim 1, wherein the flow of ozone gas into the etching chamber provides a pressure of greater than 100 mtorr.
13. The method of claim 5, wherein the silicon-containing component of the atomic layer deposition precursor gas is H 2Si[N(C2H5)2]2.
14. The method of claim 1, wherein the carbon-based patterned mask comprises a photoresist.
15. An apparatus for etching an etch layer in a stack, wherein the etch layer is below a carbon-based patterned mask, the apparatus comprising:
A processing chamber;
A substrate support within the processing chamber;
A gas inlet for providing a process gas into the process chamber;
a gas source for providing the process gas to the gas inlet, wherein the gas source comprises:
an ozone source;
a source of atomic layer deposition precursor silicon-containing gas, and
A forming gas source;
a discharge pump for pumping gas from the process chamber;
A lower electrode;
An electrode or coil;
at least one power source for providing power to the lower electrode and the electrode or coil, and
A controller controllably connected to the gas source and at least one power source, wherein the controller comprises:
At least one processor, and
A computer-readable medium, comprising:
computer readable code for depositing a silicon oxide layer on the carbon-based patterned mask by atomic layer deposition by providing a plurality of cycles, wherein each cycle of the plurality of cycles comprises:
Providing a silicon precursor deposition phase comprising:
Flowing an atomic layer deposition precursor gas comprising a silicon-containing component into the process chamber, wherein the atomic layer deposition precursor gas is deposited on the carbon-based patterned mask without a plasma, and
Stopping the flow of the atomic layer deposition precursor gas, and
Providing an oxygen deposition phase comprising:
Flowing only an oxygen deposition gas consisting essentially of an ozone gas into the process chamber, wherein the ozone gas combines with the precursor gas being deposited while being free of plasma, and
Stopping the flow of the oxygen deposition gas into the process chamber, and
Computer readable code for causing the silicon oxide layer to be etched by:
flowing a forming gas comprising a fluorocarbon into the process chamber, and
The shaping gas is formed into a plasma, thereby etching the silicon oxide layer.
16. The apparatus of claim 15, wherein the gas source further comprises:
a source of trim gas;
A stripping gas source, and
A source of feature etching gas.
17. The apparatus of claim 16, wherein the computer-readable medium further comprises:
Computer readable code for trimming the carbon-based patterned mask prior to depositing the atomic layer deposition, comprising:
Computer readable code for flowing a conditioning gas from the conditioning gas source into the process chamber;
computer readable code for providing power to the electrode or coil to convert the trimming gas into a plasma, resulting in the trimming of the carbon-based patterned mask, and
Computer readable code for stopping the flow of the stripping gas, and
Computer readable code for stripping the carbon-based patterned mask after etching the silicon oxide layer, comprising:
Computer readable code for flowing a stripping gas from the stripping gas source into the process chamber;
Computer readable code for providing power to the electrode or coil to convert the stripping gas into a plasma, resulting in the stripping of the carbon-based patterned mask, and
Computer readable code for stopping the flow of the stripping gas, and
Computer readable code for etching the etch layer after stripping the carbon-based patterned mask, comprising:
Computer readable code for flowing a feature etching gas from the feature etching gas source into the process chamber;
Computer readable code for providing power to the electrode or coil to convert the feature etching gas into a plasma resulting in etching of the etch layer, and
Computer readable code for stopping the flow of the feature etching gas.
18. The apparatus of claim 17, wherein the atomic layer deposition precursor silicon-containing gas source provides an aminosilane BTBAS (bis (t-butylamino) silane) or H 2Si[N(C2H5)2]2.
19. The apparatus of claim 18, wherein a BARC layer is below the carbon-based patterned mask, further comprising computer readable code for etching the BARC layer prior to depositing the silicon oxide layer over the carbon-based patterned mask.
20. The apparatus of claim 17, wherein the atomic layer deposition precursor silicon-containing gas source provides H 2Si[N(C2H5)2]2.
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| US8501637B2 (en) * | 2007-12-21 | 2013-08-06 | Asm International N.V. | Silicon dioxide thin films by ALD |
| US8197915B2 (en) * | 2009-04-01 | 2012-06-12 | Asm Japan K.K. | Method of depositing silicon oxide film by plasma enhanced atomic layer deposition at low temperature |
| US8574447B2 (en) * | 2010-03-31 | 2013-11-05 | Lam Research Corporation | Inorganic rapid alternating process for silicon etch |
| US9390909B2 (en) * | 2013-11-07 | 2016-07-12 | Novellus Systems, Inc. | Soft landing nanolaminates for advanced patterning |
| WO2012165166A1 (en) * | 2011-06-03 | 2012-12-06 | 株式会社日立国際電気 | Method for manufacturing semiconductor device, substrate processing method, and substrate processing apparatus |
| US20130217240A1 (en) * | 2011-09-09 | 2013-08-22 | Applied Materials, Inc. | Flowable silicon-carbon-nitrogen layers for semiconductor processing |
| JP6040609B2 (en) * | 2012-07-20 | 2016-12-07 | 東京エレクトロン株式会社 | Film forming apparatus and film forming method |
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| US9875888B2 (en) * | 2014-10-03 | 2018-01-23 | Applied Materials, Inc. | High temperature silicon oxide atomic layer deposition technology |
| TWI693295B (en) * | 2015-02-06 | 2020-05-11 | 美商諾發系統有限公司 | Conformal deposition of silicon carbide films |
| US9711359B2 (en) * | 2015-08-13 | 2017-07-18 | Lam Research Corporation | Shadow trim line edge roughness reduction |
| US9972502B2 (en) * | 2015-09-11 | 2018-05-15 | Lam Research Corporation | Systems and methods for performing in-situ deposition of sidewall image transfer spacers |
| US9824893B1 (en) * | 2016-06-28 | 2017-11-21 | Lam Research Corporation | Tin oxide thin film spacers in semiconductor device manufacturing |
| US10629435B2 (en) * | 2016-07-29 | 2020-04-21 | Lam Research Corporation | Doped ALD films for semiconductor patterning applications |
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