CN110502056A - A kind of threshold voltage reference circuit - Google Patents
A kind of threshold voltage reference circuit Download PDFInfo
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- CN110502056A CN110502056A CN201910775979.2A CN201910775979A CN110502056A CN 110502056 A CN110502056 A CN 110502056A CN 201910775979 A CN201910775979 A CN 201910775979A CN 110502056 A CN110502056 A CN 110502056A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
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Abstract
The present invention relates to a kind of threshold voltage reference circuits, including current source module, CTAT voltage generation module and reference voltage output module.By CTAT voltage generation module using the voltage being negatively correlated with temperature as the input of reference voltage output module, reference voltage output module is positively correlated itself with temperature, two voltages pass through reference voltage output module output voltage a reference value, pass through the size of adjusting metal-oxide-semiconductor simultaneously, to adjust the temperature coefficient of voltage reference circuit, solves the deficiency that existing band-gap reference circuit needs amplifier to carry out clamper, in the case where not needing using amplifier pair, make operating voltage in 0.8V, power consumption compared to the work of traditional benchmark source is only 36 nanowatts, it is able to achieve lower power consumption, reliable and stable reference voltage source can be provided for the aerospace electronic product of low-power consumption, the nanowatt of overall power consumption, well below the power consumption of traditional band-gap reference.
Description
Technical field
The invention belongs to technical field of integrated circuits more particularly to a kind of threshold voltage reference circuits.
Background technique
Voltage reference circuit be include a part indispensable in the electronic systems such as Aeronautics and Astronautics, voltage reference circuit
It is minimum, the high potential circuit of stability, precision that can export a temperature drift, temperature drift is minimum to refer to that voltage reference circuit generates
Voltage not variation with temperature and change, traditional band-gap reference is most widely used, but needs amplifier to realize electricity
The clamper of pressure causes overall power consumption larger.
Summary of the invention
It is an object of the invention to overcome the above-mentioned problems in the prior art, a kind of threshold voltage benchmark electricity is provided
Road can not need amplifier, and overall power consumption is only several nanowatts, well below the power consumption of traditional band-gap reference.
To achieve the above object, the technical solution adopted by the present invention is as follows.
A kind of threshold voltage reference circuit, it is characterised in that: including current source module, CTAT voltage generation module and benchmark
Voltage output module；
The current source module includes the first PMOS tube, the second PMOS tube, the first NMOS tube, the second NMOS tube and resistance R；
First PMOS tube is connected with the source electrode of the second PMOS tube and is connected to supply voltage VDD, and the grid leak of second PMOS tube is short
The grid of the first PMOS tube and the drain electrode of the second NMOS tube are connect and connect, the grid leak of second PMOS tube is shorted and connects first
The drain electrode of PMOS tube and output bias voltage VB1 as reference circuit；The grid leak of first PMOS tube is shorted and connects
The drain electrode of one PMOS tube and the grid of the second NMOS tube；One end of the resistance R is grounded after connecting with the source electrode of the first NMOS tube,
The other end is connect with the source electrode of the second PMOS tube；
The CTAT voltage generation module includes third NMOS tube and third PMOS tube, and the grid of the third PMOS tube connects
Output bias voltage VB1 is met, source electrode connects supply voltage VDD；The third NMOS tube grid leak is shorted and connects third PMOS tube
Drain electrode, and the output voltage V as reference circuitCTAT, the source electrode ground connection of the third PMOS tube (MP3)；
The reference voltage output module include the 4th NMOS tube, the 5th NMOS tube, the 6th NMOS tube, the 7th NMOS tube,
4th PMOS tube, the 5th PMOS tube, the 6th PMOS tube, the 7th PMOS tube, the 8th PMOS tube and the 9th PMOS tube, the described 4th
NMOS tube is connected with the grid of the 5th NMOS tube and connects output bias voltage VB1, the 4th NMOS tube and the 5th NMOS tube
Source electrode be connected and connect supply voltage VDD, the drain electrode of the 4th NMOS tube respectively with the 6th PMOS tube and the 7th PMOS tube
Source electrode connection, the drain electrode of the 5th NMOS tube connect with the source electrode of the 8th PMOS tube and the 9th PMOS tube respectively, described the
The grid of six PMOS tube connects output voltage VCTAT, the grid leak of the 4th PMOS tube is shorted and connects the drain electrode of the 6th PMOS tube
It is shorted with the grid leak of the grid of the 5th NMOS tube, the 7th PMOS tube and connects the grid and the 5th NMOS tube of the 8th PMOS tube
Drain electrode, the 4th NMOS tube is grounded after connecting with the source electrode of the 5th NMOS tube, and the grid leak of the 6th NMOS tube is shorted simultaneously
The drain electrode and the grid of the 7th NMOS tube, the grid leak of the 9th PMOS tube for connecting the 8th PMOS tube are shorted and connect the 7th NMOS
Pipe drain electrode and and the outputting reference voltage VREF as reference circuit, the source electrode phase of the 6th NMOS tube and the 7th NMOS tube
It is grounded after even.
All pipes work in pressure threshold zone.
The current source module is used for output bias current.
The middle switching tube of the third NMOS tube and current source module constitutes current mirror.
The middle switching tube of 4th NMOS tube and the 5th NMOS tube and current source module constitutes current mirror.
The voltage reference circuit is fabricated to integrated circuit using standard CMOS process.
The output voltage VCTATFormula it is as follows:
Wherein, m is the sub-threshold slope factor, VTIt is thermal voltage, μnIt is electron mobility, CoxFor gate oxidation capacitance, it is
The multiple of electric current and bias current that third PMOS tube MP3 is provided, (W/L)N3For the breadth length ratio of third NMOS tube MN3.
The formula of the reference voltage VREF is as follows:
Wherein, (W/L)N4、(W/L)N5、(W/L)N6、(W/L)N7、(W/L)P6、(W/L)P7、(W/L)P8、(W/L)P9Respectively
4th NMOS tube MN4, the 5th NMOS tube MN5, the 6th NMOS tube MN6, the 7th NMOS tube MN7, the 6th PMOS tube MP6, the 7th
The breadth length ratio of PMOS tube MP7, the 8th PMOS tube MP8, the 9th PMOS tube MP9；By the 4th NMOS tube MN4 and the 6th NMOS tube MN6,
5th NMOS tube MN5 and the 7th NMOS tube MN7, the 6th PMOS tube MP6 and the 8th PMOS tube MP8, the 7th PMOS tube MP7 and the 9th
PMOS tube MP9 takes identical breadth length ratio respectively；
Formula is then further simplified to obtain:
Using the advantage of the invention is that.
1, by CTAT voltage generation module using the voltage being negatively correlated with temperature as the defeated of reference voltage output module
Enter, reference voltage output module is positively correlated itself with temperature, and two voltages pass through reference voltage output module output voltage base
Quasi- value, while the size by adjusting metal-oxide-semiconductor solves existing band-gap reference to adjust the temperature coefficient of voltage reference circuit
The deficiency that circuit needs amplifier to carry out clamper makes operating voltage in 0.8V, phase in the case where not needing using amplifier pair
Power consumption than the work of traditional benchmark source is only 36 nanowatts, is able to achieve lower power consumption, can be produced for the aerospace electronics of low-power consumption
Product provide reliable and stable reference voltage source, the nanowatt of overall power consumption, well below the power consumption of traditional band-gap reference.
2, current mirror is constituted by the middle switching tube of third NMOS tube and current source module, be used for the bias current mirror
The branch as where to third PMOS tube.
3, current mirror is constituted by the middle switching tube of the 4th NMOS tube and the 5th NMOS tube and current source module, be used for institute
It states bias current and is mirrored to branch where the 4th PMOS tube and the 5th PMOS tube.
4, extremely low by CMOS technology quiescent dissipation, every gate power dissipation Da Nawa magnitude.
Detailed description of the invention
Fig. 1 be Hspice of the invention emulate Fig. 1 is circuit diagram of the invention.
Fig. 2 is circuit overall structure block diagram of the invention.
Fig. 3 is the circuit structure diagram of current source module in Fig. 1.
Fig. 4 is the circuit structure diagram of CTAT voltage generation module in Fig. 1.
Fig. 5 is the circuit structure diagram of reference voltage output module in Fig. 1.
Fig. 6 is the analogous diagram that the present invention is emulated by Hspice.
Marked in the figure: MN1, the first NMOS tube, MN2, the second NMOS tube, MN3, third NMOS tube, MN4, the 4th NMOS tube,
MN5, the 5th NMOS tube, MN6, the 6th NMOS tube, MN7, the 7th NMOS tube, MP1, the first PMOS tube, MP2, the second PMOS tube,
MP3, third PMOS tube, MP4, the 4th PMOS tube, MP5, the 5th PMOS tube, MP6, the 6th PMOS tube, MP7, the 7th PMOS tube,
MP8, the 8th PMOS tube, MP9, the 9th PMOS tube.
Specific embodiment
Following further describes the present invention with reference to the drawings.
Embodiment 1
As shown in Fig. 1 to 5, a kind of threshold voltage reference circuit, including current source module, CTAT voltage generation module and base
Quasi- voltage output module；
The current source module includes the first PMOS tube MP1, the second PMOS tube MP2, the first NMOS tube MN1, the 2nd NMOS
Pipe MN2 and resistance R；The first PMOS tube MP1 is connected with the source electrode of the second PMOS tube MP2 and is connected to supply voltage VDD, described
The grid leak of second PMOS tube MP2 is shorted and connects the drain electrode of the grid and the second NMOS tube MN2 of the first PMOS tube MP1, and described
The grid leak of two PMOS tube MP2 is shorted and connects the drain electrode of the first PMOS tube MP1 and the output bias voltage as reference circuit
VB1；The grid leak of the first PMOS tube MP1 is shorted and connects drain electrode and the grid of the second NMOS tube MN2 of the first PMOS tube MP1
Pole；One end of the resistance R is grounded after connecting with the source electrode of the first NMOS tube MN1, the source electrode of the other end and the second PMOS tube MP2
Connection；
The CTAT voltage generation module includes third NMOS tube MN3 and third PMOS tube MP3, the third PMOS tube
The grid connection output bias voltage VB1 of MP3, source electrode connect supply voltage VDD；The third NMOS tube MN3 grid leak is shorted simultaneously
Connect the drain electrode of third PMOS tube MP3, and the output voltage V as reference circuitCTAT, the source electrode of the third PMOS tube MP3
Ground connection；
The reference voltage output module includes the 4th NMOS tube MN4, the 5th NMOS tube MN5, the 6th NMOS tube MN6, the
Seven NMOS tube MN 7, the 4th PMOS tube MP4, the 5th PMOS tube MP5, the 6th PMOS tube MP6, the 7th PMOS tube 7, the 8th PMOS tube
The grid of MP8 and the 9th PMOS tube MP9, the 4th NMOS tube MN4 and the 5th NMOS tube MN5 are connected and connect output biased electrical
VB1 is pressed, the source electrode of the 4th NMOS tube MN4 and the 5th NMOS tube MN5 is connected and connects supply voltage VDD, and the described 4th
The drain electrode of NMOS tube MN4 is connect with the source electrode of the 6th PMOS tube MP6 and the 7th PMOS tube MP 7 respectively, the 5th NMOS tube
The drain electrode of MN5 is connect with the source electrode of the 8th PMOS tube MP8 and the 9th PMOS tube MP9 respectively, the grid of the 6th PMOS tube MP6
Connect output voltage VCTAT, the grid leak of the 4th PMOS tube MP4 is shorted and connects the drain electrode and the 5th of the 6th PMOS tube MP6
The grid leak of the grid of NMOS tube MN5, the 7th PMOS tube MP 7 is shorted and connects the grid and the 5th of the 8th PMOS tube MP8
The drain electrode of NMOS tube MN5, the 4th NMOS tube MN4 are grounded after connecting with the source electrode of the 5th NMOS tube MN5, the 6th NMOS
The grid leak of pipe MN6 is shorted and connects drain electrode and the grid of the 7th NMOS tube MN 7 of the 8th PMOS tube MP8, the 9th PMOS tube
The grid leak of MP9 be shorted and connect the 7th NMOS tube MN 7 drain electrode and and the outputting reference voltage VREF as reference circuit, institute
State the 6th NMOS tube MN6 and the 7th NMOS tube MN7 source electrode be connected after be grounded.
By CTAT voltage generation module using the voltage being negatively correlated with temperature as the input of reference voltage output module,
Reference voltage output module is positively correlated itself with temperature, and two voltages pass through reference voltage output module output voltage benchmark
Value, while the size by adjusting metal-oxide-semiconductor solve existing band-gap reference electricity to adjust the temperature coefficient of voltage reference circuit
The deficiency that road needs amplifier to carry out clamper makes operating voltage in 0.8V, compares in the case where not needing using amplifier pair
The power consumption of traditional benchmark source work is only 36 nanowatts, is able to achieve lower power consumption, can be the aerospace electronic product of low-power consumption
Reliable and stable reference voltage source, the nanowatt of overall power consumption, well below the power consumption of traditional band-gap reference are provided.
Embodiment 2
As shown in Fig. 1 to 5, a kind of threshold voltage reference circuit, including current source module, CTAT voltage generation module and base
Quasi- voltage output module；
The current source module includes the first PMOS tube MP1, the second PMOS tube MP2, the first NMOS tube MN1, the 2nd NMOS
Pipe MN2 and resistance R；The first PMOS tube MP1 is connected with the source electrode of the second PMOS tube MP2 and is connected to supply voltage VDD, described
The grid leak of second PMOS tube MP2 is shorted and connects the drain electrode of the grid and the second NMOS tube MN2 of the first PMOS tube MP1, and described
The grid leak of two PMOS tube MP2 is shorted and connects the drain electrode of the first PMOS tube MP1 and the output bias voltage as reference circuit
VB1；The grid leak of the first PMOS tube MP1 is shorted and connects drain electrode and the grid of the second NMOS tube MN2 of the first PMOS tube MP1
Pole；One end of the resistance R is grounded after connecting with the source electrode of the first NMOS tube MN1, the source electrode of the other end and the second PMOS tube MP2
Connection；
The CTAT voltage generation module includes third NMOS tube MN3 and third PMOS tube MP3, the third PMOS tube
The grid connection output bias voltage VB1 of MP3, source electrode connect supply voltage VDD；The third NMOS tube MN3 grid leak is shorted simultaneously
Connect the drain electrode of third PMOS tube MP3, and the output voltage V as reference circuitCTAT, the source electrode of the third PMOS tube MP3
Ground connection；
Third PMOS tube MP3 is VTH, third NMOS tube for providing electric current, its threshold voltage of third NMOS tube MN3
MN3 works in sub-threshold region, grid source output voltageTVCTATFormula it is as follows:
Wherein, m is the sub-threshold slope factor, VTIt is thermal voltage, μnIt is electron mobility, CoxFor gate oxidation capacitance, it is
The multiple of electric current and bias current that third PMOS tube MP3 is provided, (W/L)N3For the breadth length ratio of third NMOS tube MN3.
The reference voltage output module includes the 4th NMOS tube MN4, the 5th NMOS tube MN5, the 6th NMOS tube MN6, the
Seven NMOS tube MN 7, the 4th PMOS tube MP4, the 5th PMOS tube MP5, the 6th PMOS tube MP6, the 7th PMOS tube 7, the 8th PMOS tube
The grid of MP8 and the 9th PMOS tube MP9, the 4th NMOS tube MN4 and the 5th NMOS tube MN5 are connected and connect output biased electrical
VB1 is pressed, the source electrode of the 4th NMOS tube MN4 and the 5th NMOS tube MN5 is connected and connects supply voltage VDD, and the described 4th
The drain electrode of NMOS tube MN4 is connect with the source electrode of the 6th PMOS tube MP6 and the 7th PMOS tube MP 7 respectively, the 5th NMOS tube
The drain electrode of MN5 is connect with the source electrode of the 8th PMOS tube MP8 and the 9th PMOS tube MP9 respectively, the grid of the 6th PMOS tube MP6
Connect output voltage VCTAT, the grid leak of the 4th PMOS tube MP4 is shorted and connects the drain electrode and the 5th of the 6th PMOS tube MP6
The grid leak of the grid of NMOS tube MN5, the 7th PMOS tube MP 7 is shorted and connects the grid and the 5th of the 8th PMOS tube (MP8)
The drain electrode of NMOS tube MN5, the 4th NMOS tube MN4 are grounded after connecting with the source electrode of the 5th NMOS tube MN5, the 6th NMOS
The grid leak of pipe MN6 is shorted and connects drain electrode and the grid of the 7th NMOS tube MN 7 of the 8th PMOS tube MP8, the 9th PMOS tube
The grid leak of MP9 be shorted and connect the 7th NMOS tube MN 7 drain electrode and and the outputting reference voltage VREF as reference circuit, institute
State the 6th NMOS tube MN6 and the 7th NMOS tube MN7 source electrode be connected after be grounded；
The formula of the reference voltage VREF is as follows:
Wherein, (W/L)N4、(W/L)N5、(W/L)N6、(W/L)N7、(W/L)P6、(W/L)P7、(W/L)P8、(W/L)P9Respectively
4th NMOS tube MN4, the 5th NMOS tube MN5, the 6th NMOS tube MN6, the 7th NMOS tube MN7, the 6th PMOS tube MP6, the 7th
The breadth length ratio of PMOS tube MP7, the 8th PMOS tube MP8, the 9th PMOS tube MP9；By the 4th NMOS tube MN4 and the 6th NMOS tube MN6,
5th NMOS tube MN5 and the 7th NMOS tube MN7, the 6th PMOS tube MP6 and the 8th PMOS tube MP8, the 7th PMOS tube MP7 and the 9th
PMOS tube MP9 takes identical breadth length ratio respectively；
Formula is then further simplified to obtain:
All pipes work in pressure threshold zone.
The current source module is used for I bias of output bias current.
The third NMOS tube MN3 and the middle switching tube of current source module constitute current mirror.
The 4th NMOS tube MN4 and the 5th NMOS tube MN5 and the middle switching tube of current source module constitute current mirror.
The voltage reference circuit is fabricated to integrated circuit using standard CMOS process.
By CTAT voltage generation module using the voltage being negatively correlated with temperature as the input of reference voltage output module,
Reference voltage output module is positively correlated itself with temperature, and two voltages pass through reference voltage output module output voltage benchmark
Value, while the size by adjusting metal-oxide-semiconductor solve existing band-gap reference electricity to adjust the temperature coefficient of voltage reference circuit
The deficiency that road needs amplifier to carry out clamper makes operating voltage in 0.8V, compares in the case where not needing using amplifier pair
The power consumption of traditional benchmark source work is only 36 nanowatts, is able to achieve lower power consumption, can be the aerospace electronic product of low-power consumption
Reliable and stable reference voltage source, the nanowatt of overall power consumption, well below the power consumption of traditional band-gap reference are provided.
Current mirror is constituted by third NMOS tube MN3 and the middle switching tube of current source module, is used for the bias current
Branch where being mirrored to third PMOS tube MN3.
Current mirror is constituted by the 4th NMOS tube MP4 and the 5th NMOS tube MP5 and the middle switching tube of current source module, is used for
Branch where the bias current is mirrored to the 4th PMOS tube MP4 and the 5th PMOS tube MP5.
It is extremely low by CMOS technology quiescent dissipation, every gate power dissipation Da Nawa magnitude.
First derivative, while the size by adjusting metal-oxide-semiconductor are asked to above formula, to adjust the temperature system of voltage reference circuit
Number, can be obtained temperature-independent voltage.
A kind of low-power consumption threshold voltage reference circuit proposed by the invention emulates to obtain as shown in Figure 6 by Hspice
Analogous diagram, emulation shows in temperature range from -25 DEG C to 85 DEG C, the benchmark electricity generated under standard technology angle (tt corner)
Pressing VREF temperature coefficient is only 34.6ppm/ DEG C.In typical case (tt corner, 27 DEG C), supply voltage VDD=0.8V, always
Current drain be 45nA, total power consumption 36nW.It can be seen that the present invention in the case where not needing using amplifier pair, makes work electric
It is pressed in 0.8V, the power consumption compared to the work of traditional benchmark source is only 36 nanowatts, is able to achieve lower power consumption, can be the aviation of low-power consumption
Aerospace electron product provides reliable and stable reference voltage source.
Start-up circuit module, current source module, high-low voltage generation module and double N tube voltage difference blocks, start-up circuit
Module makes the voltage reference circuit be detached from nought state when power supply is established, in start completion backed off after random；Current source module is used for
Generate I bias of bias current；High-low voltage generation module is for generating a high voltage and a low-voltage；Utilize double N pipe electricity
Pressure difference sub-module exports the difference of high voltage and low-voltage, as reference voltage, while the size by adjusting metal-oxide-semiconductor, to adjust
The temperature coefficient of whole voltage reference circuit.A kind of voltage reference circuit of ultralow pressure super low-power consumption proposed by the present invention, solves
Existing band-gap reference circuit inoperable problem when supply voltage is lower than 0.7V cut-in voltage, can work in lower electricity
Under the voltage of source；And power consumption of the invention is only a few nanowatts, well below the power consumption of traditional band-gap reference.
The specific embodiment of the application above described embodiment only expresses, the description thereof is more specific and detailed, but simultaneously
The limitation to the application protection scope therefore cannot be interpreted as.It should be pointed out that for those of ordinary skill in the art
For, under the premise of not departing from technical scheme design, various modifications and improvements can be made, these belong to this
The protection scope of application.
Claims (8)
1. a kind of threshold voltage reference circuit, it is characterised in that: including current source module, CTAT voltage generation module and benchmark electricity
Press output module；
The current source module includes the first PMOS tube (MP1), the second PMOS tube (MP2), the first NMOS tube (MN1), second
NMOS tube (MN2) and resistance R；First PMOS tube (MP1) is connected with the source electrode of the second PMOS tube (MP2) and is connected to power supply electricity
VDD is pressed, the grid leak of second PMOS tube (MP2) is shorted and connects the grid and the second NMOS tube of the first PMOS tube (MP1)
(MN2) grid leak of drain electrode, second PMOS tube (MP2) is shorted and connects the drain electrode of the first PMOS tube (MP1) and as base
The output bias voltage VB1 of quasi- circuit；The grid leak of first PMOS tube (MP1) is shorted and connects the first PMOS tube (MP1)
The grid of drain electrode and the second NMOS tube (MN2)；One end of the resistance R is grounded after connecting with the source electrode of the first NMOS tube (MN1),
The other end is connect with the source electrode of the second PMOS tube (MP2)；
The CTAT voltage generation module includes third NMOS tube (MN3) and third PMOS tube (MP3), the third PMOS tube
(MP3) grid connection output bias voltage VB1, source electrode connect supply voltage VDD；Third NMOS tube (MN3) grid leak is short
Meet and connect the drain electrode of third PMOS tube (MP3), and the output voltage V as reference circuitCTAT, the third PMOS tube
(MP3) source electrode ground connection；
The reference voltage output module include the 4th NMOS tube (MN4), the 5th NMOS tube (MN5), the 6th NMOS tube (MN6),
7th NMOS tube (MN7), the 4th PMOS tube (MP4), the 5th PMOS tube (MP5), the 6th PMOS tube (MP6), the 7th PMOS tube
(7), the 8th PMOS tube (MP8) and the 9th PMOS tube (MP9), the grid of the 4th NMOS tube (MN4) and the 5th NMOS tube (MN5)
Extremely it is connected and connects output bias voltage VB1, the 4th NMOS tube (MN4) is connected simultaneously with the source electrode of the 5th NMOS tube (MN5)
Connect supply voltage VDD, the drain electrode of the 4th NMOS tube (MN4) respectively with the 6th PMOS tube (MP6) and the 7th PMOS tube
(MP7) source electrode connection, the drain electrode of the 5th NMOS tube (MN5) respectively with the 8th PMOS tube (MP8) and the 9th PMOS tube
(MP9) source electrode connection, the grid of the 6th PMOS tube (MP6) connect output voltage VCTAT, the 4th PMOS tube
(MP4) grid leak is shorted and connects the drain electrode of the 6th PMOS tube (MP6) and the grid of the 5th NMOS tube (MN5), and the described 7th
The grid leak of PMOS tube (MP7) is shorted and connects the grid of the 8th PMOS tube (MP8) and the drain electrode of the 5th NMOS tube (MN5), described
4th NMOS tube (MN4) is grounded after connecting with the source electrode of the 5th NMOS tube (MN5), and the grid leak of the 6th NMOS tube (MN6) is short
Connect and connect the drain electrode of the 8th PMOS tube (MP8) and the grid of the 7th NMOS tube (MN7), the grid of the 9th PMOS tube (MP9)
Leakage be shorted and connect the 7th NMOS tube (MN7) drain electrode and and the outputting reference voltage VREF as reference circuit, the described 6th
NMOS tube (MN6) is grounded after being connected with the source electrode of the 7th NMOS tube (MN7).
2. a kind of threshold voltage reference circuit as described in claim 1, it is characterised in that: all pipes work
Press threshold zone.
3. a kind of threshold voltage reference circuit as described in claim 1, it is characterised in that: the current source module is used for output
Bias current.
4. a kind of threshold voltage reference circuit as described in claim 1, it is characterised in that: the third NMOS tube (MN3) with
The middle switching tube of current source module constitutes current mirror.
5. a kind of threshold voltage reference circuit as described in claim 1, it is characterised in that: the 4th NMOS tube (MN4) and
The middle switching tube of 5th NMOS tube (MN5) and current source module constitutes current mirror.
6. a kind of threshold voltage reference circuit as described in claim 1, it is characterised in that: the voltage reference circuit is using mark
Quasi- CMOS technology is fabricated to integrated circuit.
7. a kind of threshold voltage reference circuit as described in claim 1, it is characterised in that: the output voltage VCTATFormula
It is as follows:
Wherein, m is the sub-threshold slope factor, VTIt is thermal voltage, μnIt is electron mobility, CoxIt is third for gate oxidation capacitance
The multiple of electric current and bias current that PMOS tube MP3 is provided, (W/L)N3For the breadth length ratio of third NMOS tube MN3.
8. a kind of threshold voltage reference circuit as described in claim 1, it is characterised in that: the formula of the reference voltage VREF
It is as follows:
Wherein, (W/L)N4、(W/L)N5、(W/L)N6、(W/L)N7、(W/L)P6、(W/L)P7、(W/L)P8、(W/L)P9Respectively the 4th
NMOS tube MN4, the 5th NMOS tube MN5, the 6th NMOS tube MN6, the 7th NMOS tube MN7, the 6th PMOS tube MP6, the 7th PMOS tube
The breadth length ratio of MP7, the 8th PMOS tube MP8, the 9th PMOS tube MP9；By the 4th NMOS tube MN4 and the 6th NMOS tube MN6, the 5th
NMOS tube MN5 and the 7th NMOS tube MN7, the 6th PMOS tube MP6 and the 8th PMOS tube MP8, the 7th PMOS tube MP7 and the 9th PMOS
Pipe MP9 takes identical breadth length ratio respectively；
Formula is then further simplified to obtain:
The power consumption of gap benchmark.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910775979.2A CN110502056A (en) | 2019-08-22 | 2019-08-22 | A kind of threshold voltage reference circuit |
Applications Claiming Priority (1)
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| CN115756073A (en) * | 2022-12-09 | 2023-03-07 | 深圳市中新力电子科技有限公司 | Small-size band-gap reference voltage source integrated circuit applied to intelligent mobile device power supply system |
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