CN110494724B - 集成数字力传感器和相关制造方法 - Google Patents
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Abstract
本文描述了一种加固型晶片级微机电(“MEMS”)力传感器,其包括基部和盖。MEMS力传感器包括柔性膜和感测元件。感测元件电连接到设置在与感测元件相同的衬底上的集成互补金属氧化物半导体(“CMOS”)电路。CMOS电路可被配置成通过电端子将力值放大、数字化、校准、存储和/或传送到外部电路。
Description
相关申请的交叉引用
本申请要求2017年2月9日提交的名称为“集成数字力传感器(INTEGRATEDDIGITAL FORCE SENSOR)”的美国临时专利申请第62/456,699号和2017年3月9日提交的名称为“固态机械开关(SOLID STATE MECHANICAL SWITCH)”的美国临时专利申请第62/469,094号的权益,所述临时专利申请的公开内容以全文引用的方式明确并入本文中。
技术领域
本公开涉及微机电(“MEMS”)力感测管芯、MEMS开关和相关制造方法。MEMS力感测管芯和/或MEMS开关可用于将力转换成数字输出码。
背景技术
当前技术的MEMS力管芯基于将所施加的力链接到具有应变计的感测隔膜,所述应变计位于两个或更多个堆叠硅或玻璃管芯的表面上。引线键合焊盘围绕感测隔膜定位并且所得结构被封装,这使得装置相比更现代的芯片级封装传感器和电子器件相对较大。此外,当前MEMS力管芯产生模拟输出,所述模拟输出在转换为数字信号之前通常必须通过经常嘈杂的电气环境传送。
当前机电开关主要由变形以完成电路的导电穹顶结构组成。这些开关在其耐久性方面受到限制,原因是导电材料(通常是金属)会随时间推移而磨损。这些开关也不能被配置成用于多级致动,随着软件应用的复杂性增加并且需要来自用于控制它们的用户界面的更多通用性,因此更加期望开关能用于多级致动。
因此,在相关领域中需要一种小型低成本数字力传感器。
发明内容
本文描述了一种包括多个感测元件和定位在力传感器管芯的表面上的数字电路的MEMS力传感器。每个感测元件可以包括弯曲部和感测元件(例如,压阻式应变计)。在一种实施方式中,可以采用四个感测元件,但也可以使用更多或更少的感测元件。在标准互补金属氧化物半导体(“CMOS”)过程中MEMS的包括允许传感器将其模拟输出转换成数字码,并传输数字码,而不会由于电噪声而损失信号完整性。
本文中所描述的MEMS力传感器可通过将盖晶片(cap wafer)结合到具有感测元件(例如,压阻式应变计)和CMOS功率、处理和通信电路两者的基础晶片(例如,力传感器管芯)来制造。可以通过在基础晶片的顶侧上蚀刻弯曲部来形成感测元件。基础晶片与盖晶片之间的结合可以包括由在基础晶片顶部上和/或盖晶片底部上雕刻的突起产生的间隙。间隙可被设计成限制盖晶片的位移,以便为MEMS力传感器提供力过载保护。基础晶片的突起和外壁在施加力时偏转,使感测元件发生应变,并产生模拟输出信号。模拟输出信号可以被数字化并存储在CMOS电路的片上寄存器中,直到主机装置请求。
本文还描述了一种晶片级MEMS机械开关,其包括基部和盖。机械开关采用至少一个感测元件。所述至少一个感测元件电连接到相同衬底上的集成CMOS电路。CMOS电路可放大、数字化和校准力值,所述力值与可编程力阈值进行比较以调制数字输出。
本文还描述了一种包括定位在开关管芯的表面上的多个感测元件的MEMS开关。在一种实施方式中,可以采用四个感测元件,但也可以使用更多或更少的感测元件。感测元件可以使其模拟输出数字化并且与多个编程的力水平比较,从而输出数字码以指示开关的当前状态。
MEMS开关可被制成紧凑式的以仅需要少数输入/输出(“I/O”)端子。装置的输出可被配置成指示2N个输入力水平,其中N是输出端子的数量,其可由用户编程。此外,装置的响应可以选择性地被过滤,使得仅测量动态力。所得装置是一个完全可配置的多级动态数字开关。
本文中描述了示例性MEMS力传感器。MEMS力传感器可包括被配置成接收所施加力的传感器管芯。传感器管芯具有顶表面和与其相对的底表面。MEMS力传感器还可包括布置在传感器管芯的底表面上的感测元件和数字电路。感测元件可以被配置成将传感器管芯的底表面上的应变转换成与应变成比例的模拟电信号。另外,数字电路可以被配置成将模拟电信号转换成数字电输出信号。
另外,感测元件可以是压阻式、压电式或电容式换能器。
替代地或另外,MEMS力传感器还可包括布置在传感器管芯的底表面上的多个电端子。由数字电路产生的数字电输出信号可以被传送到电端子。例如,所述电端子可以是焊料凸块或铜柱。
替代地或者另外,MEMS力传感器可还包括附接到传感器管芯的盖。盖可在由传感器管芯的外壁限定的表面处结合到传感器管芯。另外,密封腔可形成于盖与传感器管芯之间。
替代地或者另外,传感器管芯可包括形成于其中的弯曲部。弯曲部可将所施加的力转换成传感器管芯的底表面上的应变。任选地,弯曲部可通过蚀刻形成于传感器管芯中。感测元件布置在弯曲部上。
替代地或者另外,间隙可布置在传感器管芯与盖之间。间隙可以被配置成在施加所施加的力时变窄,使得弯曲部不能变形超过其断裂点。
替代地或者另外,数字电路还可以被配置成基于多个预定力阈值提供数字输出码。
本文中描述了用于制造MEMS力传感器的示例性方法。所述方法可包括在力传感器管芯的表面上形成至少一个感测元件,并在力传感器管芯的表面上形成互补金属氧化物半导体(“CMOS”)电路。至少一个感测元件可以配置有与下游CMOS过程兼容的特性。
替代地或者另外,至少一个感测元件可以在形成CMOS电路之前形成。
替代地或者另外,所述特性可以是至少一个感测元件的热退火分布。
替代地或者另外,所述方法还可包括蚀刻力传感器管芯的相对表面以形成过载间隙,蚀刻力传感器管芯的相对表面以形成沟道,以及将盖晶片结合到力传感器管芯的相对表面以密封盖晶片与力传感器管芯之间的腔。腔可由沟道限定。
替代地或者另外,所述方法还可包括在力传感器管芯的相对表面上形成多个电端子。
替代地或者另外,力传感器管芯可以由p型或n型硅制成。
替代地或者另外,可以使用注入过程或沉积过程形成至少一个感测元件。
替代地或者另外,CMOS电路可以被配置成对由至少一个感测元件产生的模拟电输出信号进行放大和数字化。
替代地或者另外,沟道可以被构造成当力施加到MEMS力传感器时增加至少一个感测元件上的应变。
替代地或者另外,过载间隙的深度可被配置成为MEMS力传感器提供过载保护。
替代地或者另外,电端子可以是焊料凸块或铜柱。
本文还描述了示例性MEMS开关。MEMS开关可包括被配置成接收所施加的力的传感器管芯。传感器管芯具有顶表面和与其相对的底表面。MEMS开关还可包括布置在传感器管芯的底表面上的感测元件和数字电路。感测元件可以被配置成将传感器管芯的底表面上的应变转换成与应变成比例的模拟电信号。另外,数字电路可以被配置成将模拟电信号转换成数字信号,并且基于多个预定力阈值提供数字输出码。
替代地或者另外,数字电路还可以被配置成将数字信号与预定力阈值进行比较。可选地,预定力阈值是相对于基线的。替代地或者另外,数字电路还可被配置成以预定频率更新基线。例如,可以通过将数字信号与自动校准阈值进行比较来更新基线。
在研究以下图式和详细描述时,其它系统、方法、特征和/或优点对于本领域技术人员而言将是或者可变得显而易见的。旨在将所有此类附加系统、方法、特征和/或优点都包括在本说明书内且受所附权利要求书的保护。
附图说明
附图中的部件不一定相对于彼此成比例。附图标记指示对应部分。在参考附图的详细描述中,这些和其它特征将变得更加明显。
图1是根据本文中所描述的实施方式的示例性MEMS力传感器的顶部的等距视图。
图2是图1的MEMS力传感器的俯视图。
图3是图1的MEMS力传感器的横截面视图。
图4是图1的MEMS力传感器的底部的等距视图。
图5是根据本文中所描述的实施方式使用压阻感测元件(不按比例)的集成p型MEMS-CMOS力传感器的示例性基础晶片的横截面视图。
图6是根据本文中所描述的实施方式使用压阻感测元件(不按比例)的集成n型MEMS-CMOS力传感器的示例性基础晶片的横截面图。
图7是根据本文中所描述的实施方式使用多晶硅感测元件(不按比例)的集成p型MEMS-CMOS力传感器的示例性基础晶片的横截面图。
图8是根据本文中所描述的实施方式使用压电感测元件(不按比例)的集成p型MEMS-CMOS力传感器的示例性基础晶片的横截面视图。
图9是根据本文中所描述的实施方式的示例性MEMS开关的顶部的等距视图。
图10是图9的MEMS开关的底部的等距视图。
图11是描述两位数字输出的输出的示例性真值表。
图12描绘了对示例性基线过程进行描述的流程图。
具体实施方式
通过参考以下详细描述、示例、图式及其之前和以下描述,可更容易地理解本公开。然而,在公开并描述本发明的装置、系统和/或方法之前,应当理解,除非另外指出,否则本公开不限于所公开的特定装置、系统和/或方法,因此当然可以变化。还要理解,本文所用的术语仅用于描述特定方面的目的,而不旨在是限制性的。
提供以下描述作为实施教导。为此,相关领域的技术人员将了解并认识到可以进行许多改变,同时仍获得有益的结果。还将显而易见的是,可通过选择一些特征而不利用其它特征来获得一些所期望的益处。因此,在本领域中工作的人员将认识到,许多修改和调适是可能的,并且在某些情况下甚至可能是期望的,并且由本公开考虑。因此,提供以下描述是为了说明原理而不是对其进行限制。
除非上下文另外明确规定,否则如全文中使用的单数形式“一个”、“一种”和“该/所述”包括复数指代物。因此,举例来说,除非上下文另外规定,否则对“MEMS力传感器”的引用可包括两个或更多个此类MEMS力传感器。
本文使用的术语“包含”及其变型与术语“包括”及其变型同义使用,并且是开放的非限制性术语。
范围在本文中可以表达为从“约”一个特定值和/或到“约”另一特定值。当表达此类范围时,另一方面包括从一个特定值和/或到另一特定值。类似地,当数值通过使用先行词“约”表达为近似值时,应理解,特定值形成另一方面。将进一步理解,每个范围的端点在相对于另一端点和独立于另一端点方面都是有效的。
如本文所用的,术语“任选的”或“任选地”意味着随后描述的事件或情况可以发生或可以不发生,并且所述描述包括所述事件或情况发生的例子和所述事件或情况不发生的例子。
本文中描述了用于测量施加到MEMS力传感器10的至少一部分的力的MEMS力传感器。在一个方面,如图1-4中所描绘,力传感器10包括基部11(有时也称作“传感器管芯”或“力传感器管芯”)和盖12。基部11和盖12可以在沿着由基部11的外壁13形成的表面在一个或多个点处结合。换句话说,基部11和盖12可在MEMS力传感器10的外围区域处结合。应理解,MEMS力传感器10的外围区与其中心间隔开,即,外围区布置在MEMS力传感器10的外边缘附近。盖和传感器管芯在MEMS力传感器的外围区结合的示例性MEMS力传感器在以下文献中描述:2016年11月8日颁发的名称为“加固型MEMS力管芯(Ruggedized MEMS Force Die)”的美国专利号9,487,388,2016年11月15日颁发的名称为“晶片级MEMS力管芯(Wafer LevelMEMS Force Dies)”的美国专利号9,493,342,Brosh等人于2015年1月13日提交的名称为“小型化的加固型晶片级MEMS力传感器(Miniaturized and ruggedized wafer levelmems force sensors)”的美国专利申请公开号2016/0332866,以及Campbell等人于2016年6月10日提交的名称为“具有公差沟道的加固型晶片级MEMS力传感器(Ruggedized waferlevel mems force sensor with a tolerance trench)”的美国专利申请公开号2016/0363490,上述专利的公开内容通过全文引用的方式并入本文中。因此,结合区域可布置成邻近MEMS力传感器10的外边缘,与邻近于其中心区域相反。这允许结合区域占据盖12与基部11之间的表面积的大的百分比,这产生具有改进的强度和稳健性的MEMS力传感器。
盖12可任选地由玻璃(例如,硼硅酸盐玻璃)或硅制成。基部11可任选地由硅制成。任选地,基部11(及其部件,例如,如凸台、外壁、弯曲部等)是单件连续的材料,即,基部11是整体的。应当理解,本公开设想,盖12和/或基部11可以由除了作为示例提供的那些材料之外的材料制成。本公开设想,可以使用本领域已知的技术,包括但不限于硅融合结合、阳极键合、玻璃烧结、热压缩和共晶键合,结合盖12和基部11。
基部11与盖12之间的内表面形成密封腔14。可以通过从基部11蚀刻沟道(例如,如下文参照图5-8所述)然后密封结合的基部11与盖12之间的容积来形成密封腔14。例如,当粘附在一起时,该容积被密封在基部11和盖12之间,这导致密封腔14的形成。可通过从基部11去除材料(例如,本文所述的深蚀刻过程)来蚀刻沟道。另外,沟道限定外壁13和至少一个弯曲部16。在图1-3中,沟道是连续的并且具有基本上正方形的形状。应理解,沟道可具有不同于仅作为示例提供的图1-3中所示的沟道的其它形状、尺寸和/或图案。任选地,沟道可形成多个外壁和/或多个弯曲部。具有限定柔性感测元件(例如,弯曲部)的腔(例如,沟道)的示例性MEMS力传感器在以下文献中描述:2016年11月8日颁发的名称为“加固型MEMS力管芯(Ruggedized MEMS Force Die)”的美国专利号9,487,388,2016年11月15日颁发的名称为“晶片级MEMS力管芯(Wafer Level MEMS Force Dies)”的美国专利号9,493,342,Brosh等人于2015年1月13日提交的名称为“小型化的加固型晶片级MEMS力传感器(Miniaturizedand ruggedized wafer level mems force sensors)”的美国专利申请公开号2016/0332866以及Campbell等人于2016年6月10日提交的名称为“具有公差沟道的加固型晶片级MEMS力传感器(Ruggedized wafer level mems force sensor with a tolerancetrench)”的美国专利申请公开号2016/0363490,上述专利的公开内容通过全文引用的方式并入本文中。当盖12和基部11结合在一起时,密封腔14可密封在盖12与基部11之间。换句话说,MEMS力传感器10具有密封腔14,所述密封腔限定由盖12和基部11完全封闭的容积。密封腔14与外部环境密封。
基部11具有顶表面18a和底表面18b。顶表面18a和底表面18b彼此相对布置。从基部11的顶表面18a蚀刻限定外壁13和弯曲部16的沟道。接触表面15沿着盖12的表面(例如,沿着其顶表面)布置以用于接收所施加的力“F”。力“F”通过外壁13从盖12传递到至少一个弯曲部16。MEMS力传感器10可包括在基部11的一部分和盖12之间的气隙17(有时也称为“间隙”或“过载间隙”)。气隙17可在密封腔14内。例如,可通过从基部11去除材料(例如,本文所述的浅蚀刻过程)形成气隙17。或者,可通过蚀刻盖12的一部分来形成气隙17。或者,可通过蚀刻基部11的一部分和盖12的一部分来形成气隙17。气隙17的尺寸(例如,厚度或深度)可由至少一个弯曲部16的最大偏转确定,使得在至少一个弯曲部16破裂之前,基部11与盖12之间的气隙17将关闭并且机械阻止进一步的偏转。气隙17通过限制至少一个弯曲部16可偏转的量提供过载停止,使得弯曲部不会由于施加过大的力而机械失效。被设计成提供过载保护的示例性MEMS力传感器在以下文献中描述:2016年11月8日颁发的名称为“加固型MEMS力管芯(Ruggedized MEMS Force Die)”的美国专利号9,487,388,2016年11月15日颁发的名称为“晶片级MEMS力管芯(Wafer Level MEMS Force Dies)”的美国专利号9,493,342,Brosh等人于2015年1月13日提交的名称为“小型化的加固型晶片级MEMS力传感器(Miniaturized and ruggedized wafer level mems force sensors)”的美国专利申请公开号2016/0332866以及Campbell等人于2016年6月10日提交的名称为“具有公差沟道的加固型晶片级MEMS力传感器(Ruggedized wafer level mems force sensor with atolerance trench)”的美国专利申请公开号2016/0363490,上述专利的公开内容通过全文引用的方式并入本文中。
现在参考图3和图4,分别示出了MEMS力传感器10的侧视图和仰视图。MEMS力传感器10包括设置在基部11的底表面18b上的至少一个感测元件22。可选地,多个感测元件22可以设置在基部11的底表面18b上。本公开设想,感测元件22可以扩散、沉积或注入到基部11的底表面18b上。感测元件22可响应于至少一个弯曲部16的偏转而改变电气特性(例如,电阻、电容、电荷等)。电气特性的变化可以作为本文所述的模拟电信号来测量。在一种实施方式中,感测元件22可以任选地是压阻式换能器。例如,当在至少一个弯曲部16中诱发与施加到接触表面15的力“F”成比例的应变时,在压阻式换能器上产生局部应变,使得根据其具体取向压阻式换能器经历压缩或张力。当压阻式换能器压缩和拉紧时,其电阻率以相反的方式变化。因此,包括多个(例如,四个)压阻式换能器(例如,相对于应变的每个取向中的两个)的Wheatstone(惠斯通)桥电路变得不平衡,并且在正信号端子和负信号终端上产生差分电压(在本文中有时也称为“模拟电信号”)。此差分电压与MEMS力传感器10的盖12上所施加的力“F”成正比。如下文所描述,此差分电压可在数字电路(例如,CMOS电路23)处接收并由其处理,所述数字电路也设置于基部11上。例如,除了其他功能之外,数字电路可以被配置成将模拟电信号转换成数字电输出信号。尽管压阻式换能器作为示例性感测元件提供,但本公开设想,至少一个感测元件22可以是任何传感器元件,其被配置成基于所施加的力的量或大小改变至少一个电特性(例如,电阻、电荷、电容等),并且可输出与所施加的力的量或大小成比例的信号。其他类型的感测元件包括但不限于压电或电容式传感器。
还设想由Wheatstone(惠斯通)桥配置中的至少一个感测元件22产生的模拟电信号可以可选地由位于与至少一个感测元件22相同的表面上的数字电路处理。在一个实施方式中,数字电路是CMOS电路23。因此,CMOS电路23可设置于基部11的底表面18b上,如图4所示。换句话说,感测元件22和CMOS电路23都可设置在同一整体衬底(例如,基部11,其可任选地由硅制成)上。这与将由至少一个感测元件22产生的模拟电信号传送至MEMS力传感器10自身外部的数字电路相反。应理解,将模拟电信号传送到MEMS力传感器10外部的电路可导致由于电噪声损失信号完整性。CMOS电路23可任选地包括差分放大器或缓冲器、模数转换器、时钟发生器、非易失性存储器和通信总线中的一个或多个。另外,CMOS电路23可任选地包括可编程存储器以存储可在工厂校准期间设置的修整值。修整值可用于确保MEMS力传感器10在指定误差容限内提供准确的绝对力输出。此外,可编程存储器可以任选地存储可追溯的装置标识符(“ID”)。CMOS电路在所属领域中是已知的,且因此未在下文进一步详细描述。本公开设想CMOS电路23可包括除了作为示例提供的电路之外的电路。例如,本公开设想CMOS电路23可任选地包括用以提高准确度的部件,例如内部电压调节器或温度传感器。如本文所述,Wheatstone(惠斯通)桥的差分模拟输出可以被放大、数字化并存储在通信缓冲器中,直到其被主机装置请求。MEMS力传感器10还可包括如图3和图4所示的至少一个电端子19。电端子19可为用于(例如,电、通信地)连接到主机装置的电力和/或通信接口。电端子19可以是焊料凸块或金属(例如,铜)柱以允许晶片级封装和倒装芯片组装。尽管提供了焊料凸块和铜柱作为示例,但本公开设想了电端子19可为能够将MEMS力传感器10电连接到主机装置的任何部件。另外,应理解,仅作为示例在图3和图4中提供电端子19的数量和/或布置。
在基部11的相同表面(例如,底表面18b)上形成至少一个感测元件22和CMOS电路23的过程可以概括为三级过程。第一级是通过扩散、沉积或用光刻暴光过程图案化的注入来产生至少一个感测元件22。第二级是通过标准CMOS工艺流程产生CMOS电路23。第三级是产生基部11元件,其包括外壁13、密封腔14、至少一个弯曲部16和气隙17。设想这些级可以制造过程允许的任何顺序执行。
第一级包括形成至少一个感测元件(例如,图4所示的感测元件22)的步骤。现在参考图5至图8,常见CMOS工艺从p型硅晶片101开始。本公开设想可以使用p型硅晶片来制造上文关于图1-4描述的MEMS力传感器。然而,应理解,类似的CMOS工艺可适于其它起始材料,例如n型硅晶片。此外,本公开设想可以使用除硅以外的半导体晶片。感测元件(例如,图4所示的至少一个感测元件22)可以实施为如图5所示的n型扩散、沉积或注入102,或者如图6所示的p型扩散、沉积或完全包含在n型阱204中的注入202。在前一方面(即,图5的n型扩散、沉积或注入),感测元件的端子包括连接到n型扩散、沉积或注入102的高度掺杂的n型注入103。在后一方面(即,图6的p型扩散、沉积或注入),感测元件的端子包括连接到p型扩散、沉积或注入202的高度掺杂的p型注入203,而n型阱204通过高度掺杂的n型注入105接收电压偏置。
在替代方面,感测元件可以实施为如图7所示的n型或p型多晶硅注入302,其在常见CMOS工艺中通过n型或p型注入可用作栅极或电容器层。如图7所示,感测元件的端子包括连接到注入302的低电阻硅化多晶硅303。在又一替代方面,感测元件可以结合如图8所示的顶部电极401和底部电极403与压电层402一起实施。另外,如图5-8所示,感测元件与数字电路(例如,如图4所示的CMOS电路23)之间的电连接可以与导电互连层112和通孔113一起实施。例如,互连层112和通孔113可任选地由金属制成。
第二级包括光刻、注入、退火、沉积和蚀刻过程以形成数字电路(例如,如图4所示的CMOS电路23)。这些过程广泛地用于行业中并在相关领域中描述。因此,这些过程未在本文中详细描述。第二级可包括产生NMOS器件110,其包括n型源极和漏极注入108。第二级还可包括产生PMOS器件111,其包括p型源极和漏极注入109。p型源极和漏极注入109设置在n型阱中,该n型阱通过高度掺杂的n型注入105接收电压偏置。另外,NMOS器件110和PMOS器件111中的每一个可包括金属-氧化物栅极堆叠107。应理解,第二级可包括产生多个NMOS器件和PMOS器件。NMOS器件和PMOS器件可形成数字电路(例如,图4所示的CMOS电路23)的各种部件。数字电路可以任选地包括其它部件,其未在图5-8中描绘,包括但不限于:双极晶体管、金属绝缘体-金属(“MIM”)和金属氧化物半导体(“MOS”)电容器、扩散的、注入的和多晶硅电阻器,和/或二极管。
如上所述,感测元件和数字电路(例如,图4所示的感测元件22和CMOS电路23)可以设置在相同的整体衬底(例如,图4所示的基部11)上。因此,本公开设想,在数字电路之前产生感测元件的实施方式中,在产生感测元件(例如,图4所示的至少一个感测元件22)中使用的每个处理步骤(即,第一级处理步骤)与在产生数字电路(例如,图4所示的CMOS电路23)使用的下游处理步骤(即,第二级处理步骤)兼容。例如,n型扩散、沉积或注入102(例如,如图5所示)或p型扩散、沉积或注入202(例如,如图6所示)可以设计成使得在产生数字电路(例如,图4所示的CMOS电路23)使用的退火过程之后其将到达其目标深度。可以对上述特征以及与感测元件相关的特征中的每一个特征进行类似设计考虑。替代过程可包括在形成数字电路(例如,图4所示的CMOS电路23)期间或之后的任何时间点执行的形成感测元件(例如,图5所示的注入103或图6所示的注入105、203)的端子,这会对退火步骤强加不同要求。
第三级包括在p型硅晶片101上执行的MEMS微加工步骤。应理解,图5-8的p型硅晶片101可对应于图1-4中所示的MEMS力传感器10的基部11。本公开设想,根据制造工艺的能力,第三级步骤可在第一级和第二级执行之前或之后执行。如上文关于图1-4所述,可蚀刻基部11以形成气隙17、外壁13和至少一个弯曲部16。浅蚀刻可形成气隙17。深蚀刻可形成外壁13和至少一个弯曲部16。深蚀刻由图5-8中的附图标记106示出。如图5-8所示,感测元件形成于至少一个弯曲部的表面上。之后,基部(例如,图1-4所示的基部11)结合到如上所述的盖(例如,图1-4所示的盖12)。因此,形成密封腔(例如,图1-3所示的密封腔14)。在完成所有晶片处理之后,可添加电端子(例如,如图3-4所示的电端子19)。
本文还描述了MEMS开关装置。现在参考图9-10,示出了示例性MEMS开关装置50。MEMS开关装置50可包括具有顶表面58a和底表面58b的基部51。MEMS开关装置50还可包括结合到基部51的盖52,在其间形成密封腔54。如图10所示,至少一个感测元件62和数字电路63(例如,CMOS电路)布置在基部51的底表面58b上。电端子59也布置在基部51的底表面58b上。电端子59可用于将MEMS开关装置电和/或通信连接到主机装置。电端子59可促进晶片级封装和倒装芯片组装。另外,在图9中示出了施加力的接触表面55。当施加力时,力从盖52传递到基部51,其中,在基部的底表面58b中诱发应变。感测元件62的电学特性响应于局部应变而变化。此变化由感测元件62产生的模拟电信号捕获。模拟电信号被传输到数字电路63以进行进一步处理。应理解,MEMS开关装置50类似于上文关于图1-8描述的MEMS力传感器。因此,MEMS开关装置50的各种特征未在下文进一步详细描述。
如上所述,MEMS开关装置50可以任选地包括被配置为Wheatstone(惠斯通)桥的多个感测元件62。由Wheatstone(惠斯通)桥配置中的感测元件62产生的模拟电信号可以任选地由驻存在基部51的底表面58b上的互补金属氧化物半导体(CMOS)电路(例如,数字电路63)处理。换句话说,感测元件62和CMOS电路都可布置在基部的相同表面上。如上所述,CMOS电路可包括差分放大器或缓冲器、模数转换器、时钟发生器、非易失性存储器,和/或一个或多个数字输出。所述一个或多个数字输出可被配置成当达到一个或多个力阈值时改变状态。这样,MEMS开关装置50可以用作单级或多级二进制开关。举例来说,在具有两个数字输出的一个方面中,三个力水平(例如,预定力阈值)可被编程为高于标称零力,从而实现三级开关。图11是描述两位数字输出的输出(D1,D2)的真值表(例如,数字输出码)。在图11中,三个力阈值是f1、f2和f3。本公开设想,输出的数量和力阈值的数量/值可根据MEMS开关装置50的设计而变化。数字输出可被配置成指示2N个输入力水平,其中N是输出端子的数量。数字输出/输入力水平可由用户编程。
另外,CMOS电路可任选地包括可编程存储器以存储可在工厂校准期间设置的修整值。修整值可用于确保MEMS开关装置50在指定误差容限内提供准确的力水平检测。此外,可编程存储器可以可选地存储可追溯的装置ID。本公开设想CMOS电路可包括除了作为示例提供的电路之外的电路。例如,本公开设想CMOS电路任选地包括提高准确度的部件,例如,内部电压调节器或温度传感器。
在一个方面,可能需要独立于施加到MEMS开关装置50的任何偏置或静力来维持一致的力水平转换。在这个方面,MEMS开关装置50可以被配置成将动态力与编程的力阈值进行比较,过滤由各种条件(包括机械预载荷和温度变化)引起的任何低频响应。这可以通过执行低频基线操作来实现,所述低频基线操作将当前力输入与自动校准阈值进行比较。图12是说明基线过程的示例性操作的流程图。在1202处,MEMS开关装置例如响应于所施加的力进入激活状态。在1204处,设置基线。在1206处,如果当前力输入小于自动校准阈值,则将当前力输入设置为新基线直到下一操作。换句话说,操作返回到1204。另一方面,在1206处,如果当前力输入大于自动校准阈值,则基线保持不变,如在1208处所示。可以以类似于切换力阈值的方式将操作的自动校准阈值和频率编程为例如0.5N的自动校准阈值和10Hz的基线频率。应当理解,自动校准阈值和基线频率的值仅作为示例提供,并且可以具有其它值。
尽管已经以特定于结构特征和/或方法动作的语言描述了主题,但要理解,所附权利要求书中定义的主题不一定限于上文所描述的具体特征或动作。相反,上文描述的具体特征和动作是作为实施权利要求书的示例性形式而公开的。
Claims (14)
1.一种微机电MEMS开关,包括:
传感器管芯,所述传感器管芯被配置成接收所施加的力,其中,所述传感器管芯包括顶表面和与其相对的底表面;
感测元件,所述感测元件布置在所述传感器管芯的底表面上,其中,所述感测元件被配置成将应变转换成与所述应变成比例的模拟电信号;和
数字电路,所述数字电路布置在所述传感器管芯的底表面上,其中所述感测元件和数字电路被布置在所述传感器管芯的相同表面上,以及其中,所述数字电路被配置成:
将所述模拟电信号转换成数字信号,以及
基于多个预定力阈值提供数字输出码,其中所述数字电路包括差分放大器或缓冲器、模数转换器、时钟发生器、非易失性存储器或数字输出中的一个或多个;
其中所述数字电路存储能在工厂校准期间设置的、用于确保MEMS开关在指定误差容限内提供准确的力水平检测的修正值;以及
所述MEMS开关用作单级或多级二进制开关,以及所述MEMS开关还被配置成将动态力与编程的力阈值进行比较,过滤低频响应,这通过执行低频基线操作来实现,所述低频基线操作将当前力输入与自动校准阈值进行比较。
2.根据权利要求1所述的MEMS开关,其中,所述数字电路还被配置成将所述数字信号与所述预定力阈值进行比较。
3.根据权利要求1所述的MEMS开关,其中,所述预定力阈值是相对于基线的。
4.根据权利要求3所述的MEMS开关,其中,所述数字电路还被配置成以预定频率更新所述基线。
5.根据权利要求4所述的MEMS开关,其中,通过将所述数字信号与自动校准阈值进行比较来更新所述基线。
6.根据权利要求1所述的MEMS开关,其中,所述感测元件通过扩散或注入形成。
7.根据权利要求1所述的MEMS开关,其中,所述感测元件通过多晶硅过程从集成电路过程形成。
8.根据权利要求1所述的MEMS开关,还包括布置在所述传感器管芯的底表面上的多个电端子,其中,由所述数字电路提供的数字输出码被传送到所述电端子。
9.根据权利要求8所述的MEMS开关,其中,所述电端子包括焊料凸块或铜柱。
10.根据权利要求1所述的MEMS开关,还包括盖,所述盖在由所述传感器管芯的外壁限定的表面处附接到所述传感器管芯,其中,在所述盖与所述传感器管芯之间形成密封腔。
11.根据权利要求10所述的MEMS开关,其中,所述传感器管芯包括形成于其中的弯曲部,并且其中,所述弯曲部将所施加的力转换成所述传感器管芯的底表面上的应变。
12.根据权利要求11所述的MEMS开关,其中,所述弯曲部通过蚀刻形成在所述传感器管芯中。
13.根据权利要求10所述的MEMS开关,其中,间隙布置在所述传感器管芯与所述盖之间,并且其中,所述间隙被配置成在施加所施加的力时变窄,使得弯曲部不能变形超过其断裂点。
14.根据权利要求1所述的MEMS开关,其中所述感测元件包括压阻式、压电式或电容式换能器。
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CN110494724A (zh) | 2019-11-22 |
US20220268648A1 (en) | 2022-08-25 |
CN116907693A (zh) | 2023-10-20 |
US20190383676A1 (en) | 2019-12-19 |
WO2018148503A1 (en) | 2018-08-16 |
US11946817B2 (en) | 2024-04-02 |
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