CN110459481A - Packaging method of semiconductor element and alignment mold thereof - Google Patents
Packaging method of semiconductor element and alignment mold thereof Download PDFInfo
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- CN110459481A CN110459481A CN201810425683.3A CN201810425683A CN110459481A CN 110459481 A CN110459481 A CN 110459481A CN 201810425683 A CN201810425683 A CN 201810425683A CN 110459481 A CN110459481 A CN 110459481A
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 52
- 238000000034 method Methods 0.000 title claims abstract description 26
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- 239000004033 plastic Substances 0.000 claims abstract description 12
- 239000011248 coating agent Substances 0.000 claims abstract description 7
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- 239000003795 chemical substances by application Substances 0.000 claims description 24
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- 238000004026 adhesive bonding Methods 0.000 claims 1
- 238000000465 moulding Methods 0.000 abstract description 49
- 239000003292 glue Substances 0.000 abstract description 30
- 238000005538 encapsulation Methods 0.000 abstract description 27
- 238000005253 cladding Methods 0.000 abstract 1
- 239000008393 encapsulating agent Substances 0.000 description 30
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- 239000002096 quantum dot Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
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- 238000010438 heat treatment Methods 0.000 description 2
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- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
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- 238000012858 packaging process Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/852—Encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/036—Manufacture or treatment of packages
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/036—Manufacture or treatment of packages
- H10H20/0362—Manufacture or treatment of packages of encapsulations
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
技术领域technical field
本发明为一种半导体元件的封装方法及其对位模具,可有效控制封装胶成型的大小及形状,并有利于提高封装品质的封装构造。The invention relates to a packaging method of semiconductor elements and an alignment mold thereof, which can effectively control the size and shape of the molding of the packaging glue, and is beneficial to improve the packaging structure of the packaging quality.
背景技术Background technique
发光二极体(LED;Light-Emitting Diode)由于具备有寿命长、体积小、耗电量少、反应速度快、无辐射及单色性发光的特性及优点,因此被广泛应用于指示灯、广告看板、交通号志灯、汽车车灯、显示器面板、通讯器具、消费电子等各项产品中。Light-emitting diodes (LEDs; Light-Emitting Diode) are widely used in indicator lights, Advertising billboards, traffic lights, car lights, display panels, communication appliances, consumer electronics and other products.
在半导体元件及发光二极体的制程当中,封装是属于比较下游的制程步骤。但只有经过封装后,半导体元件或发光二极体才能实际应用。以发光二极体为例,包覆发光二极体晶粒的封装胶不仅可用以保护发光二极体晶粒,更具有提高发光效率的作用。在封装胶中掺杂不同的萤光粉或量子点(Quantum Dots)后,将使得发光二极体晶粒发出的光源可经由封装层的萤光粉或量子点后而产生不同颜色或不同波长的投射光源。In the manufacturing process of semiconductor devices and light-emitting diodes, packaging is a relatively downstream process step. However, semiconductor components or light-emitting diodes can only be used in practice after packaging. Taking light-emitting diodes as an example, the encapsulant covering the light-emitting diode crystal grains can not only protect the light-emitting diode grains, but also improve luminous efficiency. After doping different phosphors or quantum dots (Quantum Dots) in the encapsulant, the light source emitted by the light-emitting diode crystal can produce different colors or different wavelengths after passing through the phosphors or quantum dots in the encapsulation layer projected light source.
然而若是封装胶的形状不如预期,或者是封装胶与发光二极体晶粒之间的对位不精准,往往会导致发光二极体晶粒产出的光源,无法如预期经由封装胶导出,或者是导出的光型或角度与预设值不同,进而影响发光二极体装置的发光效率及实用性。因此发光二极体对封装要求较高,通常必须使用具有高精度的固晶机及封装前的对位设备,如此一来将会增加发光二极体的设置成本。However, if the shape of the encapsulant is not as expected, or the alignment between the encapsulant and the light-emitting diode die is not accurate, it will often cause the light source produced by the light-emitting diode die to fail to be exported through the encapsulant as expected. Or the derived light pattern or angle is different from the preset value, thereby affecting the luminous efficiency and practicability of the light emitting diode device. Therefore, light-emitting diodes have high requirements on packaging, and usually high-precision die-bonding machines and alignment equipment before packaging must be used, which will increase the installation cost of light-emitting diodes.
发明内容Contents of the invention
本发明的目的在于提供一种半导体元件的封装方法,主要在模具的表面上涂布或喷洒一厚度较薄的离型剂或在模具加设有一不沾粘层,使得封装胶硬化后不会沾粘在模具上,不仅有利于模具与成型的封装胶分离,也可增加硬化成型的封装体体积,而有利于通过封装体将包覆的发光二极体晶粒所产生的光源导出。The object of the present invention is to provide a kind of encapsulation method of semiconductor element, mainly coating or spraying a release agent with a thinner thickness on the surface of the mould, or adding a non-stick layer at the mould, so that the encapsulation adhesive will not Sticking to the mold not only facilitates the separation of the mold and the molded encapsulant, but also increases the volume of the hardened and molded package, and facilitates the export of the light source generated by the coated light-emitting diode crystal grains through the package.
本发明的另一目的在于提供一种发光二极体的对位模具,通过模具上的第一对位单元、基板上的第二对位单元及夹爪装置的对三对位单元,可快速完成模具的成型腔与基板上的半导体元件的对准及定位,以提高生产及封装的效率。Another object of the present invention is to provide a light-emitting diode alignment mold, through the first alignment unit on the mold, the second alignment unit on the substrate, and the three alignment units of the clamping jaw device, it can Complete the alignment and positioning of the molding cavity of the mold and the semiconductor element on the substrate, so as to improve the efficiency of production and packaging.
本发明的又一目的在于提供一种发光二极体的对位模具,基板的作用面积将大于模具的作用面积,且基板设于模具的垂直上表面,可控制封装胶的溢胶流向,避免封装胶溢流到基板的非封装面,并通过基板下压力量的控制,以提高半导体元件的封装品质。Another object of the present invention is to provide an alignment mold for light-emitting diodes. The active area of the substrate will be larger than the active area of the mould, and the substrate is arranged on the vertical upper surface of the mould, which can control the flow direction of the overflow of the packaging glue and avoid The encapsulation glue overflows to the non-encapsulation surface of the substrate, and the encapsulation quality of the semiconductor element is improved by controlling the amount of pressing force on the substrate.
为了实现上述目的,本发明提出一种半导体元件的封装方法,包括:在一或复数基板的一表面上设置复数个半导体元件;准备一或复数模具,模具包括复数个成型腔;在模具的成型腔内涂布一离型剂或在模具表面加设一不沾粘层;在模具的成型腔内填入一封装胶;将基板上的半导体元件对准模具的成型腔;将基板贴合模具,以使得封装胶包覆设置于基板上的半导体元件;及待封装胶硬化成型为一封装体后,将模具与封装体分离。In order to achieve the above object, the present invention proposes a semiconductor element packaging method, comprising: setting a plurality of semiconductor elements on one or a plurality of substrate surfaces; preparing one or a plurality of moulds, which include a plurality of molding cavities; Apply a release agent in the cavity or add a non-stick layer on the surface of the mold; fill the molding cavity of the mold with an encapsulant; align the semiconductor element on the substrate with the molding cavity of the mold; attach the substrate to the mold , so that the encapsulation glue covers the semiconductor element disposed on the substrate; and after the encapsulation glue is hardened and formed into a package body, the mold is separated from the package body.
本发明提出一种半导体元件的对位模具,包括:一或复数个模具,包括复数个成型腔及复数个第一对位单元;一或复数个夹爪装置,包括复数个第三对位单元,其中第三对位单元与第一对位单元相互对应,且夹爪装置用以吸附或夹住固定一或复数个基板,基板的一表面上设置复数个半导体元件,而基板的作用面积将大于模具的作用面积,夹爪装置可作动而将基板与模具贴合,以致使半导体元件被置放于相对应的成型腔内。The present invention proposes an alignment mold for a semiconductor element, comprising: one or a plurality of moulds, including a plurality of molding cavities and a plurality of first alignment units; one or a plurality of clamping jaw devices, including a plurality of third alignment units , wherein the third alignment unit corresponds to the first alignment unit, and the clamping jaw device is used to absorb or clamp and fix one or more substrates, a plurality of semiconductor elements are arranged on one surface of the substrate, and the active area of the substrate will be Larger than the active area of the mould, the clamping jaw device can act to attach the substrate to the mould, so that the semiconductor element is placed in the corresponding molding cavity.
在本发明一实施例中,其中模具位于基板的下方,且基板的作用面积将大于模具的作用面积。In an embodiment of the present invention, the mold is located below the substrate, and the active area of the substrate is larger than the active area of the mold.
在本发明一实施例中,包括以下步骤:模具设有复数个第一对位单元,而基板相对应于第一对位单元位置设有复数个第二对位单元,基板的第二对位单元将对准模具的第一对位单元而相互插合。In one embodiment of the present invention, the following steps are included: the mold is provided with a plurality of first alignment units, and the substrate is provided with a plurality of second alignment units corresponding to the positions of the first alignment units, and the second alignment unit of the substrate is The units will align with the first alignment unit of the mould, and interlock with each other.
在本发明一实施例中,包括以下步骤:设置有半导体元件的基板被吸附或被夹持固定在一夹爪装置上,并随着夹爪装置而移动,其中模具具有复数个第一对位单元,基板具有复数个第二对位单元,而夹爪装置则具有复数个第三对位单元,第一对位单元、第二对位单元及第三对位单元将可相互插合。In one embodiment of the present invention, the following steps are included: the substrate provided with the semiconductor element is adsorbed or clamped and fixed on a clamping device, and moves along with the clamping device, wherein the mold has a plurality of first alignment unit, the substrate has a plurality of second alignment units, and the gripper device has a plurality of third alignment units, and the first alignment unit, the second alignment unit and the third alignment unit can be inserted into each other.
在本发明一实施例中,其中第一对位单元为一对位柱,第二对位单元为一对位穿孔,而第三对位单元则为一对位凹洞或一对位穿孔。In an embodiment of the present invention, the first alignment unit is a pair of alignment posts, the second alignment unit is a pair of alignment holes, and the third alignment unit is a pair of alignment holes or a pair of alignment holes.
在本发明一实施例中,其中夹爪装置、模具设在一生产机台的一腔室内,生产机台设有至少一腔室,而腔室内设有至少一夹爪装置及至少一模具。In an embodiment of the present invention, wherein the jaw device and the mold are arranged in a chamber of a production machine, the production machine is provided with at least one chamber, and at least one jaw device and at least one mold are arranged in the chamber.
在本发明一实施例中,其中模具的成型腔表面涂布有一离型剂或加设有一不沾粘层。In an embodiment of the present invention, the surface of the molding cavity of the mold is coated with a release agent or provided with a non-stick layer.
在本发明一实施例中,其中腔室内设有一可连接夹爪装置的升降件。In an embodiment of the present invention, a lifter that can be connected to the jaw device is provided in the chamber.
在本发明一实施例中,其中腔室内设有一胶体供应件,可移动至模具上表面,并提供一封装胶或一离型剂至模具上。In an embodiment of the present invention, a glue supply part is arranged in the cavity, which can move to the upper surface of the mold and provide a packaging glue or a release agent to the mold.
在本发明一实施例中,尚包括有一盛胶盘,盛载该模具。In one embodiment of the present invention, a plastic holding tray is also included to contain the mold.
本发明的有益效果在于:The beneficial effects of the present invention are:
本发明提供一种半导体元件的封装方法及其对位模具,通过通过离型剂或不沾粘层的使用,可有效控制封装胶成型的大小及形状,而使用作用面积较大的基板,则可控制多余封装胶的溢胶流向,避免封装胶溢流到基板的非封装面。The invention provides a packaging method for semiconductor elements and an alignment mold thereof. Through the use of a release agent or a non-stick layer, the size and shape of the packaging adhesive can be effectively controlled, and the use of a substrate with a larger active area will The flow direction of excess encapsulation glue can be controlled to prevent the encapsulation glue from overflowing to the non-encapsulation surface of the substrate.
附图说明Description of drawings
图1为本发明半导体元件的封装方法一实施例的侧视图。FIG. 1 is a side view of an embodiment of a packaging method for a semiconductor element of the present invention.
图2为本发明半导体元件的封装方法一实施例的侧视图。FIG. 2 is a side view of an embodiment of a packaging method for a semiconductor element of the present invention.
图3为本发明半导体元件的封装方法一实施例的侧视图。FIG. 3 is a side view of an embodiment of a packaging method for a semiconductor element of the present invention.
图4为本发明半导体元件的封装方法一实施例的侧视图。FIG. 4 is a side view of an embodiment of a packaging method for a semiconductor element of the present invention.
图5为本发明半导体元件的对位模具一实施例的侧视图。FIG. 5 is a side view of an embodiment of an alignment mold for a semiconductor element of the present invention.
图6为本发明半导体元件的对位模具一实施例的侧视图。FIG. 6 is a side view of an embodiment of an alignment mold for a semiconductor element of the present invention.
图7为本发明半导体元件的对位模具又一实施例的侧视图。FIG. 7 is a side view of another embodiment of an alignment mold for a semiconductor element of the present invention.
图8为本发明半导体元件的对位模具又一实施例的立体示意图。FIG. 8 is a schematic perspective view of another embodiment of an alignment mold for a semiconductor device according to the present invention.
主要组件符号说明:Description of main component symbols:
11:基板;113:第二对位单元;119:第二对位单元;13:半导体元件;131:发光二极体晶粒;15:模具;151:成型腔;153:离型剂;155:第一对位单元;159:模具墙;17:封装胶;171:封装体;173:保护层;23:夹爪装置;231:第三对位单元;25:模具;251:成型腔;253:不沾粘层;255:第一对位单元;30:生产机台;31:腔室;33:升降件;35:胶体供应件;39:盛胶盘;A1:作用面积;A2:作用面积。11: Substrate; 113: Second alignment unit; 119: Second alignment unit; 13: Semiconductor element; 131: Light-emitting diode grain; 15: Mold; 151: Molding cavity; 153: Release agent; 155 : first alignment unit; 159: mold wall; 17: packaging glue; 171: packaging body; 173: protective layer; 23: gripper device; 231: third alignment unit; 25: mold; 251: molding cavity; 253: non-stick layer; 255: first alignment unit; 30: production machine; 31: chamber; 33: lifting parts; 35: glue supply parts; Active area.
具体实施方式Detailed ways
请参阅图1至图4,分别为本发明半导体元件的封装方法一实施例在各步骤中的侧视图。如图所示,首先在一基板11的一表面上设置复数个半导体元件13,并准备一模具15,模具15具有复数个成型腔151,如图1所示。基板11可为硅(Si)基板、氧化铝(A2O3)基板、氮化铝(AlN)基板、蓝宝石基板、碳化硅(SiC)基板、砷化镓(GaAs)基板、玻璃基板(Glass)、电路板(PCB)或陶瓷基板。Please refer to FIG. 1 to FIG. 4 , which are side views of each step in an embodiment of a packaging method of a semiconductor device according to the present invention. As shown in the figure, firstly, a plurality of semiconductor elements 13 are disposed on a surface of a substrate 11, and a mold 15 is prepared, and the mold 15 has a plurality of molding cavities 151, as shown in FIG. 1 . The substrate 11 can be a silicon (Si) substrate, an aluminum oxide (A 2 O 3 ) substrate, an aluminum nitride (AlN) substrate, a sapphire substrate, a silicon carbide (SiC) substrate, a gallium arsenide (GaAs) substrate, a glass substrate (Glass ), circuit board (PCB), or ceramic substrate.
具体来说,设置在基板11表面上的半导体元件13可以任意形式排列,例如以矩阵方式设置在基板11的一表面。半导体元件13可以是发光二极体晶粒、半导体晶片等,以发光二极体晶粒131为例,通常包括P型材料及N型材料的层迭,并在P型材料及N型材料之间形成PN介面。Specifically, the semiconductor elements 13 disposed on the surface of the substrate 11 can be arranged in any form, for example, disposed in a matrix on a surface of the substrate 11 . The semiconductor element 13 can be a light-emitting diode crystal grain, a semiconductor chip, etc. Taking the light-emitting diode crystal grain 131 as an example, it usually includes a stack of P-type material and N-type material, and between the P-type material and the N-type material A PN interface is formed between them.
在本发明一实施例中,可在基板11上形成N型材料,而后在N型材料上形成P型材料,最后再通过曝光、显影及蚀刻等半导体制程,完成N型材料及P型材料的设置,藉此在基板上形成复数个发光二极体晶粒131。上述发光二极体晶粒131的制作方法是本发明领域常见的技术,在此不再多做说明。此外对本发明领域的技术人员来说,亦可以不同的方式及步骤制作发光二极体晶粒131,例如,发光二极体晶粒131可以覆晶的方式设置在基板11的表面。In one embodiment of the present invention, an N-type material can be formed on the substrate 11, and then a P-type material can be formed on the N-type material, and finally, the N-type material and the P-type material can be formed through semiconductor processes such as exposure, development, and etching. set, thereby forming a plurality of light-emitting diode crystal grains 131 on the substrate. The manufacturing method of the above light-emitting diode crystal grains 131 is a common technology in the field of the present invention, and no further description is given here. In addition, for those skilled in the field of the present invention, the light emitting diode crystal grain 131 can also be manufactured in different ways and steps, for example, the light emitting diode crystal grain 131 can be disposed on the surface of the substrate 11 in a flip-chip manner.
模具15上的成型腔151的数量与基板11上的发光二极体晶粒131的数量原则上为相同,在进行封装时,各个发光二极体晶粒131需要分别对准相对应的成型腔151。在本发明实施例中,模具15在进行半导体体元件13的封装前,需要在模具15的表面上涂布一层离型剂153,以避免后续使用的封装胶17与模具15及/或成型腔151发生沾粘而难以脱落。The number of molding cavities 151 on the mold 15 is in principle the same as the number of light-emitting diode crystal grains 131 on the substrate 11. During packaging, each light-emitting diode crystal grain 131 needs to be aligned with the corresponding molding cavity 151. In the embodiment of the present invention, before the mold 15 is packaged with the semiconductor body element 13, it is necessary to coat a layer of release agent 153 on the surface of the mold 15, so as to avoid the encapsulation glue 17 used later and the mold 15 and/or molding Cavity 151 sticks and is difficult to come off.
在完成半导体元件13的设置及离型剂153的涂布或喷洒后,便可进一步将封装胶17填满在模具15的成型腔151内,如图2所示。封装胶17可以是硅胶、环氧树脂、压克力、透光胶体、非透明胶体、光阻、光学材料或保护层材料。After the setting of the semiconductor element 13 and the coating or spraying of the release agent 153 are completed, the encapsulant 17 can be further filled in the molding cavity 151 of the mold 15 , as shown in FIG. 2 . The packaging glue 17 can be silica gel, epoxy resin, acrylic, transparent glue, non-transparent glue, photoresist, optical material or protective layer material.
当封装胶17填满在模具15的成型腔151内时,会再进行一抽取泡沫程序。由于封装胶17在装填于成型腔151时,封装胶17也会包覆部分存在于成型腔151内的气体,因此,必须进行封装胶17内的泡沫抽取程序。在本发明一实施例中,抽取泡沫程序主要为在封装胶17填满成型腔151后,在一放置有该基板11及模具15的一腔室(如图8的元件编号31)内抽离腔室(31)内气体以消除泡沫。When the encapsulant 17 is filled in the molding cavity 151 of the mold 15 , another procedure of extracting foam will be performed. Since the encapsulant 17 will cover part of the gas existing in the molding cavity 151 when the encapsulant 17 is filled in the molding cavity 151 , the foam extraction procedure must be performed in the encapsulant 17 . In one embodiment of the present invention, the procedure of extracting the foam is mainly to extract the foam in a cavity (such as element number 31 in FIG. 8 ) where the substrate 11 and the mold 15 are placed after the encapsulant 17 fills the molding cavity 151. Gas in chamber (31) to eliminate foam.
在本发明一实施例中,在模具15的周缘位置或侧边位置设有复数个第一对位单元155,如图所示的对位柱。相对应第一对位单元155,在基板11的周缘位置设有一第二对位单元113,例如第二对位单元113可以是对位凹洞。而后将基板11对准模具15,具体来说使得基板11上的半导体元件13分别对准模具15上的成型腔151后,通过模具15的第一对位单元155插入基板11的第二对位单元113,以致使基板11贴合模具15,封装胶17将包覆设置于基板11上的半导体元件13,如图3所示。当基板11贴合模具15后,封装胶17将会填满成型腔151,并包覆半导体元件13及基板11的部分表面,以完成封装胶17的塑型,而后可进一步进行封装胶17的加热或以特殊光源(如:紫外光)固化成型程序。经由一加热作用或一特殊光源照射而使封装胶17硬化成型为一封装体171后,再进行一割除程序,将溢出模具15的封装胶体进行割除,再让基板11进行一次上升或反复上升/下降动作。施加上升的位置与力量是为了使硬化的封装体171脱离模具15。施加下降的位置与力量则是为了释放力量,避免基板11破裂。待封装体171与模具15分离,硬化成型的封装体171即可保护基板11及半导体元件13,如图4所示。In an embodiment of the present invention, a plurality of first alignment units 155 are provided on the periphery or side of the mold 15 , such as alignment columns as shown in the figure. Corresponding to the first alignment unit 155 , a second alignment unit 113 is disposed on the periphery of the substrate 11 , for example, the second alignment unit 113 may be an alignment cavity. Then the substrate 11 is aligned with the mold 15, specifically after the semiconductor elements 13 on the substrate 11 are respectively aligned with the molding cavities 151 on the mold 15, the second alignment unit 155 of the mold 15 is inserted into the substrate 11. unit 113 , so that the substrate 11 is attached to the mold 15 , and the encapsulant 17 will cover the semiconductor element 13 disposed on the substrate 11 , as shown in FIG. 3 . After the substrate 11 is attached to the mold 15, the encapsulant 17 will fill the molding cavity 151 and cover the semiconductor element 13 and part of the surface of the substrate 11 to complete the molding of the encapsulant 17, and then the encapsulant 17 can be further molded. Heating or curing molding procedures with special light sources (such as: ultraviolet light). After the encapsulant 17 is hardened and formed into a package body 171 by heating or irradiation by a special light source, a cutting process is performed to cut off the encapsulant overflowing from the mold 15, and then the substrate 11 is raised once or repeatedly. descending action. The rising position and force are applied to release the hardened package 171 from the mold 15 . The lowering position and force are applied to release the force and prevent the substrate 11 from cracking. After the package body 171 is separated from the mold 15 , the hardened package body 171 can protect the substrate 11 and the semiconductor element 13 , as shown in FIG. 4 .
在不同实施例中,模具15上可设置一输送通道,可先进行模具15的成型腔151与基板11上的半导体元件13的对位,并将基板11贴合模具15,而后再经由输送通道将液态的封装胶17输送至模具15与基板11之间。由于模具15的成型腔151与基板11上的半导体元件13已事先由第一对位单元113、第二对位单元155完成插合对位,并在模具15与基板11之间形成一空间。因此在将液态的封装胶17输送至模具15与基板11之间时,液态的封装胶17会填满基板11与模具15之间,并均匀的包覆半导体元件13。In different embodiments, a delivery channel can be set on the mold 15, and the molding cavity 151 of the mold 15 can be aligned with the semiconductor element 13 on the substrate 11 first, and the substrate 11 can be attached to the mold 15, and then pass through the delivery channel. The liquid encapsulant 17 is delivered between the mold 15 and the substrate 11 . Since the molding cavity 151 of the mold 15 and the semiconductor element 13 on the substrate 11 have been inserted and aligned by the first alignment unit 113 and the second alignment unit 155 , a space is formed between the mold 15 and the substrate 11 . Therefore, when the liquid encapsulant 17 is delivered between the mold 15 and the substrate 11 , the liquid encapsulant 17 will fill the space between the substrate 11 and the mold 15 and evenly cover the semiconductor element 13 .
由于本发明在封装胶17填入在模具15的成型腔151之前,已在模具15的成型腔151表面涂布或喷洒一离型剂153,因此在封装胶17硬化成封装体171之后,模具15便可顺利与封装体171分离,而不会在分离的过程中破坏硬化的封装体171。Because the present invention has coated or sprayed a release agent 153 on the surface of the molding cavity 151 of the mold 15 before the packaging glue 17 is filled into the molding cavity 151 of the mold 15, so after the packaging glue 17 is hardened into the package body 171, the mold 15 can be smoothly separated from the package body 171 without damaging the hardened package body 171 during the separation process.
此外本发明所述的离型剂153被涂布或喷洒在模具15的成型腔151表面的液体或粉状体,因此位于模具15表面的离型剂153的厚度相当薄,使得硬化后封装体171的形状及大小会十分接近成型腔151的形状及大小。In addition, the release agent 153 of the present invention is coated or sprayed on the liquid or powder on the surface of the molding cavity 151 of the mold 15, so the thickness of the release agent 153 on the surface of the mold 15 is quite thin, so that the hardened package The shape and size of 171 will be very close to the shape and size of molding cavity 151 .
又,为了确保封装体171的外型及构造,置放于模具成型腔151内的封装胶17一般会超过其容量,且当半导体元件13被压合于成型腔151内时,半导体元件13的体积也会排挤部分封装胶17。为了控制多余封装胶17的溢胶流向,以避免多余封装胶17粘着于基板11非封装表面,本发明的基板11将放置于模具15的上方位置,且基板11面对于成型腔151的作用面积A1也会大于模具15的作用面积A2,如此,多余的封装胶17将会自然沿着环绕模具15侧边的模具墙159流出,而不会粘着或影响到基板11的非封装表面,提高其封装品质。Also, in order to ensure the appearance and structure of the package body 171, the encapsulant 17 placed in the molding cavity 151 of the mold generally exceeds its capacity, and when the semiconductor element 13 is pressed into the molding cavity 151, the semiconductor element 13 The volume will also displace part of the encapsulant 17 . In order to control the flow direction of the excess glue 17, so as to avoid the excess glue 17 sticking to the non-encapsulation surface of the substrate 11, the substrate 11 of the present invention will be placed above the mold 15, and the surface of the substrate 11 has an active area of the molding cavity 151. A1 will also be larger than the active area A2 of the mold 15, so that the excess encapsulation glue 17 will naturally flow out along the mold wall 159 surrounding the side of the mold 15, without sticking or affecting the non-encapsulation surface of the substrate 11, improving its performance. Package quality.
本发明所述的成型腔151的形状可为半圆球体、方形体或多边形体,而形成在基板11表面的封装体171亦具有相同的半圆球体、方形体或多边形体。The shape of the molding cavity 151 in the present invention can be a hemisphere, a square or a polygon, and the package body 171 formed on the surface of the substrate 11 also has the same shape as a hemisphere, a square or a polygon.
在本发明一实施例中,封装胶17在硬化成型之后,会在基板11表面形成至少一封装体171及至少一保护层173,其中封装体171包覆半导体元件13,而保护层173则形成在基板11的表面,例如形成在未设置封装体171的基板11表面。保护层173可以是半圆球体、方形体或多边形体等不同的几何形状。In one embodiment of the present invention, after the encapsulant 17 is hardened and molded, at least one package body 171 and at least one protective layer 173 will be formed on the surface of the substrate 11, wherein the package body 171 covers the semiconductor element 13, and the protective layer 173 forms On the surface of the substrate 11 , for example, it is formed on the surface of the substrate 11 where the package body 171 is not provided. The protective layer 173 can be in different geometric shapes such as hemisphere, square or polygon.
当半导体元件13为发光二极体晶粒131时,封装体171可以是透光的半圆球体,藉此封装体171不仅可用以保护发光二极体晶粒131,亦可用以聚集发光二极体晶粒131所产生的光源。此外亦可在封装体171及/或封装胶17内混合萤光材料、磷光材料或量子点材料,藉此产生不同颜色或不同波长的投射光源。When the semiconductor element 13 is the light-emitting diode crystal grain 131, the encapsulation body 171 can be a light-transmitting hemisphere, so that the encapsulation body 171 can not only be used to protect the light-emitting diode grain 131, but also can be used to gather the light-emitting diode Die 131 produces a light source. In addition, fluorescent materials, phosphorescent materials or quantum dot materials can also be mixed in the packaging body 171 and/or the packaging glue 17, so as to generate projection light sources of different colors or different wavelengths.
由于涂布或喷洒在模具15及/或成型腔151表面的离型剂153的厚度很薄,因此以相同规格的模具15来说,使用离型剂153的模具15将可形成体积较大的封装体171,并以体积较大的封装体171包覆发光二极体晶粒131,如此可增加发光二极体131的出光及聚光效果。相较之下,习用技术则需要在成型腔151与封装胶17之间额外设置一固定形状的离型膜或一离型片,离型膜或离型片的厚度远大于本发明所述的离型剂153,因此习用技术所制作的封装体的体积自然会比较小,其发光与聚光效果也相对较不理想。Because the thickness of the release agent 153 that is coated or sprayed on the mold 15 and/or molding cavity 151 surface is very thin, so with the mold 15 of the same specification, the mold 15 that uses the release agent 153 will be able to form a larger volume Encapsulation 171 , and encapsulating the light emitting diode die 131 with a larger encapsulation 171 can increase the light emitting and concentrating effect of the light emitting diode 131 . In contrast, the conventional technology needs to additionally set a fixed-shaped release film or a release sheet between the molding cavity 151 and the encapsulant 17, and the thickness of the release film or release sheet is much larger than that of the present invention. Release agent 153, so the volume of the package produced by the conventional technology will naturally be relatively small, and its luminous and light-condensing effects are relatively unsatisfactory.
在模具15与封装体171分离时,部分离型剂153将会随着封装体171的脱离而离开成型腔151表面,甚至形成封装体171或保护层173的部分构造,但由于离型剂153粒子及厚度相当小,并不会对封装体171或保护层173造成本质或结构上的影响。又,当成型腔151表面的离型剂153数量小于一临界值时,则必须在成型腔151表面再度涂抹或喷洒离型剂153。When the mold 15 was separated from the packaging body 171, part of the release agent 153 would leave the surface of the molding cavity 151 along with the detachment of the packaging body 171, and even form the partial structure of the packaging body 171 or the protective layer 173, but due to the release agent 153 The particles and thickness are quite small, and will not affect the nature or structure of the package body 171 or the protective layer 173 . Moreover, when the amount of the release agent 153 on the surface of the molding cavity 151 is less than a critical value, the release agent 153 must be applied or sprayed on the surface of the molding cavity 151 again.
请参阅图5及图6,分别为本发明半导体元件的对位模具一实施例的侧视图。如图所示,本发明实施例所述的对位模具适用于上述半导体元件的封装方法,模具25包括复数个成型腔251及复数个第一对位单元255,例如但不限为一对位柱。其中模具25的成型腔251表面则设置有一不沾黏层253,不沾粘层253为一固定构造,其作用类似前面实施例所提的离型剂(153)。而基板11可被一夹爪装置23吸附或夹持固定,并随着夹抓装置23移动,例如上下移动,该基板11的表面上设置复数个半导体元件13。Please refer to FIG. 5 and FIG. 6 , which are respectively side views of an embodiment of an alignment mold for a semiconductor element of the present invention. As shown in the figure, the alignment mold described in the embodiment of the present invention is suitable for the packaging method of the above-mentioned semiconductor element. The mold 25 includes a plurality of molding cavities 251 and a plurality of first alignment units 255, such as but not limited to a pair of alignment units. column. Wherein the surface of the molding cavity 251 of the mold 25 is provided with a non-stick layer 253, the non-stick layer 253 is a fixed structure, and its function is similar to the release agent (153) mentioned in the previous embodiment. The substrate 11 can be absorbed or clamped by a clamping device 23 , and moves with the clamping device 23 , such as moving up and down. A plurality of semiconductor elements 13 are disposed on the surface of the substrate 11 .
基板11相对应于模具25的第一对位单元255设有复数个第二对位单元119,例如本实施例的对位穿孔。夹爪装置23上相对应于模具25的第一对位单元255及基板11的第二对位单元119设有复数个第三对位单元231,例如但不限为一对位凹洞或一对位穿孔。Corresponding to the first alignment unit 255 of the mold 25 , the substrate 11 is provided with a plurality of second alignment units 119 , such as alignment through holes in this embodiment. The jaw device 23 is provided with a plurality of third alignment units 231 corresponding to the first alignment unit 255 of the mold 25 and the second alignment unit 119 of the substrate 11, such as but not limited to a pair of alignment holes or a Counterpoint perforations.
本发明实施例所述的模具25上的第一对位单元255、基板11上的第二对位单元119、夹爪装置23上的第三对位单元231可相互对应或相互匹配,具体来说模具25上的第一对位单元255可为对位柱,基板11上的第二对位单元119为对位穿孔,而夹爪装置23的第三对位单元231则为对位凹洞,第一对位单元255可穿过第二对位单元119,并插入第三对位单元231。According to the embodiment of the present invention, the first alignment unit 255 on the mold 25, the second alignment unit 119 on the substrate 11, and the third alignment unit 231 on the jaw device 23 may correspond to or match each other, specifically Said that the first alignment unit 255 on the mold 25 can be an alignment column, the second alignment unit 119 on the substrate 11 is an alignment perforation, and the third alignment unit 231 of the clamping jaw device 23 is an alignment cavity. , the first alignment unit 255 can pass through the second alignment unit 119 and be inserted into the third alignment unit 231 .
在本发明另一实施例中,模具25上的第一对位单元255可以是对位凹洞,而夹爪装置23的第三对位单元231则为相对应的对位柱,且第三对位单元231可穿过第二对位单元119而插入第一对位单元255。In another embodiment of the present invention, the first alignment unit 255 on the mold 25 may be an alignment cavity, while the third alignment unit 231 of the jaw device 23 is a corresponding alignment column, and the third The alignment unit 231 can be inserted into the first alignment unit 255 through the second alignment unit 119 .
当基板11被吸附且固定在夹爪装置23上后,仅需要将模具25上的第一对位单元255、基板11上的第二对位单元119、夹爪装置23上的第三对位单元231相互对准及插合后,便可使得模具25的成型腔251对准基板11上的半导体元件13。为此,通过本发明所述的模具25的第一对位单元255、基板11上的第二对位单元119及夹爪装置23上的第三对位单元231,将可大大的简化在半导体封装制程中,模具15/25的成型腔151/251与基板11上的半导体元件13对位的难度,可提高生产及封装的效率。After the substrate 11 is adsorbed and fixed on the jaw device 23, only the first alignment unit 255 on the mold 25, the second alignment unit 119 on the substrate 11, and the third alignment unit 23 on the jaw device 23 need to be aligned. After the units 231 are aligned and plugged together, the molding cavity 251 of the mold 25 can be aligned with the semiconductor element 13 on the substrate 11 . For this reason, through the first aligning unit 255 of the mold 25, the second aligning unit 119 on the substrate 11 and the third aligning unit 231 on the jaw device 23 according to the present invention, it will be possible to greatly simplify the process of semiconductor manufacturing. During the packaging process, it is difficult to align the molding cavity 151/251 of the mold 15/25 with the semiconductor element 13 on the substrate 11, which can improve the efficiency of production and packaging.
同理,为了确保封装的品质及控制多余封装胶17的溢胶流向,以避免多余封装胶17粘着于基板11的非封装表面,本发明的夹爪装置23、基板11将放置于模具15的上方,且基板11面对于成型腔151的作用面积A1会大于模具15的作用面积A2,如此,多余的封装胶17将会自然沿着环绕模具15侧面的模具墙159而流出模具25外,而不会影响到基板11,提高其封装的品质。Similarly, in order to ensure the quality of the package and control the flow direction of the excess glue 17, so as to avoid the excess glue 17 sticking to the non-package surface of the substrate 11, the jaw device 23 and the substrate 11 of the present invention will be placed on the surface of the mold 15. above, and the action area A1 of the substrate 11 on the molding cavity 151 will be greater than the action area A2 of the mold 15, so that the excess encapsulation glue 17 will naturally flow out of the mold 25 along the mold wall 159 surrounding the side of the mold 15, and The substrate 11 will not be affected, and the quality of its packaging can be improved.
在本发明又一实施例中,如图7所示,在模具25的外围可设有一盛胶盘39,可承载模具25及在注胶、点胶、压合后,多余且流出模具25外的封装胶17,以方便半导体封装程序的清洁程序。In yet another embodiment of the present invention, as shown in FIG. 7 , a plastic tray 39 may be provided on the periphery of the mold 25 to carry the mold 25 and after injection, dispensing, and pressing, the excess and flow out of the mold 25 The encapsulation glue 17 is used to facilitate the cleaning procedure of the semiconductor encapsulation procedure.
最后,请参阅图8,为本发明半导体元件的对位模具又一实施例的立体示意图。如图所示,本发明夹爪装置23及模具25可被置放于一生产机台30内,生产机台30设有一个或多个腔室31,而每一个腔室31内又可设有一组或多组夹爪装置23、模具25。夹爪装置23连接一升降件33,随着升降件33的升降动作,被吸附及固定在夹爪装置23上的基板11、发光二极体晶粒131也会随着改变与模具25或成型腔251间的距离。在腔室31内可接续完成泡沫清除、固化封装胶、封装体脱离成型腔等半导体元件封装程序。Finally, please refer to FIG. 8 , which is a schematic perspective view of another embodiment of an alignment mold for a semiconductor element of the present invention. As shown in the figure, the jaw device 23 and the mold 25 of the present invention can be placed in a production machine 30, the production machine 30 is provided with one or more chambers 31, and each chamber 31 can be set There are one or more sets of jaw devices 23 and molds 25 . The clamping device 23 is connected with a lifting member 33. With the lifting action of the lifting member 33, the substrate 11 and the light-emitting diode crystal grains 131 which are adsorbed and fixed on the clamping device 23 will also change with the mold 25 or molding. The distance between cavities 251. In the chamber 31 , the encapsulation procedures of semiconductor elements such as foam removal, curing of the encapsulant, and detachment of the encapsulation from the molding cavity can be continuously completed.
在本发明一实施例中,封装胶17及/或离型剂153都可通过生产者人工喷洒或涂布,也可经由一设在腔室31内的胶体供应件35自动喷洒或供给封装胶17及/或离型剂153于成型腔251内。胶体供应件35为一可移动或可伸缩的流体输送管,当需要喷洒或供给封装胶17及/或离型剂153时,可将胶体供应件35移动至成型腔251垂直延伸上表面位置,并针对每一个成型腔251提供其需要的封装胶17及/或离型剂153,藉此可增加半导体封装元件的生产量。In one embodiment of the present invention, the encapsulant 17 and/or the release agent 153 can be manually sprayed or coated by the producer, or can be automatically sprayed or supplied with the encapsulant via a colloid supply part 35 disposed in the chamber 31. 17 and/or release agent 153 in the molding cavity 251. The glue supply part 35 is a movable or stretchable fluid delivery tube. When it is necessary to spray or supply the encapsulation glue 17 and/or the release agent 153, the glue supply part 35 can be moved to the vertically extending upper surface position of the molding cavity 251, And provide the encapsulant 17 and/or release agent 153 needed for each molding cavity 251 , thereby increasing the production volume of the semiconductor package components.
以上所述,仅为本发明的一较佳实施例而已,并非用来限定本发明实施的范围,即凡依本发明权利要求范围所述的形状、构造、特征及精神所为的均等变化与修饰,均应包括在本发明的权利要求范围内。The above description is only a preferred embodiment of the present invention, and is not intended to limit the implementation scope of the present invention, that is, all equal changes and changes made according to the shape, structure, characteristics and spirit described in the scope of the claims of the present invention Modifications should be included within the scope of the claims of the present invention.
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